SL8245.h 9.5 KB

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  1. /*
  2. * (C) Copyright 2001 - 2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /* ------------------------------------------------------------------------- */
  24. /*
  25. * Configuration settings for the SL8245 board.
  26. */
  27. /* ------------------------------------------------------------------------- */
  28. /*
  29. * board/config.h - configuration options, board specific
  30. */
  31. #ifndef __CONFIG_H
  32. #define __CONFIG_H
  33. /*
  34. * High Level Configuration Options
  35. * (easy to change)
  36. */
  37. #define CONFIG_MPC824X 1
  38. #define CONFIG_MPC8245 1
  39. #define CONFIG_SL8245 1
  40. #define CONFIG_CONS_INDEX 1
  41. #define CONFIG_BAUDRATE 115200
  42. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  43. #define CONFIG_BOOTDELAY 5
  44. #define CONFIG_TIMESTAMP /* Print image info with timestamp */
  45. /*
  46. * BOOTP options
  47. */
  48. #define CONFIG_BOOTP_BOOTFILESIZE
  49. #define CONFIG_BOOTP_BOOTPATH
  50. #define CONFIG_BOOTP_GATEWAY
  51. #define CONFIG_BOOTP_HOSTNAME
  52. /*
  53. * Command line configuration.
  54. */
  55. #include <config_cmd_default.h>
  56. #define CONFIG_CMD_PCI
  57. /*
  58. * Miscellaneous configurable options
  59. */
  60. #undef CONFIG_SYS_LONGHELP /* undef to save memory */
  61. #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
  62. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  63. /* Print Buffer Size
  64. */
  65. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  66. #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
  67. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  68. #define CONFIG_SYS_LOAD_ADDR 0x00400000 /* Default load address */
  69. /*-----------------------------------------------------------------------
  70. * Start addresses for the final memory configuration
  71. * (Set up by the startup code)
  72. * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  73. */
  74. #define CONFIG_SYS_SDRAM_BASE 0x00000000
  75. #define CONFIG_SYS_FLASH_BASE0_PRELIM 0xFF800000 /* FLASH bank on RCS#0 */
  76. #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH_BASE0_PRELIM
  77. #define CONFIG_SYS_FLASH_BANKS { CONFIG_SYS_FLASH_BASE0_PRELIM }
  78. #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
  79. #define CONFIG_SYS_EUMB_ADDR 0xFC000000
  80. #define CONFIG_SYS_MONITOR_BASE TEXT_BASE
  81. #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
  82. #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
  83. #define CONFIG_SYS_MEMTEST_START 0x00004000 /* memtest works on */
  84. #define CONFIG_SYS_MEMTEST_END 0x02000000 /* 0 ... 32 MB in DRAM */
  85. /* Maximum amount of RAM.
  86. */
  87. #define CONFIG_SYS_MAX_RAM_SIZE 0x10000000 /* 0 .. 256 MB of (S)DRAM */
  88. #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
  89. #undef CONFIG_SYS_RAMBOOT
  90. #else
  91. #define CONFIG_SYS_RAMBOOT
  92. #endif
  93. /*
  94. * NS16550 Configuration
  95. */
  96. #define CONFIG_SYS_NS16550
  97. #define CONFIG_SYS_NS16550_SERIAL
  98. #define CONFIG_SYS_NS16550_REG_SIZE 1
  99. #define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
  100. #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_EUMB_ADDR + 0x4500)
  101. /*-----------------------------------------------------------------------
  102. * Definitions for initial stack pointer and data area
  103. */
  104. #define CONFIG_SYS_GBL_DATA_SIZE 128
  105. #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
  106. #define CONFIG_SYS_INIT_RAM_END 0x1000
  107. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
  108. /*
  109. * Low Level Configuration Settings
  110. * (address mappings, register initial values, etc.)
  111. * You should know what you are doing if you make changes here.
  112. * For the detail description refer to the MPC8240 user's manual.
  113. */
  114. #define CONFIG_SYS_CLK_FREQ 66666666 /* external frequency to pll */
  115. #define CONFIG_SYS_HZ 1000
  116. /* Bit-field values for MCCR1.
  117. */
  118. #define CONFIG_SYS_ROMNAL 0
  119. #define CONFIG_SYS_ROMFAL 7
  120. #define CONFIG_SYS_BANK0_ROW 2
  121. /* Bit-field values for MCCR2.
  122. */
  123. #define CONFIG_SYS_REFINT 0x400 /* Refresh interval FIXME: was 0t430 */
  124. /* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4.
  125. */
  126. #define CONFIG_SYS_BSTOPRE 192
  127. /* Bit-field values for MCCR3.
  128. */
  129. #define CONFIG_SYS_REFREC 2 /* Refresh to activate interval */
  130. /* Bit-field values for MCCR4.
  131. */
  132. #define CONFIG_SYS_PRETOACT 2 /* Precharge to activate interval */
  133. #define CONFIG_SYS_ACTTOPRE 5 /* Activate to Precharge interval */
  134. #define CONFIG_SYS_ACTORW 3 /* FIXME was 2 */
  135. #define CONFIG_SYS_SDMODE_CAS_LAT 3 /* SDMODE CAS latancy */
  136. #define CONFIG_SYS_SDMODE_WRAP 0 /* SDMODE wrap type */
  137. #define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1
  138. #define CONFIG_SYS_EXTROM 1
  139. #define CONFIG_SYS_REGDIMM 0
  140. #define CONFIG_SYS_ODCR 0xff /* configures line driver impedances, */
  141. /* see 8245 book for bit definitions */
  142. #define CONFIG_SYS_PGMAX 0x32 /* how long the 8245 retains the */
  143. /* currently accessed page in memory */
  144. /* see 8245 book for details */
  145. /* Memory bank settings.
  146. * Only bits 20-29 are actually used from these vales to set the
  147. * start/end addresses. The upper two bits will always be 0, and the lower
  148. * 20 bits will be 0x00000 for a start address, or 0xfffff for an end
  149. * address. Refer to the MPC8240 book.
  150. */
  151. #define CONFIG_SYS_BANK0_START 0x00000000
  152. #define CONFIG_SYS_BANK0_END (CONFIG_SYS_MAX_RAM_SIZE - 1)
  153. #define CONFIG_SYS_BANK0_ENABLE 1
  154. #define CONFIG_SYS_BANK1_START 0x3ff00000
  155. #define CONFIG_SYS_BANK1_END 0x3fffffff
  156. #define CONFIG_SYS_BANK1_ENABLE 0
  157. #define CONFIG_SYS_BANK2_START 0x3ff00000
  158. #define CONFIG_SYS_BANK2_END 0x3fffffff
  159. #define CONFIG_SYS_BANK2_ENABLE 0
  160. #define CONFIG_SYS_BANK3_START 0x3ff00000
  161. #define CONFIG_SYS_BANK3_END 0x3fffffff
  162. #define CONFIG_SYS_BANK3_ENABLE 0
  163. #define CONFIG_SYS_BANK4_START 0x3ff00000
  164. #define CONFIG_SYS_BANK4_END 0x3fffffff
  165. #define CONFIG_SYS_BANK4_ENABLE 0
  166. #define CONFIG_SYS_BANK5_START 0x3ff00000
  167. #define CONFIG_SYS_BANK5_END 0x3fffffff
  168. #define CONFIG_SYS_BANK5_ENABLE 0
  169. #define CONFIG_SYS_BANK6_START 0x3ff00000
  170. #define CONFIG_SYS_BANK6_END 0x3fffffff
  171. #define CONFIG_SYS_BANK6_ENABLE 0
  172. #define CONFIG_SYS_BANK7_START 0x3ff00000
  173. #define CONFIG_SYS_BANK7_END 0x3fffffff
  174. #define CONFIG_SYS_BANK7_ENABLE 0
  175. #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
  176. #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
  177. #define CONFIG_SYS_IBAT1L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
  178. #define CONFIG_SYS_IBAT1U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
  179. #define CONFIG_SYS_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
  180. #define CONFIG_SYS_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
  181. #define CONFIG_SYS_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
  182. #define CONFIG_SYS_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
  183. #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
  184. #define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
  185. #define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
  186. #define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
  187. #define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
  188. #define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
  189. #define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
  190. #define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
  191. /*
  192. * For booting Linux, the board info and command line data
  193. * have to be in the first 8 MB of memory, since this is
  194. * the maximum mapped by the Linux kernel during initialization.
  195. */
  196. #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  197. /*-----------------------------------------------------------------------
  198. * FLASH organization
  199. */
  200. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */
  201. #define CONFIG_SYS_MAX_FLASH_SECT 35 /* Max number of sectors per flash */
  202. #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
  203. #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
  204. /* Warining: environment is not EMBEDDED in the U-Boot code.
  205. * It's stored in flash separately.
  206. */
  207. #define CONFIG_ENV_IS_IN_FLASH 1
  208. #define CONFIG_ENV_ADDR 0xFFFF0000
  209. #define CONFIG_ENV_SIZE 0x00010000 /* Size of the Environment */
  210. #define CONFIG_ENV_SECT_SIZE 0x00010000 /* Size of the Environment Sector */
  211. /*-----------------------------------------------------------------------
  212. * Cache Configuration
  213. */
  214. #define CONFIG_SYS_CACHELINE_SIZE 32
  215. #if defined(CONFIG_CMD_KGDB)
  216. # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
  217. #endif
  218. /*
  219. * Internal Definitions
  220. *
  221. * Boot Flags
  222. */
  223. #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
  224. #define BOOTFLAG_WARM 0x02 /* Software reboot */
  225. /*-----------------------------------------------------------------------
  226. * PCI stuff
  227. *-----------------------------------------------------------------------
  228. */
  229. #define CONFIG_PCI
  230. #define CONFIG_PCI_PNP
  231. #undef CONFIG_PCI_SCAN_SHOW
  232. #define CONFIG_SK98
  233. #define CONFIG_NET_MULTI
  234. #endif /* __CONFIG_H */