system.h 6.3 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1994 - 1999 by Ralf Baechle
  7. * Copyright (C) 1996 by Paul M. Antoine
  8. * Copyright (C) 1994 - 1999 by Ralf Baechle
  9. *
  10. * Changed set_except_vector declaration to allow return of previous
  11. * vector address value - necessary for "borrowing" vectors.
  12. *
  13. * Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com
  14. * Copyright (C) 2000 MIPS Technologies, Inc.
  15. */
  16. #ifndef _ASM_SYSTEM_H
  17. #define _ASM_SYSTEM_H
  18. #include <linux/config.h>
  19. #include <asm/sgidefs.h>
  20. #include <asm/ptrace.h>
  21. #if 0
  22. #include <linux/kernel.h>
  23. #endif
  24. extern __inline__ void
  25. __sti(void)
  26. {
  27. __asm__ __volatile__(
  28. ".set\tpush\n\t"
  29. ".set\treorder\n\t"
  30. ".set\tnoat\n\t"
  31. "mfc0\t$1,$12\n\t"
  32. "ori\t$1,0x1f\n\t"
  33. "xori\t$1,0x1e\n\t"
  34. "mtc0\t$1,$12\n\t"
  35. ".set\tpop\n\t"
  36. : /* no outputs */
  37. : /* no inputs */
  38. : "$1", "memory");
  39. }
  40. /*
  41. * For cli() we have to insert nops to make shure that the new value
  42. * has actually arrived in the status register before the end of this
  43. * macro.
  44. * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
  45. * no nops at all.
  46. */
  47. extern __inline__ void
  48. __cli(void)
  49. {
  50. __asm__ __volatile__(
  51. ".set\tpush\n\t"
  52. ".set\treorder\n\t"
  53. ".set\tnoat\n\t"
  54. "mfc0\t$1,$12\n\t"
  55. "ori\t$1,1\n\t"
  56. "xori\t$1,1\n\t"
  57. ".set\tnoreorder\n\t"
  58. "mtc0\t$1,$12\n\t"
  59. "nop\n\t"
  60. "nop\n\t"
  61. "nop\n\t"
  62. ".set\tpop\n\t"
  63. : /* no outputs */
  64. : /* no inputs */
  65. : "$1", "memory");
  66. }
  67. #define __save_flags(x) \
  68. __asm__ __volatile__( \
  69. ".set\tpush\n\t" \
  70. ".set\treorder\n\t" \
  71. "mfc0\t%0,$12\n\t" \
  72. ".set\tpop\n\t" \
  73. : "=r" (x))
  74. #define __save_and_cli(x) \
  75. __asm__ __volatile__( \
  76. ".set\tpush\n\t" \
  77. ".set\treorder\n\t" \
  78. ".set\tnoat\n\t" \
  79. "mfc0\t%0,$12\n\t" \
  80. "ori\t$1,%0,1\n\t" \
  81. "xori\t$1,1\n\t" \
  82. ".set\tnoreorder\n\t" \
  83. "mtc0\t$1,$12\n\t" \
  84. "nop\n\t" \
  85. "nop\n\t" \
  86. "nop\n\t" \
  87. ".set\tpop\n\t" \
  88. : "=r" (x) \
  89. : /* no inputs */ \
  90. : "$1", "memory")
  91. #define __restore_flags(flags) \
  92. do { \
  93. unsigned long __tmp1; \
  94. \
  95. __asm__ __volatile__( \
  96. ".set\tnoreorder\t\t\t# __restore_flags\n\t" \
  97. ".set\tnoat\n\t" \
  98. "mfc0\t$1, $12\n\t" \
  99. "andi\t%0, 1\n\t" \
  100. "ori\t$1, 1\n\t" \
  101. "xori\t$1, 1\n\t" \
  102. "or\t%0, $1\n\t" \
  103. "mtc0\t%0, $12\n\t" \
  104. "nop\n\t" \
  105. "nop\n\t" \
  106. "nop\n\t" \
  107. ".set\tat\n\t" \
  108. ".set\treorder" \
  109. : "=r" (__tmp1) \
  110. : "0" (flags) \
  111. : "$1", "memory"); \
  112. } while(0)
  113. #ifdef CONFIG_SMP
  114. extern void __global_sti(void);
  115. extern void __global_cli(void);
  116. extern unsigned long __global_save_flags(void);
  117. extern void __global_restore_flags(unsigned long);
  118. # define sti() __global_sti()
  119. # define cli() __global_cli()
  120. # define save_flags(x) do { x = __global_save_flags(); } while (0)
  121. # define restore_flags(x) __global_restore_flags(x)
  122. # define save_and_cli(x) do { save_flags(x); cli(); } while(0)
  123. #else /* Single processor */
  124. # define sti() __sti()
  125. # define cli() __cli()
  126. # define save_flags(x) __save_flags(x)
  127. # define save_and_cli(x) __save_and_cli(x)
  128. # define restore_flags(x) __restore_flags(x)
  129. #endif /* SMP */
  130. /* For spinlocks etc */
  131. #define local_irq_save(x) __save_and_cli(x);
  132. #define local_irq_restore(x) __restore_flags(x);
  133. #define local_irq_disable() __cli();
  134. #define local_irq_enable() __sti();
  135. /*
  136. * These are probably defined overly paranoid ...
  137. */
  138. #ifdef CONFIG_CPU_HAS_WB
  139. #include <asm/wbflush.h>
  140. #define rmb() do { } while(0)
  141. #define wmb() wbflush()
  142. #define mb() wbflush()
  143. #else /* CONFIG_CPU_HAS_WB */
  144. #define mb() \
  145. __asm__ __volatile__( \
  146. "# prevent instructions being moved around\n\t" \
  147. ".set\tnoreorder\n\t" \
  148. "# 8 nops to fool the R4400 pipeline\n\t" \
  149. "nop;nop;nop;nop;nop;nop;nop;nop\n\t" \
  150. ".set\treorder" \
  151. : /* no output */ \
  152. : /* no input */ \
  153. : "memory")
  154. #define rmb() mb()
  155. #define wmb() mb()
  156. #endif /* CONFIG_CPU_HAS_WB */
  157. #ifdef CONFIG_SMP
  158. #define smp_mb() mb()
  159. #define smp_rmb() rmb()
  160. #define smp_wmb() wmb()
  161. #else
  162. #define smp_mb() barrier()
  163. #define smp_rmb() barrier()
  164. #define smp_wmb() barrier()
  165. #endif
  166. #define set_mb(var, value) \
  167. do { var = value; mb(); } while (0)
  168. #define set_wmb(var, value) \
  169. do { var = value; wmb(); } while (0)
  170. #if !defined (_LANGUAGE_ASSEMBLY)
  171. /*
  172. * switch_to(n) should switch tasks to task nr n, first
  173. * checking that n isn't the current task, in which case it does nothing.
  174. */
  175. #if 0
  176. extern asmlinkage void *resume(void *last, void *next);
  177. #endif
  178. #endif /* !defined (_LANGUAGE_ASSEMBLY) */
  179. #define prepare_to_switch() do { } while(0)
  180. #define switch_to(prev,next,last) \
  181. do { \
  182. (last) = resume(prev, next); \
  183. } while(0)
  184. /*
  185. * For 32 and 64 bit operands we can take advantage of ll and sc.
  186. * FIXME: This doesn't work for R3000 machines.
  187. */
  188. extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
  189. {
  190. #ifdef CONFIG_CPU_HAS_LLSC
  191. unsigned long dummy;
  192. __asm__ __volatile__(
  193. ".set\tnoreorder\t\t\t# xchg_u32\n\t"
  194. ".set\tnoat\n\t"
  195. "ll\t%0, %3\n"
  196. "1:\tmove\t$1, %2\n\t"
  197. "sc\t$1, %1\n\t"
  198. "beqzl\t$1, 1b\n\t"
  199. " ll\t%0, %3\n\t"
  200. ".set\tat\n\t"
  201. ".set\treorder"
  202. : "=r" (val), "=o" (*m), "=r" (dummy)
  203. : "o" (*m), "2" (val)
  204. : "memory");
  205. return val;
  206. #else
  207. unsigned long flags, retval;
  208. save_flags(flags);
  209. cli();
  210. retval = *m;
  211. *m = val;
  212. restore_flags(flags);
  213. return retval;
  214. #endif /* Processor-dependent optimization */
  215. }
  216. #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
  217. #define tas(ptr) (xchg((ptr),1))
  218. static __inline__ unsigned long
  219. __xchg(unsigned long x, volatile void * ptr, int size)
  220. {
  221. switch (size) {
  222. case 4:
  223. return xchg_u32(ptr, x);
  224. }
  225. return x;
  226. }
  227. extern void *set_except_vector(int n, void *addr);
  228. extern void __die(const char *, struct pt_regs *, const char *where,
  229. unsigned long line) __attribute__((noreturn));
  230. extern void __die_if_kernel(const char *, struct pt_regs *, const char *where,
  231. unsigned long line);
  232. #define die(msg, regs) \
  233. __die(msg, regs, __FILE__ ":"__FUNCTION__, __LINE__)
  234. #define die_if_kernel(msg, regs) \
  235. __die_if_kernel(msg, regs, __FILE__ ":"__FUNCTION__, __LINE__)
  236. #endif /* _ASM_SYSTEM_H */