cacheflush.h 2.5 KB

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  1. /*
  2. * Copyright (C) 2006 Atmel Corporation
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #ifndef __ASM_AVR32_CACHEFLUSH_H
  23. #define __ASM_AVR32_CACHEFLUSH_H
  24. /*
  25. * Invalidate any cacheline containing virtual address vaddr without
  26. * writing anything back to memory.
  27. *
  28. * Note that this function may corrupt unrelated data structures when
  29. * applied on buffers that are not cacheline aligned in both ends.
  30. */
  31. static inline void dcache_invalidate_line(volatile void *vaddr)
  32. {
  33. asm volatile("cache %0[0], 0x0b" : : "r"(vaddr) : "memory");
  34. }
  35. /*
  36. * Make sure any cacheline containing virtual address vaddr is written
  37. * to memory.
  38. */
  39. static inline void dcache_clean_line(volatile void *vaddr)
  40. {
  41. asm volatile("cache %0[0], 0x0c" : : "r"(vaddr) : "memory");
  42. }
  43. /*
  44. * Make sure any cacheline containing virtual address vaddr is written
  45. * to memory and then invalidate it.
  46. */
  47. static inline void dcache_flush_line(volatile void *vaddr)
  48. {
  49. asm volatile("cache %0[0], 0x0d" : : "r"(vaddr) : "memory");
  50. }
  51. /*
  52. * Invalidate any instruction cacheline containing virtual address
  53. * vaddr.
  54. */
  55. static inline void icache_invalidate_line(volatile void *vaddr)
  56. {
  57. asm volatile("cache %0[0], 0x01" : : "r"(vaddr) : "memory");
  58. }
  59. /*
  60. * Applies the above functions on all lines that are touched by the
  61. * specified virtual address range.
  62. */
  63. void dcache_invalidate_range(volatile void *start, size_t len);
  64. void dcache_clean_range(volatile void *start, size_t len);
  65. void dcache_flush_range(volatile void *start, size_t len);
  66. void icache_invalidate_range(volatile void *start, size_t len);
  67. static inline void dcache_flush_unlocked(void)
  68. {
  69. asm volatile("cache %0[5], 0x08" : : "r"(0) : "memory");
  70. }
  71. /*
  72. * Make sure any pending writes are completed before continuing.
  73. */
  74. #define sync_write_buffer() asm volatile("sync 0" : : : "memory")
  75. #endif /* __ASM_AVR32_CACHEFLUSH_H */