tegra114.dtsi 4.8 KB

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  1. #include "skeleton.dtsi"
  2. / {
  3. compatible = "nvidia,tegra114";
  4. tegra_car: clock {
  5. compatible = "nvidia,tegra114-car";
  6. reg = <0x60006000 0x1000>;
  7. #clock-cells = <1>;
  8. };
  9. apbdma: dma {
  10. compatible = "nvidia,tegra114-apbdma", "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
  11. reg = <0x6000a000 0x1400>;
  12. interrupts = <0 104 0x04
  13. 0 105 0x04
  14. 0 106 0x04
  15. 0 107 0x04
  16. 0 108 0x04
  17. 0 109 0x04
  18. 0 110 0x04
  19. 0 111 0x04
  20. 0 112 0x04
  21. 0 113 0x04
  22. 0 114 0x04
  23. 0 115 0x04
  24. 0 116 0x04
  25. 0 117 0x04
  26. 0 118 0x04
  27. 0 119 0x04
  28. 0 128 0x04
  29. 0 129 0x04
  30. 0 130 0x04
  31. 0 131 0x04
  32. 0 132 0x04
  33. 0 133 0x04
  34. 0 134 0x04
  35. 0 135 0x04
  36. 0 136 0x04
  37. 0 137 0x04
  38. 0 138 0x04
  39. 0 139 0x04
  40. 0 140 0x04
  41. 0 141 0x04
  42. 0 142 0x04
  43. 0 143 0x04>;
  44. };
  45. gpio: gpio {
  46. compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
  47. reg = <0x6000d000 0x1000>;
  48. interrupts = <0 32 0x04
  49. 0 33 0x04
  50. 0 34 0x04
  51. 0 35 0x04
  52. 0 55 0x04
  53. 0 87 0x04
  54. 0 89 0x04
  55. 0 125 0x04>;
  56. #gpio-cells = <2>;
  57. gpio-controller;
  58. #interrupt-cells = <2>;
  59. interrupt-controller;
  60. };
  61. i2c@7000c000 {
  62. compatible = "nvidia,tegra114-i2c";
  63. reg = <0x7000c000 0x100>;
  64. interrupts = <0 38 0x04>;
  65. #address-cells = <1>;
  66. #size-cells = <0>;
  67. clocks = <&tegra_car 12>;
  68. status = "disabled";
  69. };
  70. i2c@7000c400 {
  71. compatible = "nvidia,tegra114-i2c";
  72. reg = <0x7000c400 0x100>;
  73. interrupts = <0 84 0x04>;
  74. #address-cells = <1>;
  75. #size-cells = <0>;
  76. clocks = <&tegra_car 54>;
  77. status = "disabled";
  78. };
  79. i2c@7000c500 {
  80. compatible = "nvidia,tegra114-i2c";
  81. reg = <0x7000c500 0x100>;
  82. interrupts = <0 92 0x04>;
  83. #address-cells = <1>;
  84. #size-cells = <0>;
  85. clocks = <&tegra_car 67>;
  86. status = "disabled";
  87. };
  88. i2c@7000c700 {
  89. compatible = "nvidia,tegra114-i2c";
  90. reg = <0x7000c700 0x100>;
  91. interrupts = <0 120 0x04>;
  92. #address-cells = <1>;
  93. #size-cells = <0>;
  94. clocks = <&tegra_car 103>;
  95. status = "disabled";
  96. };
  97. i2c@7000d000 {
  98. compatible = "nvidia,tegra114-i2c";
  99. reg = <0x7000d000 0x100>;
  100. interrupts = <0 53 0x04>;
  101. #address-cells = <1>;
  102. #size-cells = <0>;
  103. clocks = <&tegra_car 47>;
  104. status = "disabled";
  105. };
  106. spi@7000d400 {
  107. compatible = "nvidia,tegra114-spi";
  108. reg = <0x7000d400 0x200>;
  109. interrupts = <0 59 0x04>;
  110. nvidia,dma-request-selector = <&apbdma 15>;
  111. #address-cells = <1>;
  112. #size-cells = <0>;
  113. status = "disabled";
  114. /* PERIPH_ID_SBC1, PLLP_OUT0 */
  115. clocks = <&tegra_car 41>;
  116. };
  117. spi@7000d600 {
  118. compatible = "nvidia,tegra114-spi";
  119. reg = <0x7000d600 0x200>;
  120. interrupts = <0 82 0x04>;
  121. nvidia,dma-request-selector = <&apbdma 16>;
  122. #address-cells = <1>;
  123. #size-cells = <0>;
  124. status = "disabled";
  125. /* PERIPH_ID_SBC2, PLLP_OUT0 */
  126. clocks = <&tegra_car 44>;
  127. };
  128. spi@7000d800 {
  129. compatible = "nvidia,tegra114-spi";
  130. reg = <0x7000d480 0x200>;
  131. interrupts = <0 83 0x04>;
  132. nvidia,dma-request-selector = <&apbdma 17>;
  133. #address-cells = <1>;
  134. #size-cells = <0>;
  135. status = "disabled";
  136. /* PERIPH_ID_SBC3, PLLP_OUT0 */
  137. clocks = <&tegra_car 46>;
  138. };
  139. spi@7000da00 {
  140. compatible = "nvidia,tegra114-spi";
  141. reg = <0x7000da00 0x200>;
  142. interrupts = <0 93 0x04>;
  143. nvidia,dma-request-selector = <&apbdma 18>;
  144. #address-cells = <1>;
  145. #size-cells = <0>;
  146. status = "disabled";
  147. /* PERIPH_ID_SBC4, PLLP_OUT0 */
  148. clocks = <&tegra_car 68>;
  149. };
  150. spi@7000dc00 {
  151. compatible = "nvidia,tegra114-spi";
  152. reg = <0x7000dc00 0x200>;
  153. interrupts = <0 94 0x04>;
  154. nvidia,dma-request-selector = <&apbdma 27>;
  155. #address-cells = <1>;
  156. #size-cells = <0>;
  157. status = "disabled";
  158. /* PERIPH_ID_SBC5, PLLP_OUT0 */
  159. clocks = <&tegra_car 104>;
  160. };
  161. spi@7000de00 {
  162. compatible = "nvidia,tegra114-spi";
  163. reg = <0x7000de00 0x200>;
  164. interrupts = <0 79 0x04>;
  165. nvidia,dma-request-selector = <&apbdma 28>;
  166. #address-cells = <1>;
  167. #size-cells = <0>;
  168. status = "disabled";
  169. /* PERIPH_ID_SBC6, PLLP_OUT0 */
  170. clocks = <&tegra_car 105>;
  171. };
  172. sdhci@78000000 {
  173. compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
  174. reg = <0x78000000 0x200>;
  175. interrupts = <0 14 0x04>;
  176. clocks = <&tegra_car 14>;
  177. status = "disable";
  178. };
  179. sdhci@78000200 {
  180. compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
  181. reg = <0x78000200 0x200>;
  182. interrupts = <0 15 0x04>;
  183. clocks = <&tegra_car 9>;
  184. status = "disable";
  185. };
  186. sdhci@78000400 {
  187. compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
  188. reg = <0x78000400 0x200>;
  189. interrupts = <0 19 0x04>;
  190. clocks = <&tegra_car 69>;
  191. status = "disable";
  192. };
  193. sdhci@78000600 {
  194. compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
  195. reg = <0x78000600 0x200>;
  196. interrupts = <0 31 0x04>;
  197. clocks = <&tegra_car 15>;
  198. status = "disable";
  199. };
  200. };