usb_ehci_core.c 17 KB

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  1. /*-
  2. * Copyright (c) 2007-2008, Juniper Networks, Inc.
  3. * Copyright (c) 2008, Excito Elektronik i Skåne AB
  4. * All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation version 2 of
  9. * the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19. * MA 02111-1307 USA
  20. */
  21. #define DEBUG
  22. #include <common.h>
  23. #include <asm/byteorder.h>
  24. #include <usb.h>
  25. #include <asm/io.h>
  26. #include <malloc.h>
  27. #include "usb_ehci.h"
  28. int rootdev;
  29. struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
  30. volatile struct ehci_hcor *hcor;
  31. static uint16_t portreset;
  32. static struct QH qh_list __attribute__((aligned(32)));
  33. static struct descriptor {
  34. struct usb_hub_descriptor hub;
  35. struct usb_device_descriptor device;
  36. struct usb_linux_config_descriptor config;
  37. struct usb_linux_interface_descriptor interface;
  38. struct usb_endpoint_descriptor endpoint;
  39. } __attribute__ ((packed)) descriptor = {
  40. {
  41. 0x8, /* bDescLength */
  42. 0x29, /* bDescriptorType: hub descriptor */
  43. 2, /* bNrPorts -- runtime modified */
  44. 0, /* wHubCharacteristics */
  45. 0xff, /* bPwrOn2PwrGood */
  46. 0, /* bHubCntrCurrent */
  47. {}, /* Device removable */
  48. {} /* at most 7 ports! XXX */
  49. },
  50. {
  51. 0x12, /* bLength */
  52. 1, /* bDescriptorType: UDESC_DEVICE */
  53. 0x0002, /* bcdUSB: v2.0 */
  54. 9, /* bDeviceClass: UDCLASS_HUB */
  55. 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
  56. 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  57. 64, /* bMaxPacketSize: 64 bytes */
  58. 0x0000, /* idVendor */
  59. 0x0000, /* idProduct */
  60. 0x0001, /* bcdDevice */
  61. 1, /* iManufacturer */
  62. 2, /* iProduct */
  63. 0, /* iSerialNumber */
  64. 1 /* bNumConfigurations: 1 */
  65. },
  66. {
  67. 0x9,
  68. 2, /* bDescriptorType: UDESC_CONFIG */
  69. cpu_to_le16(0x19),
  70. 1, /* bNumInterface */
  71. 1, /* bConfigurationValue */
  72. 0, /* iConfiguration */
  73. 0x40, /* bmAttributes: UC_SELF_POWER */
  74. 0 /* bMaxPower */
  75. },
  76. {
  77. 0x9, /* bLength */
  78. 4, /* bDescriptorType: UDESC_INTERFACE */
  79. 0, /* bInterfaceNumber */
  80. 0, /* bAlternateSetting */
  81. 1, /* bNumEndpoints */
  82. 9, /* bInterfaceClass: UICLASS_HUB */
  83. 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
  84. 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  85. 0 /* iInterface */
  86. },
  87. {
  88. 0x7, /* bLength */
  89. 5, /* bDescriptorType: UDESC_ENDPOINT */
  90. 0x81, /* bEndpointAddress:
  91. * UE_DIR_IN | EHCI_INTR_ENDPT
  92. */
  93. 3, /* bmAttributes: UE_INTERRUPT */
  94. 8, 0, /* wMaxPacketSize */
  95. 255 /* bInterval */
  96. },
  97. };
  98. static void ehci_free (void *p, size_t sz)
  99. {
  100. }
  101. static void *ehci_alloc(size_t sz, size_t align)
  102. {
  103. static struct QH qh __attribute__((aligned(32)));
  104. static struct qTD td[3] __attribute__((aligned (32)));
  105. static int ntds;
  106. void *p;
  107. switch (sz) {
  108. case sizeof(struct QH):
  109. p = &qh;
  110. ntds = 0;
  111. break;
  112. case sizeof(struct qTD):
  113. if (ntds == 3) {
  114. debug("out of TDs\n");
  115. return NULL;
  116. }
  117. p = &td[ntds];
  118. ntds++;
  119. break;
  120. default:
  121. debug("unknown allocation size\n");
  122. return NULL;
  123. }
  124. memset(p, sz, 0);
  125. return p;
  126. }
  127. static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
  128. {
  129. uint32_t addr, delta, next;
  130. int idx;
  131. addr = (uint32_t) buf;
  132. idx = 0;
  133. while (idx < 5) {
  134. td->qt_buffer[idx] = cpu_to_hc32(addr);
  135. next = (addr + 4096) & ~4095;
  136. delta = next - addr;
  137. if (delta >= sz)
  138. break;
  139. sz -= delta;
  140. addr = next;
  141. idx++;
  142. }
  143. if (idx == 5) {
  144. debug("out of buffer pointers (%u bytes left)\n", sz);
  145. return -1;
  146. }
  147. return 0;
  148. }
  149. static int
  150. ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
  151. int length, struct devrequest *req)
  152. {
  153. struct QH *qh;
  154. struct qTD *td;
  155. volatile struct qTD *vtd;
  156. unsigned long ts;
  157. uint32_t *tdp;
  158. uint32_t endpt, token, usbsts;
  159. uint32_t c, toggle;
  160. uint32_t cmd;
  161. debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
  162. buffer, length, req);
  163. if (req != NULL)
  164. debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
  165. req->request, req->request,
  166. req->requesttype, req->requesttype,
  167. le16_to_cpu(req->value), le16_to_cpu(req->value),
  168. le16_to_cpu(req->index));
  169. qh = ehci_alloc(sizeof(struct QH), 32);
  170. if (qh == NULL) {
  171. debug("unable to allocate QH\n");
  172. return -1;
  173. }
  174. qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
  175. c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
  176. usb_pipeendpoint(pipe) == 0) ? 1 : 0;
  177. endpt = (8 << 28) |
  178. (c << 27) |
  179. (usb_maxpacket(dev, pipe) << 16) |
  180. (0 << 15) |
  181. (1 << 14) |
  182. (usb_pipespeed(pipe) << 12) |
  183. (usb_pipeendpoint(pipe) << 8) |
  184. (0 << 7) | (usb_pipedevice(pipe) << 0);
  185. qh->qh_endpt1 = cpu_to_hc32(endpt);
  186. endpt = (1 << 30) |
  187. (dev->portnr << 23) |
  188. (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
  189. qh->qh_endpt2 = cpu_to_hc32(endpt);
  190. qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  191. qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  192. td = NULL;
  193. tdp = &qh->qh_overlay.qt_next;
  194. toggle =
  195. usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
  196. if (req != NULL) {
  197. td = ehci_alloc(sizeof(struct qTD), 32);
  198. if (td == NULL) {
  199. debug("unable to allocate SETUP td\n");
  200. goto fail;
  201. }
  202. td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  203. td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  204. token = (0 << 31) |
  205. (sizeof(*req) << 16) |
  206. (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
  207. td->qt_token = cpu_to_hc32(token);
  208. if (ehci_td_buffer(td, req, sizeof(*req)) != 0) {
  209. debug("unable construct SETUP td\n");
  210. ehci_free(td, sizeof(*td));
  211. goto fail;
  212. }
  213. *tdp = cpu_to_hc32((uint32_t) td);
  214. tdp = &td->qt_next;
  215. toggle = 1;
  216. }
  217. if (length > 0 || req == NULL) {
  218. td = ehci_alloc(sizeof(struct qTD), 32);
  219. if (td == NULL) {
  220. debug("unable to allocate DATA td\n");
  221. goto fail;
  222. }
  223. td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  224. td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  225. token = (toggle << 31) |
  226. (length << 16) |
  227. ((req == NULL ? 1 : 0) << 15) |
  228. (0 << 12) |
  229. (3 << 10) |
  230. ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
  231. td->qt_token = cpu_to_hc32(token);
  232. if (ehci_td_buffer(td, buffer, length) != 0) {
  233. debug("unable construct DATA td\n");
  234. ehci_free(td, sizeof(*td));
  235. goto fail;
  236. }
  237. *tdp = cpu_to_hc32((uint32_t) td);
  238. tdp = &td->qt_next;
  239. }
  240. if (req != NULL) {
  241. td = ehci_alloc(sizeof(struct qTD), 32);
  242. if (td == NULL) {
  243. debug("unable to allocate ACK td\n");
  244. goto fail;
  245. }
  246. td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  247. td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  248. token = (toggle << 31) |
  249. (0 << 16) |
  250. (1 << 15) |
  251. (0 << 12) |
  252. (3 << 10) |
  253. ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
  254. td->qt_token = cpu_to_hc32(token);
  255. *tdp = cpu_to_hc32((uint32_t) td);
  256. tdp = &td->qt_next;
  257. }
  258. qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH);
  259. usbsts = ehci_readl(hcor->or_usbsts);
  260. ehci_writel(hcor->or_usbsts, (usbsts & 0x3f));
  261. /* Enable async. schedule. */
  262. cmd = ehci_readl(hcor->or_usbcmd);
  263. hcor->or_usbcmd |= CMD_ASE;
  264. ehci_writel(hcor->or_usbcmd, cmd);
  265. while ((ehci_readl(hcor->or_usbsts) & STD_ASS) == 0)
  266. udelay(1);
  267. /* Wait for TDs to be processed. */
  268. ts = get_timer(0);
  269. vtd = td;
  270. do {
  271. token = hc32_to_cpu(vtd->qt_token);
  272. if (!(token & 0x80))
  273. break;
  274. } while (get_timer(ts) < CONFIG_SYS_HZ);
  275. /* Disable async schedule. */
  276. cmd = ehci_readl(hcor->or_usbcmd);
  277. cmd &= ~CMD_ASE;
  278. ehci_writel(hcor->or_usbcmd, cmd);
  279. while ((ehci_readl(hcor->or_usbsts) & STD_ASS) != 0)
  280. udelay(1);
  281. qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
  282. token = hc32_to_cpu(qh->qh_overlay.qt_token);
  283. if (!(token & 0x80)) {
  284. debug("TOKEN=%#x\n", token);
  285. switch (token & 0xfc) {
  286. case 0:
  287. toggle = token >> 31;
  288. usb_settoggle(dev, usb_pipeendpoint(pipe),
  289. usb_pipeout(pipe), toggle);
  290. dev->status = 0;
  291. break;
  292. case 0x40:
  293. dev->status = USB_ST_STALLED;
  294. break;
  295. case 0xa0:
  296. case 0x20:
  297. dev->status = USB_ST_BUF_ERR;
  298. break;
  299. case 0x50:
  300. case 0x10:
  301. dev->status = USB_ST_BABBLE_DET;
  302. break;
  303. default:
  304. dev->status = USB_ST_CRC_ERR;
  305. break;
  306. }
  307. dev->act_len = length - ((token >> 16) & 0x7fff);
  308. } else {
  309. dev->act_len = 0;
  310. debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
  311. dev->devnum, ehci_readl(hcor->or_usbsts),
  312. ehci_readl(hcor->or_portsc[0]),
  313. ehci_readl(hcor->or_portsc[1]));
  314. }
  315. return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
  316. fail:
  317. td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
  318. while (td != (void *)QT_NEXT_TERMINATE) {
  319. qh->qh_overlay.qt_next = td->qt_next;
  320. ehci_free(td, sizeof(*td));
  321. td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
  322. }
  323. ehci_free(qh, sizeof(*qh));
  324. return -1;
  325. }
  326. static inline int min3(int a, int b, int c)
  327. {
  328. if (b < a)
  329. a = b;
  330. if (c < a)
  331. a = c;
  332. return a;
  333. }
  334. int
  335. ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
  336. int length, struct devrequest *req)
  337. {
  338. uint8_t tmpbuf[4];
  339. u16 typeReq;
  340. void *srcptr = NULL;
  341. int len, srclen;
  342. uint32_t reg;
  343. srclen = 0;
  344. debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
  345. req->request, req->request,
  346. req->requesttype, req->requesttype,
  347. le16_to_cpu(req->value), le16_to_cpu(req->index));
  348. typeReq = req->request << 8 | req->requesttype;
  349. switch (le16_to_cpu(typeReq)) {
  350. case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
  351. switch (le16_to_cpu(req->value) >> 8) {
  352. case USB_DT_DEVICE:
  353. debug("USB_DT_DEVICE request\n");
  354. srcptr = &descriptor.device;
  355. srclen = 0x12;
  356. break;
  357. case USB_DT_CONFIG:
  358. debug("USB_DT_CONFIG config\n");
  359. srcptr = &descriptor.config;
  360. srclen = 0x19;
  361. break;
  362. case USB_DT_STRING:
  363. debug("USB_DT_STRING config\n");
  364. switch (le16_to_cpu(req->value) & 0xff) {
  365. case 0: /* Language */
  366. srcptr = "\4\3\1\0";
  367. srclen = 4;
  368. break;
  369. case 1: /* Vendor */
  370. srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
  371. srclen = 14;
  372. break;
  373. case 2: /* Product */
  374. srcptr = "\52\3E\0H\0C\0I\0 "
  375. "\0H\0o\0s\0t\0 "
  376. "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
  377. srclen = 42;
  378. break;
  379. default:
  380. debug("unknown value DT_STRING %x\n",
  381. le16_to_cpu(req->value));
  382. goto unknown;
  383. }
  384. break;
  385. default:
  386. debug("unknown value %x\n", le16_to_cpu(req->value));
  387. goto unknown;
  388. }
  389. break;
  390. case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
  391. switch (le16_to_cpu(req->value) >> 8) {
  392. case USB_DT_HUB:
  393. debug("USB_DT_HUB config\n");
  394. srcptr = &descriptor.hub;
  395. srclen = 0x8;
  396. break;
  397. default:
  398. debug("unknown value %x\n", le16_to_cpu(req->value));
  399. goto unknown;
  400. }
  401. break;
  402. case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
  403. debug("USB_REQ_SET_ADDRESS\n");
  404. rootdev = le16_to_cpu(req->value);
  405. break;
  406. case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
  407. debug("USB_REQ_SET_CONFIGURATION\n");
  408. /* Nothing to do */
  409. break;
  410. case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
  411. tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
  412. tmpbuf[1] = 0;
  413. srcptr = tmpbuf;
  414. srclen = 2;
  415. break;
  416. case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
  417. memset(tmpbuf, 0, 4);
  418. reg = ehci_readl(hcor->or_portsc[le16_to_cpu(req->index)
  419. - 1]);
  420. if (reg & EHCI_PS_CS)
  421. tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
  422. if (reg & EHCI_PS_PE)
  423. tmpbuf[0] |= USB_PORT_STAT_ENABLE;
  424. if (reg & EHCI_PS_SUSP)
  425. tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
  426. if (reg & EHCI_PS_OCA)
  427. tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
  428. if (reg & EHCI_PS_PR)
  429. tmpbuf[0] |= USB_PORT_STAT_RESET;
  430. if (reg & EHCI_PS_PP)
  431. tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
  432. tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
  433. if (reg & EHCI_PS_CSC)
  434. tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
  435. if (reg & EHCI_PS_PEC)
  436. tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
  437. if (reg & EHCI_PS_OCC)
  438. tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
  439. if (portreset & (1 << le16_to_cpu(req->index)))
  440. tmpbuf[2] |= USB_PORT_STAT_C_RESET;
  441. srcptr = tmpbuf;
  442. srclen = 4;
  443. break;
  444. case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
  445. reg = ehci_readl(hcor->or_portsc[le16_to_cpu(req->index) - 1]);
  446. reg &= ~EHCI_PS_CLEAR;
  447. switch (le16_to_cpu(req->value)) {
  448. case USB_PORT_FEAT_POWER:
  449. reg |= EHCI_PS_PP;
  450. break;
  451. case USB_PORT_FEAT_RESET:
  452. debug("USB FEAT RESET\n");
  453. if (EHCI_PS_IS_LOWSPEED(reg)) {
  454. /* Low speed device, give up ownership. */
  455. reg |= EHCI_PS_PO;
  456. break;
  457. }
  458. /* Start reset sequence. */
  459. reg &= ~EHCI_PS_PE;
  460. reg |= EHCI_PS_PR;
  461. ehci_writel(hcor->or_portsc[
  462. le16_to_cpu(req->index) - 1], reg);
  463. /* Wait for reset to complete. */
  464. udelay(500000);
  465. /* Terminate reset sequence. */
  466. reg &= ~EHCI_PS_PR;
  467. /* TODO: is it only fsl chip that requires this
  468. * manual setting of port enable?
  469. */
  470. reg |= EHCI_PS_PE;
  471. ehci_writel(hcor->or_portsc[
  472. le16_to_cpu(req->index) - 1], reg);
  473. /* Wait for HC to complete reset. */
  474. udelay(2000);
  475. reg =
  476. ehci_readl(hcor->or_portsc[le16_to_cpu(req->index)
  477. - 1]);
  478. reg &= ~EHCI_PS_CLEAR;
  479. if ((reg & EHCI_PS_PE) == 0) {
  480. /* Not a high speed device, give up
  481. * ownership. */
  482. reg |= EHCI_PS_PO;
  483. break;
  484. }
  485. portreset |= 1 << le16_to_cpu(req->index);
  486. break;
  487. default:
  488. debug("unknown feature %x\n", le16_to_cpu(req->value));
  489. goto unknown;
  490. }
  491. ehci_writel(hcor->or_portsc[le16_to_cpu(req->index) - 1], reg);
  492. break;
  493. case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
  494. reg = ehci_readl(hcor->or_portsc[le16_to_cpu(req->index) - 1]);
  495. reg &= ~EHCI_PS_CLEAR;
  496. switch (le16_to_cpu(req->value)) {
  497. case USB_PORT_FEAT_ENABLE:
  498. reg &= ~EHCI_PS_PE;
  499. break;
  500. case USB_PORT_FEAT_C_CONNECTION:
  501. reg |= EHCI_PS_CSC;
  502. break;
  503. case USB_PORT_FEAT_C_RESET:
  504. portreset &= ~(1 << le16_to_cpu(req->index));
  505. break;
  506. default:
  507. debug("unknown feature %x\n", le16_to_cpu(req->value));
  508. goto unknown;
  509. }
  510. ehci_writel(hcor->or_portsc[le16_to_cpu(req->index) - 1], reg);
  511. break;
  512. default:
  513. debug("Unknown request\n");
  514. goto unknown;
  515. }
  516. wait_ms(1);
  517. len = min3(srclen, le16_to_cpu(req->length), length);
  518. if (srcptr != NULL && len > 0)
  519. memcpy(buffer, srcptr, len);
  520. else
  521. debug("Len is 0\n");
  522. dev->act_len = len;
  523. dev->status = 0;
  524. return 0;
  525. unknown:
  526. debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
  527. req->requesttype, req->request, le16_to_cpu(req->value),
  528. le16_to_cpu(req->index), le16_to_cpu(req->length));
  529. dev->act_len = 0;
  530. dev->status = USB_ST_STALLED;
  531. return -1;
  532. }
  533. int usb_lowlevel_stop(void)
  534. {
  535. return ehci_hcd_stop();
  536. }
  537. int usb_lowlevel_init(void)
  538. {
  539. uint32_t reg;
  540. uint32_t cmd;
  541. if (ehci_hcd_init() != 0)
  542. return -1;
  543. /* Set head of reclaim list */
  544. memset(&qh_list, 0, sizeof(qh_list));
  545. qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
  546. qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
  547. qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
  548. qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  549. qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  550. qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40);
  551. /* Set async. queue head pointer. */
  552. ehci_writel(hcor->or_asynclistaddr, (uint32_t)&qh_list);
  553. reg = ehci_readl(hccr->cr_hcsparams);
  554. descriptor.hub.bNbrPorts = reg & 0xf;
  555. printf("NbrPorts %x\n", descriptor.hub.bNbrPorts);
  556. if (reg & 0x10000) /* Port Indicators */
  557. descriptor.hub.wHubCharacteristics |= 0x80;
  558. if (reg & 0x10) /* Port Power Control */
  559. descriptor.hub.wHubCharacteristics |= 0x01;
  560. /* take control over the ports */
  561. cmd = ehci_readl(hcor->or_configflag);
  562. cmd |= 1;
  563. ehci_writel(hcor->or_configflag, cmd);
  564. /* Start the host controller. */
  565. cmd = ehci_readl(hcor->or_configflag);
  566. cmd |= 1;
  567. ehci_writel(hcor->or_usbcmd, cmd);
  568. rootdev = 0;
  569. return 0;
  570. }
  571. int
  572. submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  573. int length)
  574. {
  575. if (usb_pipetype(pipe) != PIPE_BULK) {
  576. debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
  577. return -1;
  578. }
  579. return ehci_submit_async(dev, pipe, buffer, length, NULL);
  580. }
  581. int
  582. submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  583. int length, struct devrequest *setup)
  584. {
  585. if (usb_pipetype(pipe) != PIPE_CONTROL) {
  586. debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
  587. return -1;
  588. }
  589. if (usb_pipedevice(pipe) == rootdev) {
  590. if (rootdev == 0)
  591. dev->speed = USB_SPEED_HIGH;
  592. return ehci_submit_root(dev, pipe, buffer, length, setup);
  593. }
  594. return ehci_submit_async(dev, pipe, buffer, length, setup);
  595. }
  596. int
  597. submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  598. int length, int interval)
  599. {
  600. debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
  601. dev, pipe, buffer, length, interval);
  602. return -1;
  603. }