universal.c 11 KB

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  1. /*
  2. * Copyright (C) 2010 Samsung Electronics
  3. * Minkyu Kang <mk7.kang@samsung.com>
  4. * Kyungmin Park <kyungmin.park@samsung.com>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <common.h>
  25. #include <spi.h>
  26. #include <lcd.h>
  27. #include <asm/io.h>
  28. #include <asm/gpio.h>
  29. #include <asm/arch/adc.h>
  30. #include <asm/arch/gpio.h>
  31. #include <asm/arch/mmc.h>
  32. #include <asm/arch/pinmux.h>
  33. #include <asm/arch/watchdog.h>
  34. #include <libtizen.h>
  35. #include <ld9040.h>
  36. #include <power/pmic.h>
  37. #include <usb/s3c_udc.h>
  38. #include <asm/arch/cpu.h>
  39. #include <power/max8998_pmic.h>
  40. DECLARE_GLOBAL_DATA_PTR;
  41. struct exynos4_gpio_part1 *gpio1;
  42. struct exynos4_gpio_part2 *gpio2;
  43. unsigned int board_rev;
  44. u32 get_board_rev(void)
  45. {
  46. return board_rev;
  47. }
  48. static int get_hwrev(void)
  49. {
  50. return board_rev & 0xFF;
  51. }
  52. static void init_pmic_lcd(void);
  53. int power_init_board(void)
  54. {
  55. int ret;
  56. ret = pmic_init(I2C_5);
  57. if (ret)
  58. return ret;
  59. init_pmic_lcd();
  60. return 0;
  61. }
  62. int dram_init(void)
  63. {
  64. gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
  65. get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
  66. return 0;
  67. }
  68. void dram_init_banksize(void)
  69. {
  70. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  71. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  72. gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
  73. gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  74. }
  75. static unsigned short get_adc_value(int channel)
  76. {
  77. struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
  78. unsigned short ret = 0;
  79. unsigned int reg;
  80. unsigned int loop = 0;
  81. writel(channel & 0xF, &adc->adcmux);
  82. writel((1 << 14) | (49 << 6), &adc->adccon);
  83. writel(1000 & 0xffff, &adc->adcdly);
  84. writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
  85. udelay(10);
  86. writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
  87. udelay(10);
  88. do {
  89. udelay(1);
  90. reg = readl(&adc->adccon);
  91. } while (!(reg & (1 << 15)) && (loop++ < 1000));
  92. ret = readl(&adc->adcdat0) & 0xFFF;
  93. return ret;
  94. }
  95. static int adc_power_control(int on)
  96. {
  97. int ret;
  98. struct pmic *p = pmic_get("MAX8998_PMIC");
  99. if (!p)
  100. return -ENODEV;
  101. if (pmic_probe(p))
  102. return -1;
  103. ret = pmic_set_output(p,
  104. MAX8998_REG_ONOFF1,
  105. MAX8998_LDO4, !!on);
  106. return ret;
  107. }
  108. static unsigned int get_hw_revision(void)
  109. {
  110. int hwrev, mode0, mode1;
  111. adc_power_control(1);
  112. mode0 = get_adc_value(1); /* HWREV_MODE0 */
  113. mode1 = get_adc_value(2); /* HWREV_MODE1 */
  114. /*
  115. * XXX Always set the default hwrev as the latest board
  116. * ADC = (voltage) / 3.3 * 4096
  117. */
  118. hwrev = 3;
  119. #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
  120. if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
  121. hwrev = 0x0; /* 0.01V 0.01V */
  122. if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
  123. hwrev = 0x1; /* 610mV 0.01V */
  124. if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
  125. hwrev = 0x2; /* 1.16V 0.01V */
  126. if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
  127. hwrev = 0x3; /* 1.79V 0.01V */
  128. #undef IS_RANGE
  129. debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
  130. adc_power_control(0);
  131. return hwrev;
  132. }
  133. static void check_hw_revision(void)
  134. {
  135. int hwrev;
  136. hwrev = get_hw_revision();
  137. board_rev |= hwrev;
  138. }
  139. #ifdef CONFIG_DISPLAY_BOARDINFO
  140. int checkboard(void)
  141. {
  142. puts("Board:\tUniversal C210\n");
  143. return 0;
  144. }
  145. #endif
  146. #ifdef CONFIG_GENERIC_MMC
  147. int board_mmc_init(bd_t *bis)
  148. {
  149. int err;
  150. switch (get_hwrev()) {
  151. case 0:
  152. /*
  153. * Set the low to enable LDO_EN
  154. * But when you use the test board for eMMC booting
  155. * you should set it HIGH since it removes the inverter
  156. */
  157. /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
  158. s5p_gpio_direction_output(&gpio1->e3, 6, 0);
  159. break;
  160. default:
  161. /*
  162. * Default reset state is High and there's no inverter
  163. * But set it as HIGH to ensure
  164. */
  165. /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
  166. s5p_gpio_direction_output(&gpio1->e1, 3, 1);
  167. break;
  168. }
  169. /*
  170. * MMC device init
  171. * mmc0 : eMMC (8-bit buswidth)
  172. * mmc2 : SD card (4-bit buswidth)
  173. */
  174. err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
  175. if (err)
  176. debug("SDMMC0 not configured\n");
  177. else
  178. err = s5p_mmc_init(0, 8);
  179. /* T-flash detect */
  180. s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
  181. s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
  182. /*
  183. * Check the T-flash detect pin
  184. * GPX3[4] T-flash detect pin
  185. */
  186. if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
  187. err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
  188. if (err)
  189. debug("SDMMC2 not configured\n");
  190. else
  191. err = s5p_mmc_init(2, 4);
  192. }
  193. return err;
  194. }
  195. #endif
  196. #ifdef CONFIG_USB_GADGET
  197. static int s5pc210_phy_control(int on)
  198. {
  199. int ret = 0;
  200. struct pmic *p = pmic_get("MAX8998_PMIC");
  201. if (!p)
  202. return -ENODEV;
  203. if (pmic_probe(p))
  204. return -1;
  205. if (on) {
  206. ret |= pmic_set_output(p,
  207. MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
  208. MAX8998_SAFEOUT1, LDO_ON);
  209. ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
  210. MAX8998_LDO3, LDO_ON);
  211. ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
  212. MAX8998_LDO8, LDO_ON);
  213. } else {
  214. ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
  215. MAX8998_LDO8, LDO_OFF);
  216. ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
  217. MAX8998_LDO3, LDO_OFF);
  218. ret |= pmic_set_output(p,
  219. MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
  220. MAX8998_SAFEOUT1, LDO_OFF);
  221. }
  222. if (ret) {
  223. puts("MAX8998 LDO setting error!\n");
  224. return -1;
  225. }
  226. return 0;
  227. }
  228. struct s3c_plat_otg_data s5pc210_otg_data = {
  229. .phy_control = s5pc210_phy_control,
  230. .regs_phy = EXYNOS4_USBPHY_BASE,
  231. .regs_otg = EXYNOS4_USBOTG_BASE,
  232. .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
  233. .usb_flags = PHY0_SLEEP,
  234. };
  235. #endif
  236. int board_early_init_f(void)
  237. {
  238. wdt_stop();
  239. return 0;
  240. }
  241. #ifdef CONFIG_SOFT_SPI
  242. static void soft_spi_init(void)
  243. {
  244. gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
  245. CONFIG_SOFT_SPI_MODE & SPI_CPOL);
  246. gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
  247. gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
  248. gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
  249. !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
  250. }
  251. void spi_cs_activate(struct spi_slave *slave)
  252. {
  253. gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
  254. !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
  255. SPI_SCL(1);
  256. gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
  257. CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
  258. }
  259. void spi_cs_deactivate(struct spi_slave *slave)
  260. {
  261. gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
  262. !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
  263. }
  264. int spi_cs_is_valid(unsigned int bus, unsigned int cs)
  265. {
  266. return bus == 0 && cs == 0;
  267. }
  268. void universal_spi_scl(int bit)
  269. {
  270. gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
  271. }
  272. void universal_spi_sda(int bit)
  273. {
  274. gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
  275. }
  276. int universal_spi_read(void)
  277. {
  278. return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
  279. }
  280. #endif
  281. static void init_pmic_lcd(void)
  282. {
  283. unsigned char val;
  284. int ret = 0;
  285. struct pmic *p = pmic_get("MAX8998_PMIC");
  286. if (!p)
  287. return;
  288. if (pmic_probe(p))
  289. return;
  290. /* LDO7 1.8V */
  291. val = 0x02; /* (1800 - 1600) / 100; */
  292. ret |= pmic_reg_write(p, MAX8998_REG_LDO7, val);
  293. /* LDO17 3.0V */
  294. val = 0xe; /* (3000 - 1600) / 100; */
  295. ret |= pmic_reg_write(p, MAX8998_REG_LDO17, val);
  296. /* Disable unneeded regulators */
  297. /*
  298. * ONOFF1
  299. * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
  300. * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
  301. */
  302. val = 0xB9;
  303. ret |= pmic_reg_write(p, MAX8998_REG_ONOFF1, val);
  304. /* ONOFF2
  305. * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
  306. * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
  307. */
  308. val = 0x50;
  309. ret |= pmic_reg_write(p, MAX8998_REG_ONOFF2, val);
  310. /* ONOFF3
  311. * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
  312. * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
  313. */
  314. val = 0x00;
  315. ret |= pmic_reg_write(p, MAX8998_REG_ONOFF3, val);
  316. if (ret)
  317. puts("LCD pmic initialisation error!\n");
  318. }
  319. static void lcd_cfg_gpio(void)
  320. {
  321. unsigned int i, f3_end = 4;
  322. for (i = 0; i < 8; i++) {
  323. /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
  324. s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2));
  325. s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2));
  326. s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2));
  327. /* pull-up/down disable */
  328. s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE);
  329. s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE);
  330. s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE);
  331. /* drive strength to max (24bit) */
  332. s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X);
  333. s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
  334. s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X);
  335. s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW);
  336. s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X);
  337. s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
  338. }
  339. for (i = 0; i < f3_end; i++) {
  340. /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
  341. s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2));
  342. /* pull-up/down disable */
  343. s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE);
  344. /* drive strength to max (24bit) */
  345. s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X);
  346. s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW);
  347. }
  348. /* gpio pad configuration for LCD reset. */
  349. s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT);
  350. spi_init();
  351. }
  352. static void reset_lcd(void)
  353. {
  354. s5p_gpio_set_value(&gpio2->y4, 5, 1);
  355. udelay(10000);
  356. s5p_gpio_set_value(&gpio2->y4, 5, 0);
  357. udelay(10000);
  358. s5p_gpio_set_value(&gpio2->y4, 5, 1);
  359. udelay(100);
  360. }
  361. static void lcd_power_on(void)
  362. {
  363. struct pmic *p = pmic_get("MAX8998_PMIC");
  364. if (!p)
  365. return;
  366. if (pmic_probe(p))
  367. return;
  368. pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
  369. pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
  370. }
  371. vidinfo_t panel_info = {
  372. .vl_freq = 60,
  373. .vl_col = 480,
  374. .vl_row = 800,
  375. .vl_width = 480,
  376. .vl_height = 800,
  377. .vl_clkp = CONFIG_SYS_HIGH,
  378. .vl_hsp = CONFIG_SYS_HIGH,
  379. .vl_vsp = CONFIG_SYS_HIGH,
  380. .vl_dp = CONFIG_SYS_HIGH,
  381. .vl_bpix = 5, /* Bits per pixel */
  382. /* LD9040 LCD Panel */
  383. .vl_hspw = 2,
  384. .vl_hbpd = 16,
  385. .vl_hfpd = 16,
  386. .vl_vspw = 2,
  387. .vl_vbpd = 8,
  388. .vl_vfpd = 8,
  389. .vl_cmd_allow_len = 0xf,
  390. .win_id = 0,
  391. .cfg_gpio = lcd_cfg_gpio,
  392. .backlight_on = NULL,
  393. .lcd_power_on = lcd_power_on,
  394. .reset_lcd = reset_lcd,
  395. .dual_lcd_enabled = 0,
  396. .init_delay = 0,
  397. .power_on_delay = 10000,
  398. .reset_delay = 10000,
  399. .interface_mode = FIMD_RGB_INTERFACE,
  400. .mipi_enabled = 0,
  401. };
  402. void init_panel_info(vidinfo_t *vid)
  403. {
  404. vid->logo_on = 1;
  405. vid->resolution = HD_RESOLUTION;
  406. vid->rgb_mode = MODE_RGB_P;
  407. #ifdef CONFIG_TIZEN
  408. get_tizen_logo_info(vid);
  409. #endif
  410. /* for LD9040. */
  411. vid->pclk_name = 1; /* MPLL */
  412. vid->sclk_div = 1;
  413. vid->cfg_ldo = ld9040_cfg_ldo;
  414. vid->enable_ldo = ld9040_enable_ldo;
  415. setenv("lcdinfo", "lcd=ld9040");
  416. }
  417. int board_init(void)
  418. {
  419. gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
  420. gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
  421. gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
  422. gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
  423. #ifdef CONFIG_SOFT_SPI
  424. soft_spi_init();
  425. #endif
  426. check_hw_revision();
  427. printf("HW Revision:\t0x%x\n", board_rev);
  428. return 0;
  429. }