integratorcp.c 6.4 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
  8. *
  9. * (C) Copyright 2003
  10. * Texas Instruments, <www.ti.com>
  11. * Kshitij Gupta <Kshitij@ti.com>
  12. *
  13. * (C) Copyright 2004
  14. * ARM Ltd.
  15. * Philippe Robin, <philippe.robin@arm.com>
  16. *
  17. * See file CREDITS for list of people who contributed to this
  18. * project.
  19. *
  20. * This program is free software; you can redistribute it and/or
  21. * modify it under the terms of the GNU General Public License as
  22. * published by the Free Software Foundation; either version 2 of
  23. * the License, or (at your option) any later version.
  24. *
  25. * This program is distributed in the hope that it will be useful,
  26. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  28. * GNU General Public License for more details.
  29. *
  30. * You should have received a copy of the GNU General Public License
  31. * along with this program; if not, write to the Free Software
  32. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  33. * MA 02111-1307 USA
  34. */
  35. #include <common.h>
  36. DECLARE_GLOBAL_DATA_PTR;
  37. void flash__init (void);
  38. void ether__init (void);
  39. void peripheral_power_enable (void);
  40. #if defined(CONFIG_SHOW_BOOT_PROGRESS)
  41. void show_boot_progress(int progress)
  42. {
  43. printf("Boot reached stage %d\n", progress);
  44. }
  45. #endif
  46. #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
  47. /*
  48. * Miscellaneous platform dependent initialisations
  49. */
  50. int board_init (void)
  51. {
  52. /* arch number of Integrator Board */
  53. gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
  54. /* adress of boot parameters */
  55. gd->bd->bi_boot_params = 0x00000100;
  56. gd->flags = 0;
  57. #ifdef CONFIG_CM_REMAP
  58. extern void cm_remap(void);
  59. cm_remap(); /* remaps writeable memory to 0x00000000 */
  60. #endif
  61. icache_enable ();
  62. flash__init ();
  63. ether__init ();
  64. return 0;
  65. }
  66. int misc_init_r (void)
  67. {
  68. setenv("verify", "n");
  69. return (0);
  70. }
  71. /******************************
  72. Routine:
  73. Description:
  74. ******************************/
  75. void flash__init (void)
  76. {
  77. }
  78. /*************************************************************
  79. Routine:ether__init
  80. Description: take the Ethernet controller out of reset and wait
  81. for the EEPROM load to complete.
  82. *************************************************************/
  83. void ether__init (void)
  84. {
  85. }
  86. /******************************
  87. Routine:
  88. Description:
  89. ******************************/
  90. int dram_init (void)
  91. {
  92. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  93. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  94. #ifdef CONFIG_CM_SPD_DETECT
  95. {
  96. extern void dram_query(void);
  97. unsigned long cm_reg_sdram;
  98. unsigned long sdram_shift;
  99. dram_query(); /* Assembler accesses to CM registers */
  100. /* Queries the SPD values */
  101. /* Obtain the SDRAM size from the CM SDRAM register */
  102. cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
  103. /* Register SDRAM size
  104. *
  105. * 0xXXXXXXbbb000bb 16 MB
  106. * 0xXXXXXXbbb001bb 32 MB
  107. * 0xXXXXXXbbb010bb 64 MB
  108. * 0xXXXXXXbbb011bb 128 MB
  109. * 0xXXXXXXbbb100bb 256 MB
  110. *
  111. */
  112. sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
  113. gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
  114. }
  115. #endif /* CM_SPD_DETECT */
  116. return 0;
  117. }
  118. /* The Integrator/CP timer1 is clocked at 1MHz
  119. * can be divided by 16 or 256
  120. * and can be set up as a 32-bit timer
  121. */
  122. /* U-Boot expects a 32 bit timer, running at CFG_HZ */
  123. /* Keep total timer count to avoid losing decrements < div_timer */
  124. static unsigned long long total_count = 0;
  125. static unsigned long long lastdec; /* Timer reading at last call */
  126. static unsigned long long div_clock = 1; /* Divisor applied to timer clock */
  127. static unsigned long long div_timer = 1; /* Divisor to convert timer reading
  128. * change to U-Boot ticks
  129. */
  130. /* CFG_HZ = CFG_HZ_CLOCK/(div_clock * div_timer) */
  131. static ulong timestamp; /* U-Boot ticks since startup */
  132. #define TIMER_LOAD_VAL ((ulong)0xFFFFFFFF)
  133. #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
  134. /* all function return values in U-Boot ticks i.e. (1/CFG_HZ) sec
  135. * - unless otherwise stated
  136. */
  137. /* starts up a counter
  138. * - the Integrator/CP timer can be set up to issue an interrupt */
  139. int interrupt_init (void)
  140. {
  141. /* Load timer with initial value */
  142. *(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
  143. /* Set timer to be
  144. * enabled 1
  145. * periodic 1
  146. * no interrupts 0
  147. * X 0
  148. * divider 1 00 == less rounding error
  149. * 32 bit 1
  150. * wrapping 0
  151. */
  152. *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x000000C2;
  153. /* init the timestamp */
  154. total_count = 0ULL;
  155. reset_timer_masked();
  156. div_timer = (unsigned long long)(CFG_HZ_CLOCK / CFG_HZ);
  157. div_timer /= div_clock;
  158. return (0);
  159. }
  160. /*
  161. * timer without interrupts
  162. */
  163. void reset_timer (void)
  164. {
  165. reset_timer_masked ();
  166. }
  167. ulong get_timer (ulong base_ticks)
  168. {
  169. return get_timer_masked () - base_ticks;
  170. }
  171. void set_timer (ulong ticks)
  172. {
  173. timestamp = ticks;
  174. total_count = (unsigned long long)ticks * div_timer;
  175. }
  176. /* delay usec useconds */
  177. void udelay (unsigned long usec)
  178. {
  179. ulong tmo, tmp;
  180. /* Convert to U-Boot ticks */
  181. tmo = usec * CFG_HZ;
  182. tmo /= (1000000L);
  183. tmp = get_timer_masked(); /* get current timestamp */
  184. tmo += tmp; /* form target timestamp */
  185. while (get_timer_masked () < tmo) {/* loop till event */
  186. /*NOP*/;
  187. }
  188. }
  189. void reset_timer_masked (void)
  190. {
  191. /* capure current decrementer value */
  192. lastdec = (unsigned long long)READ_TIMER;
  193. /* start "advancing" time stamp from 0 */
  194. timestamp = 0L;
  195. }
  196. /* converts the timer reading to U-Boot ticks */
  197. /* the timestamp is the number of ticks since reset */
  198. ulong get_timer_masked (void)
  199. {
  200. /* get current count */
  201. unsigned long long now = (unsigned long long)READ_TIMER;
  202. if(now > lastdec) {
  203. /* Must have wrapped */
  204. total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
  205. } else {
  206. total_count += lastdec - now;
  207. }
  208. lastdec = now;
  209. timestamp = (ulong)(total_count/div_timer);
  210. return timestamp;
  211. }
  212. /* waits specified delay value and resets timestamp */
  213. void udelay_masked (unsigned long usec)
  214. {
  215. udelay(usec);
  216. }
  217. /*
  218. * This function is derived from PowerPC code (read timebase as long long).
  219. * On ARM it just returns the timer value.
  220. */
  221. unsigned long long get_ticks(void)
  222. {
  223. return (unsigned long long)get_timer(0);
  224. }
  225. /*
  226. * Return the timebase clock frequency
  227. * i.e. how often the timer decrements
  228. */
  229. ulong get_tbclk (void)
  230. {
  231. return (ulong)(((unsigned long long)CFG_HZ_CLOCK)/div_clock);
  232. }