at91rm9200dk.c 4.1 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <common.h>
  25. #include <asm/arch/AT91RM9200.h>
  26. #include <at91rm9200_net.h>
  27. #include <dm9161.h>
  28. DECLARE_GLOBAL_DATA_PTR;
  29. /* ------------------------------------------------------------------------- */
  30. /*
  31. * Miscelaneous platform dependent initialisations
  32. */
  33. int board_init (void)
  34. {
  35. /* Enable Ctrlc */
  36. console_init_f ();
  37. /* Correct IRDA resistor problem */
  38. /* Set PA23_TXD in Output */
  39. ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2;
  40. /* memory and cpu-speed are setup before relocation */
  41. /* so we do _nothing_ here */
  42. /* arch number of AT91RM9200DK-Board */
  43. gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200;
  44. /* adress of boot parameters */
  45. gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
  46. return 0;
  47. }
  48. int dram_init (void)
  49. {
  50. gd->bd->bi_dram[0].start = PHYS_SDRAM;
  51. gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
  52. return 0;
  53. }
  54. #ifdef CONFIG_DRIVER_ETHER
  55. #if (CONFIG_COMMANDS & CFG_CMD_NET)
  56. /*
  57. * Name:
  58. * at91rm9200_GetPhyInterface
  59. * Description:
  60. * Initialise the interface functions to the PHY
  61. * Arguments:
  62. * None
  63. * Return value:
  64. * None
  65. */
  66. void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
  67. {
  68. p_phyops->Init = dm9161_InitPhy;
  69. p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
  70. p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
  71. p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
  72. }
  73. #endif /* CONFIG_COMMANDS & CFG_CMD_NET */
  74. #endif /* CONFIG_DRIVER_ETHER */
  75. /*
  76. * Disk On Chip (NAND) Millenium initialization.
  77. * The NAND lives in the CS2* space
  78. */
  79. #if (CONFIG_COMMANDS & CFG_CMD_NAND)
  80. extern ulong nand_probe (ulong physadr);
  81. #define AT91_SMARTMEDIA_BASE 0x40000000 /* physical address to access memory on NCS3 */
  82. void nand_init (void)
  83. {
  84. /* Setup Smart Media, fitst enable the address range of CS3 */
  85. *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
  86. /* set the bus interface characteristics based on
  87. tDS Data Set up Time 30 - ns
  88. tDH Data Hold Time 20 - ns
  89. tALS ALE Set up Time 20 - ns
  90. 16ns at 60 MHz ~= 3 */
  91. /*memory mapping structures */
  92. #define SM_ID_RWH (5 << 28)
  93. #define SM_RWH (1 << 28)
  94. #define SM_RWS (0 << 24)
  95. #define SM_TDF (1 << 8)
  96. #define SM_NWS (3)
  97. AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
  98. AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
  99. SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
  100. /* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
  101. *AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
  102. AT91C_PC3_BFBAA_SMWE;
  103. *AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
  104. AT91C_PC3_BFBAA_SMWE;
  105. /* Configure PC2 as input (signal READY of the SmartMedia) */
  106. *AT91C_PIOC_PER = AT91C_PC2_BFAVD; /* enable direct output enable */
  107. *AT91C_PIOC_ODR = AT91C_PC2_BFAVD; /* disable output */
  108. /* Configure PB1 as input (signal Card Detect of the SmartMedia) */
  109. *AT91C_PIOB_PER = AT91C_PIO_PB1; /* enable direct output enable */
  110. *AT91C_PIOB_ODR = AT91C_PIO_PB1; /* disable output */
  111. /* PIOB and PIOC clock enabling */
  112. *AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
  113. *AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
  114. if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
  115. printf (" No SmartMedia card inserted\n");
  116. #ifdef DEBUG
  117. printf (" SmartMedia card inserted\n");
  118. printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
  119. #endif
  120. printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
  121. }
  122. #endif