hawkboard_nand_spl.c 3.4 KB

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  1. /*
  2. * Modified for Hawkboard - Syed Mohammed Khasim <khasim@beagleboard.org>
  3. *
  4. * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com>
  5. * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  6. * Copyright (C) 2004 Texas Instruments.
  7. *
  8. * ----------------------------------------------------------------------------
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. * ----------------------------------------------------------------------------
  23. */
  24. #include <common.h>
  25. #include <asm/errno.h>
  26. #include <asm/arch/hardware.h>
  27. #include <asm/io.h>
  28. #include <asm/arch/davinci_misc.h>
  29. #include <asm/arch/pinmux_defs.h>
  30. #include <ns16550.h>
  31. #include <nand.h>
  32. DECLARE_GLOBAL_DATA_PTR;
  33. static const struct pinmux_resource pinmuxes[] = {
  34. PINMUX_ITEM(emac_pins_mii),
  35. PINMUX_ITEM(emac_pins_mdio),
  36. PINMUX_ITEM(emifa_pins_cs3),
  37. PINMUX_ITEM(emifa_pins_cs4),
  38. PINMUX_ITEM(emifa_pins_nand),
  39. PINMUX_ITEM(uart2_pins_txrx),
  40. PINMUX_ITEM(uart2_pins_rtscts),
  41. };
  42. static const struct lpsc_resource lpsc[] = {
  43. { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
  44. { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
  45. { DAVINCI_LPSC_EMAC }, /* image download */
  46. { DAVINCI_LPSC_UART2 }, /* console */
  47. { DAVINCI_LPSC_GPIO },
  48. };
  49. void board_init_f(ulong bootflag)
  50. {
  51. /*
  52. * Kick Registers need to be set to allow access to Pin Mux registers
  53. */
  54. writel(DV_SYSCFG_KICK0_UNLOCK, &davinci_syscfg_regs->kick0);
  55. writel(DV_SYSCFG_KICK1_UNLOCK, &davinci_syscfg_regs->kick1);
  56. /* setup the SUSPSRC for ARM to control emulation suspend */
  57. writel(readl(&davinci_syscfg_regs->suspsrc) &
  58. ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
  59. DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
  60. DAVINCI_SYSCFG_SUSPSRC_UART2), &davinci_syscfg_regs->suspsrc);
  61. /* Power on required peripherals
  62. * ARM does not have acess by default to PSC0 and PSC1
  63. * assuming here that the DSP bootloader has set the IOPU
  64. * such that PSC access is available to ARM
  65. */
  66. da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc));
  67. /* configure pinmux settings */
  68. davinci_configure_pin_mux_items(pinmuxes,
  69. ARRAY_SIZE(pinmuxes));
  70. writel(readl(&davinci_uart2_ctrl_regs->pwremu_mgmt) |
  71. (DAVINCI_UART_PWREMU_MGMT_FREE) |
  72. (DAVINCI_UART_PWREMU_MGMT_URRST) |
  73. (DAVINCI_UART_PWREMU_MGMT_UTRST),
  74. &davinci_uart2_ctrl_regs->pwremu_mgmt);
  75. NS16550_init((NS16550_t)(DAVINCI_UART2_BASE),
  76. CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
  77. puts("Nand boot...\n");
  78. nand_boot();
  79. }
  80. void puts(const char *str)
  81. {
  82. while (*str)
  83. putc(*str++);
  84. }
  85. void putc(char c)
  86. {
  87. if (gd->flags & GD_FLG_SILENT)
  88. return;
  89. if (c == '\n')
  90. NS16550_putc((NS16550_t)(DAVINCI_UART2_BASE), '\r');
  91. NS16550_putc((NS16550_t)(DAVINCI_UART2_BASE), c);
  92. }
  93. void hang(void)
  94. {
  95. puts("### ERROR ### Please RESET the board ###\n");
  96. for (;;)
  97. ;
  98. }