fsl_i2c.c 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241
  1. /*
  2. * Copyright 2006 Freescale Semiconductor, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * Version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program; if not, write to the Free Software
  15. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  16. * MA 02111-1307 USA
  17. */
  18. #include <common.h>
  19. #ifdef CONFIG_FSL_I2C
  20. #ifdef CONFIG_HARD_I2C
  21. #include <command.h>
  22. #include <i2c.h> /* Functional interface */
  23. #include <asm/io.h>
  24. #include <asm/fsl_i2c.h> /* HW definitions */
  25. #define I2C_TIMEOUT (CFG_HZ / 4)
  26. #define I2C ((struct fsl_i2c *)(CFG_IMMR + CFG_I2C_OFFSET))
  27. void
  28. i2c_init(int speed, int slaveadd)
  29. {
  30. /* stop I2C controller */
  31. writeb(0x0, &I2C->cr);
  32. /* set clock */
  33. writeb(0x3f, &I2C->fdr);
  34. /* set default filter */
  35. writeb(0x10, &I2C->dfsrr);
  36. /* write slave address */
  37. writeb(slaveadd, &I2C->adr);
  38. /* clear status register */
  39. writeb(0x0, &I2C->sr);
  40. /* start I2C controller */
  41. writeb(I2C_CR_MEN, &I2C->cr);
  42. }
  43. static __inline__ int
  44. i2c_wait4bus(void)
  45. {
  46. ulong timeval = get_timer(0);
  47. while (readb(&I2C->sr) & I2C_SR_MBB) {
  48. if (get_timer(timeval) > I2C_TIMEOUT) {
  49. return -1;
  50. }
  51. }
  52. return 0;
  53. }
  54. static __inline__ int
  55. i2c_wait(int write)
  56. {
  57. u32 csr;
  58. ulong timeval = get_timer(0);
  59. do {
  60. csr = readb(&I2C->sr);
  61. if (!(csr & I2C_SR_MIF))
  62. continue;
  63. writeb(0x0, &I2C->sr);
  64. if (csr & I2C_SR_MAL) {
  65. debug("i2c_wait: MAL\n");
  66. return -1;
  67. }
  68. if (!(csr & I2C_SR_MCF)) {
  69. debug("i2c_wait: unfinished\n");
  70. return -1;
  71. }
  72. if (write == I2C_WRITE && (csr & I2C_SR_RXAK)) {
  73. debug("i2c_wait: No RXACK\n");
  74. return -1;
  75. }
  76. return 0;
  77. } while (get_timer (timeval) < I2C_TIMEOUT);
  78. debug("i2c_wait: timed out\n");
  79. return -1;
  80. }
  81. static __inline__ int
  82. i2c_write_addr (u8 dev, u8 dir, int rsta)
  83. {
  84. writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX
  85. | (rsta ? I2C_CR_RSTA : 0),
  86. &I2C->cr);
  87. writeb((dev << 1) | dir, &I2C->dr);
  88. if (i2c_wait(I2C_WRITE) < 0)
  89. return 0;
  90. return 1;
  91. }
  92. static __inline__ int
  93. __i2c_write(u8 *data, int length)
  94. {
  95. int i;
  96. writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX,
  97. &I2C->cr);
  98. for (i = 0; i < length; i++) {
  99. writeb(data[i], &I2C->dr);
  100. if (i2c_wait(I2C_WRITE) < 0)
  101. break;
  102. }
  103. return i;
  104. }
  105. static __inline__ int
  106. __i2c_read(u8 *data, int length)
  107. {
  108. int i;
  109. writeb(I2C_CR_MEN | I2C_CR_MSTA | ((length == 1) ? I2C_CR_TXAK : 0),
  110. &I2C->cr);
  111. /* dummy read */
  112. readb(&I2C->dr);
  113. for (i = 0; i < length; i++) {
  114. if (i2c_wait(I2C_READ) < 0)
  115. break;
  116. /* Generate ack on last next to last byte */
  117. if (i == length - 2)
  118. writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_TXAK,
  119. &I2C->cr);
  120. /* Generate stop on last byte */
  121. if (i == length - 1)
  122. writeb(I2C_CR_MEN | I2C_CR_TXAK, &I2C->cr);
  123. data[i] = readb(&I2C->dr);
  124. }
  125. return i;
  126. }
  127. int
  128. i2c_read(u8 dev, uint addr, int alen, u8 *data, int length)
  129. {
  130. int i = 0;
  131. u8 *a = (u8*)&addr;
  132. if (i2c_wait4bus() >= 0
  133. && i2c_write_addr(dev, I2C_WRITE, 0) != 0
  134. && __i2c_write(&a[4 - alen], alen) == alen
  135. && i2c_write_addr(dev, I2C_READ, 1) != 0) {
  136. i = __i2c_read(data, length);
  137. }
  138. writeb(I2C_CR_MEN, &I2C->cr);
  139. if (i == length)
  140. return 0;
  141. return -1;
  142. }
  143. int
  144. i2c_write(u8 dev, uint addr, int alen, u8 *data, int length)
  145. {
  146. int i = 0;
  147. u8 *a = (u8*)&addr;
  148. if (i2c_wait4bus() >= 0
  149. && i2c_write_addr(dev, I2C_WRITE, 0) != 0
  150. && __i2c_write(&a[4 - alen], alen) == alen) {
  151. i = __i2c_write(data, length);
  152. }
  153. writeb(I2C_CR_MEN, &I2C->cr);
  154. if (i == length)
  155. return 0;
  156. return -1;
  157. }
  158. int
  159. i2c_probe(uchar chip)
  160. {
  161. int tmp;
  162. /*
  163. * Try to read the first location of the chip. The underlying
  164. * driver doesn't appear to support sending just the chip address
  165. * and looking for an <ACK> back.
  166. */
  167. udelay(10000);
  168. return i2c_read(chip, 0, 1, (uchar *)&tmp, 1);
  169. }
  170. uchar
  171. i2c_reg_read(uchar i2c_addr, uchar reg)
  172. {
  173. uchar buf[1];
  174. i2c_read(i2c_addr, reg, 1, buf, 1);
  175. return buf[0];
  176. }
  177. void
  178. i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
  179. {
  180. i2c_write(i2c_addr, reg, 1, &val, 1);
  181. }
  182. #endif /* CONFIG_HARD_I2C */
  183. #endif /* CONFIG_FSL_I2C */