seaboard.c 3.3 KB

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  1. /*
  2. * (C) Copyright 2010,2011
  3. * NVIDIA Corporation <www.nvidia.com>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/io.h>
  25. #include <asm/arch/tegra2.h>
  26. #include <asm/arch/pinmux.h>
  27. #include <asm/gpio.h>
  28. #ifdef CONFIG_TEGRA2_MMC
  29. #include <mmc.h>
  30. #endif
  31. #include "../common/board.h"
  32. /*
  33. * Routine: gpio_config_uart_seaboard
  34. * Description: Force GPIO_PI3 low on Seaboard so UART4 works.
  35. */
  36. static void gpio_config_uart_seaboard(void)
  37. {
  38. int gp = GPIO_PI3;
  39. struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
  40. struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
  41. u32 val;
  42. /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */
  43. val = readl(&bank->gpio_config[GPIO_PORT(gp)]);
  44. val |= 1 << GPIO_BIT(gp);
  45. writel(val, &bank->gpio_config[GPIO_PORT(gp)]);
  46. val = readl(&bank->gpio_out[GPIO_PORT(gp)]);
  47. val &= ~(1 << GPIO_BIT(gp));
  48. writel(val, &bank->gpio_out[GPIO_PORT(gp)]);
  49. val = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
  50. val |= 1 << GPIO_BIT(gp);
  51. writel(val, &bank->gpio_dir_out[GPIO_PORT(gp)]);
  52. }
  53. void gpio_config_uart(void)
  54. {
  55. if (machine_is_ventana())
  56. return;
  57. gpio_config_uart_seaboard();
  58. }
  59. #ifdef CONFIG_TEGRA2_MMC
  60. /*
  61. * Routine: pin_mux_mmc
  62. * Description: setup the pin muxes/tristate values for the SDMMC(s)
  63. */
  64. static void pin_mux_mmc(void)
  65. {
  66. /* SDMMC4: config 3, x8 on 2nd set of pins */
  67. pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
  68. pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
  69. pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
  70. pinmux_tristate_disable(PINGRP_ATB);
  71. pinmux_tristate_disable(PINGRP_GMA);
  72. pinmux_tristate_disable(PINGRP_GME);
  73. /* SDMMC3: SDIO3_CLK, SDIO3_CMD, SDIO3_DAT[3:0] */
  74. pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
  75. pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3);
  76. pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3);
  77. pinmux_tristate_disable(PINGRP_SDC);
  78. pinmux_tristate_disable(PINGRP_SDD);
  79. pinmux_tristate_disable(PINGRP_SDB);
  80. /* For power GPIO PI6 */
  81. pinmux_tristate_disable(PINGRP_ATA);
  82. /* For CD GPIO PI5 */
  83. pinmux_tristate_disable(PINGRP_ATC);
  84. }
  85. /* this is a weak define that we are overriding */
  86. int board_mmc_init(bd_t *bd)
  87. {
  88. debug("board_mmc_init called\n");
  89. /* Enable muxes, etc. for SDMMC controllers */
  90. pin_mux_mmc();
  91. debug("board_mmc_init: init eMMC\n");
  92. /* init dev 0, eMMC chip, with 4-bit bus */
  93. /* The board has an 8-bit bus, but 8-bit doesn't work yet */
  94. tegra2_mmc_init(0, 4, -1, -1);
  95. debug("board_mmc_init: init SD slot\n");
  96. /* init dev 1, SD slot, with 4-bit bus */
  97. tegra2_mmc_init(1, 4, GPIO_PI6, GPIO_PI5);
  98. return 0;
  99. }
  100. #endif