blackfin_local.h 5.0 KB

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  1. /*
  2. * U-boot - blackfin_local.h
  3. *
  4. * Copyright (c) 2005-2007 Analog Devices Inc.
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22. * MA 02110-1301 USA
  23. */
  24. #ifndef __BLACKFIN_LOCAL_H__
  25. #define __BLACKFIN_LOCAL_H__
  26. #define LO(con32) ((con32) & 0xFFFF)
  27. #define lo(con32) ((con32) & 0xFFFF)
  28. #define HI(con32) (((con32) >> 16) & 0xFFFF)
  29. #define hi(con32) (((con32) >> 16) & 0xFFFF)
  30. #define OFFSET_(x) (x & 0x0000FFFF)
  31. #define MK_BMSK_(x) (1 << x)
  32. /* Ideally this should be USEC not MSEC, but the USEC multiplication
  33. * likes to overflow 32bit quantities which is all our assembler
  34. * currently supports ;(
  35. */
  36. #define USEC_PER_MSEC 1000
  37. #define MSEC_PER_SEC 1000
  38. #define BFIN_SCLK (100000000)
  39. #define SCLK_TO_MSEC(sclk) ((MSEC_PER_SEC * ((sclk) / USEC_PER_MSEC)) / (BFIN_SCLK / USEC_PER_MSEC))
  40. #define MSEC_TO_SCLK(msec) ((((BFIN_SCLK / USEC_PER_MSEC) * (msec)) / MSEC_PER_SEC) * USEC_PER_MSEC)
  41. #include <asm/linkage.h>
  42. #ifndef __ASSEMBLY__
  43. # ifdef SHARED_RESOURCES
  44. # include <asm/shared_resources.h>
  45. # endif
  46. # include <linux/types.h>
  47. extern u_long get_sclk(void);
  48. # define bfin_revid() (*pCHIPID >> 28)
  49. extern void blackfin_icache_flush_range(const void *, const void *);
  50. extern void blackfin_dcache_flush_range(const void *, const void *);
  51. extern void blackfin_dcache_invalidate_range(const void *, const void *);
  52. /* Use DMA to move data from on chip to external memory. While this is
  53. * required for only L1 instruction (it is not directly readable by the
  54. * core via data loads), it isn't a huge performance issue for other
  55. * regions (it's probably even faster than core load/stores). However,
  56. * the DMA engine does not have access to the L1 scratchpad, and we
  57. * cannot use DMA inside of the MMR space.
  58. */
  59. # define addr_bfin_on_chip_mem(addr) \
  60. (((unsigned long)(addr) >= 0xef000000 && (unsigned long)addr < SYSMMR_BASE) && \
  61. !((unsigned long)(addr) >= L1_SRAM_SCRATCH && \
  62. (unsigned long)(addr) < L1_SRAM_SCRATCH_END))
  63. # include <asm/system.h>
  64. #if ANOMALY_05000198
  65. # define NOP_PAD_ANOMALY_05000198 "nop;"
  66. #else
  67. # define NOP_PAD_ANOMALY_05000198
  68. #endif
  69. #define bfin_read8(addr) ({ \
  70. uint8_t __v; \
  71. __asm__ __volatile__( \
  72. NOP_PAD_ANOMALY_05000198 \
  73. "%0 = b[%1] (z);" \
  74. : "=d" (__v) \
  75. : "a" (addr) \
  76. ); \
  77. __v; })
  78. #define bfin_read16(addr) ({ \
  79. uint16_t __v; \
  80. __asm__ __volatile__( \
  81. NOP_PAD_ANOMALY_05000198 \
  82. "%0 = w[%1] (z);" \
  83. : "=d" (__v) \
  84. : "a" (addr) \
  85. ); \
  86. __v; })
  87. #define bfin_read32(addr) ({ \
  88. uint32_t __v; \
  89. __asm__ __volatile__( \
  90. NOP_PAD_ANOMALY_05000198 \
  91. "%0 = [%1];" \
  92. : "=d" (__v) \
  93. : "a" (addr) \
  94. ); \
  95. __v; })
  96. #define bfin_readPTR(addr) bfin_read32(addr)
  97. #define bfin_write8(addr, val) \
  98. __asm__ __volatile__( \
  99. NOP_PAD_ANOMALY_05000198 \
  100. "b[%0] = %1;" \
  101. : \
  102. : "a" (addr), "d" (val) \
  103. : "memory" \
  104. )
  105. #define bfin_write16(addr, val) \
  106. __asm__ __volatile__( \
  107. NOP_PAD_ANOMALY_05000198 \
  108. "w[%0] = %1;" \
  109. : \
  110. : "a" (addr), "d" (val) \
  111. : "memory" \
  112. )
  113. #define bfin_write32(addr, val) \
  114. __asm__ __volatile__( \
  115. NOP_PAD_ANOMALY_05000198 \
  116. "[%0] = %1;" \
  117. : \
  118. : "a" (addr), "d" (val) \
  119. : "memory" \
  120. )
  121. #define bfin_writePTR(addr, val) bfin_write32(addr, val)
  122. /* SSYNC implementation for C file */
  123. static inline void SSYNC(void)
  124. {
  125. int _tmp;
  126. if (ANOMALY_05000312)
  127. __asm__ __volatile__(
  128. "cli %0;"
  129. "nop;"
  130. "nop;"
  131. "ssync;"
  132. "sti %0;"
  133. : "=d" (_tmp)
  134. );
  135. else if (ANOMALY_05000244)
  136. __asm__ __volatile__(
  137. "nop;"
  138. "nop;"
  139. "nop;"
  140. "ssync;"
  141. );
  142. else
  143. __asm__ __volatile__("ssync;");
  144. }
  145. /* CSYNC implementation for C file */
  146. static inline void CSYNC(void)
  147. {
  148. int _tmp;
  149. if (ANOMALY_05000312)
  150. __asm__ __volatile__(
  151. "cli %0;"
  152. "nop;"
  153. "nop;"
  154. "csync;"
  155. "sti %0;"
  156. : "=d" (_tmp)
  157. );
  158. else if (ANOMALY_05000244)
  159. __asm__ __volatile__(
  160. "nop;"
  161. "nop;"
  162. "nop;"
  163. "csync;"
  164. );
  165. else
  166. __asm__ __volatile__("csync;");
  167. }
  168. #else /* __ASSEMBLY__ */
  169. /* SSYNC & CSYNC implementations for assembly files */
  170. #define ssync(x) SSYNC(x)
  171. #define csync(x) CSYNC(x)
  172. #if ANOMALY_05000312
  173. #define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch;
  174. #define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch;
  175. #elif ANOMALY_05000244
  176. #define SSYNC(scratch) nop; nop; nop; SSYNC;
  177. #define CSYNC(scratch) nop; nop; nop; CSYNC;
  178. #else
  179. #define SSYNC(scratch) SSYNC;
  180. #define CSYNC(scratch) CSYNC;
  181. #endif /* ANOMALY_05000312 & ANOMALY_05000244 handling */
  182. #endif /* __ASSEMBLY__ */
  183. #endif