top5200.c 6.4 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2003
  6. * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <common.h>
  27. #include <mpc5xxx.h>
  28. #include <pci.h>
  29. /*****************************************************************************
  30. * initialize SDRAM/DDRAM controller.
  31. * TBD: get data from I2C EEPROM
  32. *****************************************************************************/
  33. long int initdram (int board_type)
  34. {
  35. ulong dramsize = 0;
  36. #ifndef CFG_RAMBOOT
  37. #if 0
  38. ulong t;
  39. ulong tap_del;
  40. #endif
  41. #define MODE_EN 0x80000000
  42. #define SOFT_PRE 2
  43. #define SOFT_REF 4
  44. /* configure SDRAM start/end */
  45. *(vu_long *)MPC5XXX_SDRAM_CS0CFG = (CFG_SDRAM_BASE & 0xFFF00000) | CFG_DRAM_RAM_SIZE;
  46. *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
  47. /* setup config registers */
  48. *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = CFG_DRAM_CONFIG1;
  49. *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = CFG_DRAM_CONFIG2;
  50. /* unlock mode register */
  51. *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN;
  52. /* precharge all banks */
  53. *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_PRE;
  54. #if CFG_DRAM_DDR
  55. /* set extended mode register */
  56. *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_EMODE;
  57. #endif
  58. /* set mode register */
  59. *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_MODE | 0x0400;
  60. /* precharge all banks */
  61. *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_PRE;
  62. /* auto refresh */
  63. *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_REF;
  64. /* set mode register */
  65. *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_MODE;
  66. /* normal operation */
  67. *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL;
  68. /* write default TAP delay */
  69. *(vu_long *)MPC5XXX_CDM_PORCFG = CFG_DRAM_TAP_DEL << 24;
  70. #if 0
  71. for (tap_del = 0; tap_del < 32; tap_del++)
  72. {
  73. *(vu_long *)MPC5XXX_CDM_PORCFG = tap_del << 24;
  74. printf ("\nTAP Delay:%x Filling DRAM...", *(vu_long *)MPC5XXX_CDM_PORCFG);
  75. for (t = 0; t < 0x04000000; t+=4)
  76. *(vu_long *) t = t;
  77. printf ("Checking DRAM...\n");
  78. for (t = 0; t < 0x04000000; t+=4)
  79. {
  80. ulong rval = *(vu_long *) t;
  81. if (rval != t)
  82. {
  83. printf ("mismatch at %x: ", t);
  84. printf (" 1.read %x", rval);
  85. printf (" 2.read %x", *(vu_long *) t);
  86. printf (" 3.read %x", *(vu_long *) t);
  87. break;
  88. }
  89. }
  90. }
  91. #endif
  92. #endif /* CFG_RAMBOOT */
  93. dramsize = ((1 << (*(vu_long *)MPC5XXX_SDRAM_CS0CFG - 0x13)) << 20);
  94. /* return total ram size */
  95. return dramsize;
  96. }
  97. /*****************************************************************************
  98. * print board identification
  99. *****************************************************************************/
  100. int checkboard (void)
  101. {
  102. #if defined (CONFIG_EVAL5200)
  103. puts ("Board: EMK TOP5200 on EVAL5200\n");
  104. #else
  105. #if defined (CONFIG_MINI5200)
  106. puts ("Board: EMK TOP5200 on MINI5200\n");
  107. #else
  108. puts ("Board: EMK TOP5200\n");
  109. #endif
  110. #endif
  111. return 0;
  112. }
  113. /*****************************************************************************
  114. * prepare for FLASH detection
  115. *****************************************************************************/
  116. void flash_preinit(void)
  117. {
  118. /*
  119. * Now, when we are in RAM, enable flash write
  120. * access for detection process.
  121. * Note that CS_BOOT cannot be cleared when
  122. * executing in flash.
  123. */
  124. *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
  125. }
  126. /*****************************************************************************
  127. * finalize FLASH setup
  128. *****************************************************************************/
  129. void flash_afterinit(uint bank, ulong start, ulong size)
  130. {
  131. if (bank == 0) { /* adjust mapping */
  132. *(vu_long *)MPC5XXX_BOOTCS_START =
  133. *(vu_long *)MPC5XXX_CS0_START = START_REG(start);
  134. *(vu_long *)MPC5XXX_BOOTCS_STOP =
  135. *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(start, size);
  136. }
  137. }
  138. /*****************************************************************************
  139. * otherinits after RAM is there and we are relocated to RAM
  140. * note: though this is an int function, nobody cares for the result!
  141. *****************************************************************************/
  142. int misc_init_r (void)
  143. {
  144. /* read 'factory' part of EEPROM */
  145. uchar buf[81];
  146. uchar *p;
  147. uint length;
  148. uint addr;
  149. uint len;
  150. /* get length first */
  151. addr = CFG_FACT_OFFSET;
  152. if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, 2)) {
  153. bailout:
  154. printf ("cannot read factory configuration\n");
  155. printf ("be sure to set ethaddr yourself!\n");
  156. return 0;
  157. }
  158. length = buf[0] + (buf[1] << 8);
  159. addr += 2;
  160. /* sanity check */
  161. if (length < 20 || length > CFG_FACT_SIZE - 2)
  162. goto bailout;
  163. /* read lines */
  164. while (length > 0) {
  165. /* read one line */
  166. len = length > 80 ? 80 : length;
  167. if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, len))
  168. goto bailout;
  169. /* mark end of buffer */
  170. buf[len] = 0;
  171. /* search end of line */
  172. for (p = buf; *p && *p != 0x0a; p++);
  173. if (!*p)
  174. goto bailout;
  175. *p++ = 0;
  176. /* advance to next line start */
  177. length -= p - buf;
  178. addr += p - buf;
  179. /*printf ("%s\n", buf); */
  180. /* search for our specific entry */
  181. if (!strncmp ((char *) buf, "[RLA/lan/Ethernet] ", 19)) {
  182. setenv ("ethaddr", buf + 19);
  183. } else if (!strncmp ((char *) buf, "[BOARD/SERIAL] ", 15)) {
  184. setenv ("serial#", buf + 15);
  185. } else if (!strncmp ((char *) buf, "[BOARD/TYPE] ", 13)) {
  186. setenv ("board_id", buf + 13);
  187. }
  188. }
  189. return (0);
  190. }
  191. /*****************************************************************************
  192. * initialize the PCI system
  193. *****************************************************************************/
  194. #ifdef CONFIG_PCI
  195. static struct pci_controller hose;
  196. extern void pci_mpc5xxx_init(struct pci_controller *);
  197. void pci_init_board(void)
  198. {
  199. pci_mpc5xxx_init(&hose);
  200. }
  201. #endif