flash.c 12 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2003
  6. * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <common.h>
  27. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  28. typedef unsigned char FLASH_PORT_WIDTH;
  29. typedef volatile unsigned char FLASH_PORT_WIDTHV;
  30. #define FLASH_ID_MASK 0xFF
  31. #define FPW FLASH_PORT_WIDTH
  32. #define FPWV FLASH_PORT_WIDTHV
  33. #define FLASH_CYCLE1 0x0aaa
  34. #define FLASH_CYCLE2 0x0555
  35. /*-----------------------------------------------------------------------
  36. * Functions
  37. */
  38. static ulong flash_get_size(FPWV *addr, flash_info_t *info);
  39. static void flash_reset(flash_info_t *info);
  40. static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
  41. static flash_info_t *flash_get_info(ulong base);
  42. /*-----------------------------------------------------------------------
  43. * flash_init()
  44. *
  45. * sets up flash_info and returns size of FLASH (bytes)
  46. */
  47. unsigned long flash_init (void)
  48. {
  49. unsigned long size = 0;
  50. int i = 0;
  51. extern void flash_preinit(void);
  52. extern void flash_afterinit(uint, ulong, ulong);
  53. ulong flashbase = CFG_FLASH_BASE;
  54. flash_preinit();
  55. /* There is only ONE FLASH device */
  56. memset(&flash_info[i], 0, sizeof(flash_info_t));
  57. flash_info[i].size =
  58. flash_get_size((FPW *)flashbase, &flash_info[i]);
  59. size += flash_info[i].size;
  60. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  61. /* monitor protection ON by default */
  62. flash_protect(FLAG_PROTECT_SET,
  63. CFG_MONITOR_BASE,
  64. CFG_MONITOR_BASE+monitor_flash_len-1,
  65. flash_get_info(CFG_MONITOR_BASE));
  66. #endif
  67. #ifdef CFG_ENV_IS_IN_FLASH
  68. /* ENV protection ON by default */
  69. flash_protect(FLAG_PROTECT_SET,
  70. CFG_ENV_ADDR,
  71. CFG_ENV_ADDR+CFG_ENV_SIZE-1,
  72. flash_get_info(CFG_ENV_ADDR));
  73. #endif
  74. flash_afterinit(i, flash_info[i].start[0], flash_info[i].size);
  75. return size ? size : 1;
  76. }
  77. /*-----------------------------------------------------------------------
  78. */
  79. static void flash_reset(flash_info_t *info)
  80. {
  81. FPWV *base = (FPWV *)(info->start[0]);
  82. /* Put FLASH back in read mode */
  83. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
  84. *base = (FPW)0x00FF00FF; /* Intel Read Mode */
  85. else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
  86. *base = (FPW)0x00F000F0; /* AMD Read Mode */
  87. }
  88. /*-----------------------------------------------------------------------
  89. */
  90. static flash_info_t *flash_get_info(ulong base)
  91. {
  92. int i;
  93. flash_info_t * info;
  94. for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
  95. info = & flash_info[i];
  96. if (info->size &&
  97. info->start[0] <= base && base <= info->start[0] + info->size - 1)
  98. break;
  99. }
  100. return i == CFG_MAX_FLASH_BANKS ? 0 : info;
  101. }
  102. /*-----------------------------------------------------------------------
  103. */
  104. void flash_print_info (flash_info_t *info)
  105. {
  106. int i;
  107. uchar *boottype;
  108. uchar *bootletter;
  109. uchar *fmt;
  110. uchar botbootletter[] = "B";
  111. uchar topbootletter[] = "T";
  112. uchar botboottype[] = "bottom boot sector";
  113. uchar topboottype[] = "top boot sector";
  114. if (info->flash_id == FLASH_UNKNOWN) {
  115. printf ("missing or unknown FLASH type\n");
  116. return;
  117. }
  118. switch (info->flash_id & FLASH_VENDMASK) {
  119. case FLASH_MAN_AMD: printf ("AMD "); break;
  120. #if 0
  121. case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
  122. case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
  123. case FLASH_MAN_SST: printf ("SST "); break;
  124. case FLASH_MAN_STM: printf ("STM "); break;
  125. case FLASH_MAN_INTEL: printf ("INTEL "); break;
  126. #endif
  127. default: printf ("Unknown Vendor "); break;
  128. }
  129. /* check for top or bottom boot, if it applies */
  130. if (info->flash_id & FLASH_BTYPE) {
  131. boottype = botboottype;
  132. bootletter = botbootletter;
  133. }
  134. else {
  135. boottype = topboottype;
  136. bootletter = topbootletter;
  137. }
  138. switch (info->flash_id & FLASH_TYPEMASK) {
  139. case FLASH_AM160T:
  140. case FLASH_AM160B:
  141. fmt = "29LV160%s (16 Mbit, %s)\n";
  142. break;
  143. case FLASH_AMDLV065D:
  144. fmt = "29LV065 (64 Mbit, uniform sectors)\n";
  145. break;
  146. default:
  147. fmt = "Unknown Chip Type\n";
  148. break;
  149. }
  150. printf (fmt, bootletter, boottype);
  151. printf (" Size: %ld MB in %d Sectors\n",
  152. info->size >> 20,
  153. info->sector_count);
  154. printf (" Sector Start Addresses:");
  155. for (i=0; i<info->sector_count; ++i) {
  156. if ((i % 5) == 0) {
  157. printf ("\n ");
  158. }
  159. printf (" %08lX%s", info->start[i],
  160. info->protect[i] ? " (RO)" : " ");
  161. }
  162. printf ("\n");
  163. }
  164. /*-----------------------------------------------------------------------
  165. */
  166. /*
  167. * The following code cannot be run from FLASH!
  168. */
  169. ulong flash_get_size (FPWV *addr, flash_info_t *info)
  170. {
  171. int i;
  172. ulong offset;
  173. /* Write auto select command: read Manufacturer ID */
  174. /* Write auto select command sequence and test FLASH answer */
  175. addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
  176. addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
  177. addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
  178. /* The manufacturer codes are only 1 byte, so just use 1 byte.
  179. * This works for any bus width and any FLASH device width.
  180. */
  181. udelay(100);
  182. switch (addr[0] & 0xff) {
  183. case (uchar)AMD_MANUFACT:
  184. info->flash_id = FLASH_MAN_AMD;
  185. break;
  186. #if 0
  187. case (uchar)INTEL_MANUFACT:
  188. info->flash_id = FLASH_MAN_INTEL;
  189. break;
  190. #endif
  191. default:
  192. printf ("unknown vendor=%x ", addr[0] & 0xff);
  193. info->flash_id = FLASH_UNKNOWN;
  194. info->sector_count = 0;
  195. info->size = 0;
  196. break;
  197. }
  198. /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
  199. if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[2]) {
  200. case (FPW)AMD_ID_LV160B:
  201. info->flash_id += FLASH_AM160B;
  202. info->sector_count = 35;
  203. info->size = 0x00200000;
  204. #ifdef CFG_LOWBOOT
  205. offset = 0;
  206. #else
  207. offset = 0x00e00000;
  208. #endif
  209. info->start[0] = (ulong)addr + offset;
  210. info->start[1] = (ulong)addr + offset + 0x4000;
  211. info->start[2] = (ulong)addr + offset + 0x6000;
  212. info->start[3] = (ulong)addr + offset + 0x8000;
  213. for (i = 4; i < info->sector_count; i++)
  214. {
  215. info->start[i] = (ulong)addr + offset + 0x10000 * (i-3);
  216. }
  217. break;
  218. case (FPW)AMD_ID_LV065D:
  219. info->flash_id += FLASH_AMDLV065D;
  220. info->sector_count = 128;
  221. info->size = 0x00800000;
  222. #ifdef CFG_LOWBOOT
  223. offset = 0;
  224. #else
  225. offset = 0x00800000;
  226. #endif
  227. for( i = 0; i < info->sector_count; i++ )
  228. info->start[i] = (ulong)addr + offset + (i * 0x10000);
  229. break; /* => 8 or 16 MB */
  230. default:
  231. printf ("unknown AMD device=%x ", (FPW)addr[2]);
  232. info->flash_id = FLASH_UNKNOWN;
  233. info->sector_count = 0;
  234. info->size = 0;
  235. return (0); /* => no or unknown flash */
  236. }
  237. /* Put FLASH back in read mode */
  238. flash_reset(info);
  239. return (info->size);
  240. }
  241. /*-----------------------------------------------------------------------
  242. */
  243. int flash_erase (flash_info_t *info, int s_first, int s_last)
  244. {
  245. FPWV *addr;
  246. int flag, prot, sect;
  247. int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
  248. ulong start, now, last;
  249. int rcode = 0;
  250. if ((s_first < 0) || (s_first > s_last)) {
  251. if (info->flash_id == FLASH_UNKNOWN) {
  252. printf ("- missing\n");
  253. } else {
  254. printf ("- no sectors to erase\n");
  255. }
  256. return 1;
  257. }
  258. switch (info->flash_id & FLASH_TYPEMASK) {
  259. case FLASH_AMDLV065D:
  260. break;
  261. case FLASH_UNKNOWN:
  262. default:
  263. printf ("Can't erase unknown flash type %08lx - aborted\n",
  264. info->flash_id);
  265. return 1;
  266. }
  267. prot = 0;
  268. for (sect=s_first; sect<=s_last; ++sect) {
  269. if (info->protect[sect]) {
  270. prot++;
  271. }
  272. }
  273. if (prot) {
  274. printf ("- Warning: %d protected sectors will not be erased!\n",
  275. prot);
  276. } else {
  277. printf ("\n");
  278. }
  279. last = get_timer(0);
  280. /* Start erase on unprotected sectors */
  281. for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
  282. if (info->protect[sect] != 0) /* protected, skip it */
  283. continue;
  284. /* Disable interrupts which might cause a timeout here */
  285. flag = disable_interrupts();
  286. addr = (FPWV *)(info->start[sect]);
  287. if (intel) {
  288. *addr = (FPW)0x00500050; /* clear status register */
  289. *addr = (FPW)0x00200020; /* erase setup */
  290. *addr = (FPW)0x00D000D0; /* erase confirm */
  291. }
  292. else {
  293. /* must be AMD style if not Intel */
  294. FPWV *base; /* first address in bank */
  295. base = (FPWV *)(info->start[0]);
  296. base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
  297. base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
  298. base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */
  299. base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
  300. base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
  301. *addr = (FPW)0x00300030; /* erase sector */
  302. }
  303. /* re-enable interrupts if necessary */
  304. if (flag)
  305. enable_interrupts();
  306. start = get_timer(0);
  307. /* wait at least 50us for AMD, 80us for Intel.
  308. * Let's wait 1 ms.
  309. */
  310. udelay (1000);
  311. while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
  312. if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  313. printf ("Timeout\n");
  314. if (intel) {
  315. /* suspend erase */
  316. *addr = (FPW)0x00B000B0;
  317. }
  318. flash_reset(info); /* reset to read mode */
  319. rcode = 1; /* failed */
  320. break;
  321. }
  322. /* show that we're waiting */
  323. if ((get_timer(last)) > CFG_HZ) {/* every second */
  324. putc ('.');
  325. last = get_timer(0);
  326. }
  327. }
  328. /* show that we're waiting */
  329. if ((get_timer(last)) > CFG_HZ) { /* every second */
  330. putc ('.');
  331. last = get_timer(0);
  332. }
  333. flash_reset(info); /* reset to read mode */
  334. }
  335. printf (" done\n");
  336. return rcode;
  337. }
  338. /*-----------------------------------------------------------------------
  339. * Copy memory to flash, returns:
  340. * 0 - OK
  341. * 1 - write timeout
  342. * 2 - Flash not erased
  343. */
  344. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  345. {
  346. FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
  347. int bytes; /* number of bytes to program in current word */
  348. int left; /* number of bytes left to program */
  349. int i, res;
  350. for (left = cnt, res = 0;
  351. left > 0 && res == 0;
  352. addr += sizeof(data), left -= sizeof(data) - bytes) {
  353. bytes = addr & (sizeof(data) - 1);
  354. addr &= ~(sizeof(data) - 1);
  355. /* combine source and destination data so can program
  356. * an entire word of 16 or 32 bits
  357. */
  358. for (i = 0; i < sizeof(data); i++) {
  359. data <<= 8;
  360. if (i < bytes || i - bytes >= left )
  361. data += *((uchar *)addr + i);
  362. else
  363. data += *src++;
  364. }
  365. /* write one word to the flash */
  366. switch (info->flash_id & FLASH_VENDMASK) {
  367. case FLASH_MAN_AMD:
  368. res = write_word_amd(info, (FPWV *)addr, data);
  369. break;
  370. default:
  371. /* unknown flash type, error! */
  372. printf ("missing or unknown FLASH type\n");
  373. res = 1; /* not really a timeout, but gives error */
  374. break;
  375. }
  376. }
  377. return (res);
  378. }
  379. /*-----------------------------------------------------------------------
  380. * Write a word to Flash for AMD FLASH
  381. * A word is 16 or 32 bits, whichever the bus width of the flash bank
  382. * (not an individual chip) is.
  383. *
  384. * returns:
  385. * 0 - OK
  386. * 1 - write timeout
  387. * 2 - Flash not erased
  388. */
  389. static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
  390. {
  391. ulong start;
  392. int flag;
  393. int res = 0; /* result, assume success */
  394. FPWV *base; /* first address in flash bank */
  395. /* Check if Flash is (sufficiently) erased */
  396. if ((*dest & data) != data) {
  397. return (2);
  398. }
  399. base = (FPWV *)(info->start[0]);
  400. /* Disable interrupts which might cause a timeout here */
  401. flag = disable_interrupts();
  402. base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
  403. base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
  404. base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
  405. *dest = data; /* start programming the data */
  406. /* re-enable interrupts if necessary */
  407. if (flag)
  408. enable_interrupts();
  409. start = get_timer (0);
  410. /* data polling for D7 */
  411. while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
  412. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  413. *dest = (FPW)0x00F000F0; /* reset bank */
  414. res = 1;
  415. }
  416. }
  417. return (res);
  418. }