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Makefile
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0e7927db13
FSL DDR: Convert STXSSA to new DDR code.
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17 år sedan |
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config.mk
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ee1529838a
Add support for STX GP3SSA (stxssa) Board with 4 MiB flash.
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18 år sedan |
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ddr.c
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b4983e16d1
fsl-ddr: use the 1T timing as default configuration
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16 år sedan |
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law.c
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6d0f6bcf33
rename CFG_ macros to CONFIG_SYS
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17 år sedan |
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stxssa.c
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6d0f6bcf33
rename CFG_ macros to CONFIG_SYS
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17 år sedan |
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tlb.c
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6d0f6bcf33
rename CFG_ macros to CONFIG_SYS
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17 år sedan |
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u-boot.lds
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9b827cf172
Align end of bss by 4 bytes
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16 år sedan |
Dave Liu
b4983e16d1
fsl-ddr: use the 1T timing as default configuration