cmd_ide.c 51 KB

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  1. /*
  2. * (C) Copyright 2000-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * IDE support
  26. */
  27. #include <common.h>
  28. #include <config.h>
  29. #include <watchdog.h>
  30. #include <command.h>
  31. #include <image.h>
  32. #include <asm/byteorder.h>
  33. #include <asm/io.h>
  34. #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
  35. # include <pcmcia.h>
  36. #endif
  37. #ifdef CONFIG_8xx
  38. # include <mpc8xx.h>
  39. #endif
  40. #ifdef CONFIG_MPC5xxx
  41. #include <mpc5xxx.h>
  42. #endif
  43. #include <ide.h>
  44. #include <ata.h>
  45. #ifdef CONFIG_STATUS_LED
  46. # include <status_led.h>
  47. #endif
  48. #ifdef CONFIG_IDE_8xx_DIRECT
  49. DECLARE_GLOBAL_DATA_PTR;
  50. #endif
  51. #ifdef __PPC__
  52. # define EIEIO __asm__ volatile ("eieio")
  53. # define SYNC __asm__ volatile ("sync")
  54. #else
  55. # define EIEIO /* nothing */
  56. # define SYNC /* nothing */
  57. #endif
  58. #ifdef CONFIG_IDE_8xx_DIRECT
  59. /* Timings for IDE Interface
  60. *
  61. * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
  62. * 70 165 30 PIO-Mode 0, [ns]
  63. * 4 9 2 [Cycles]
  64. * 50 125 20 PIO-Mode 1, [ns]
  65. * 3 7 2 [Cycles]
  66. * 30 100 15 PIO-Mode 2, [ns]
  67. * 2 6 1 [Cycles]
  68. * 30 80 10 PIO-Mode 3, [ns]
  69. * 2 5 1 [Cycles]
  70. * 25 70 10 PIO-Mode 4, [ns]
  71. * 2 4 1 [Cycles]
  72. */
  73. const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
  74. {
  75. /* Setup Length Hold */
  76. { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
  77. { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
  78. { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
  79. { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
  80. { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
  81. };
  82. static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
  83. #ifndef CFG_PIO_MODE
  84. #define CFG_PIO_MODE 0 /* use a relaxed default */
  85. #endif
  86. static int pio_mode = CFG_PIO_MODE;
  87. /* Make clock cycles and always round up */
  88. #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
  89. #endif /* CONFIG_IDE_8xx_DIRECT */
  90. /* ------------------------------------------------------------------------- */
  91. /* Current I/O Device */
  92. static int curr_device = -1;
  93. /* Current offset for IDE0 / IDE1 bus access */
  94. ulong ide_bus_offset[CFG_IDE_MAXBUS] = {
  95. #if defined(CFG_ATA_IDE0_OFFSET)
  96. CFG_ATA_IDE0_OFFSET,
  97. #endif
  98. #if defined(CFG_ATA_IDE1_OFFSET) && (CFG_IDE_MAXBUS > 1)
  99. CFG_ATA_IDE1_OFFSET,
  100. #endif
  101. };
  102. #ifndef CONFIG_AMIGAONEG3SE
  103. static int ide_bus_ok[CFG_IDE_MAXBUS];
  104. #else
  105. static int ide_bus_ok[CFG_IDE_MAXBUS] = {0,};
  106. #endif
  107. block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE];
  108. /* ------------------------------------------------------------------------- */
  109. #ifdef CONFIG_IDE_LED
  110. #if !defined(CONFIG_KUP4K) && !defined(CONFIG_KUP4X) &&!defined(CONFIG_BMS2003) &&!defined(CONFIG_CPC45)
  111. static void ide_led (uchar led, uchar status);
  112. #else
  113. extern void ide_led (uchar led, uchar status);
  114. #endif
  115. #else
  116. #ifndef CONFIG_AMIGAONEG3SE
  117. #define ide_led(a,b) /* dummy */
  118. #else
  119. extern void ide_led(uchar led, uchar status);
  120. #define LED_IDE1 1
  121. #define LED_IDE2 2
  122. #define CONFIG_IDE_LED 1
  123. #define DEVICE_LED(x) 1
  124. #endif
  125. #endif
  126. #ifdef CONFIG_IDE_RESET
  127. static void ide_reset (void);
  128. #else
  129. #define ide_reset() /* dummy */
  130. #endif
  131. static void ide_ident (block_dev_desc_t *dev_desc);
  132. static uchar ide_wait (int dev, ulong t);
  133. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  134. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  135. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  136. void inline ide_outb(int dev, int port, unsigned char val);
  137. unsigned char inline ide_inb(int dev, int port);
  138. static void input_data(int dev, ulong *sect_buf, int words);
  139. static void output_data(int dev, ulong *sect_buf, int words);
  140. static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
  141. #ifndef CFG_ATA_PORT_ADDR
  142. #define CFG_ATA_PORT_ADDR(port) (port)
  143. #endif
  144. #ifdef CONFIG_ATAPI
  145. static void atapi_inquiry(block_dev_desc_t *dev_desc);
  146. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
  147. #endif
  148. #ifdef CONFIG_IDE_8xx_DIRECT
  149. static void set_pcmcia_timing (int pmode);
  150. #endif
  151. /* ------------------------------------------------------------------------- */
  152. int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  153. {
  154. int rcode = 0;
  155. switch (argc) {
  156. case 0:
  157. case 1:
  158. printf ("Usage:\n%s\n", cmdtp->usage);
  159. return 1;
  160. case 2:
  161. if (strncmp(argv[1],"res",3) == 0) {
  162. puts ("\nReset IDE"
  163. #ifdef CONFIG_IDE_8xx_DIRECT
  164. " on PCMCIA " PCMCIA_SLOT_MSG
  165. #endif
  166. ": ");
  167. ide_init ();
  168. return 0;
  169. } else if (strncmp(argv[1],"inf",3) == 0) {
  170. int i;
  171. putc ('\n');
  172. for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
  173. if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
  174. continue; /* list only known devices */
  175. printf ("IDE device %d: ", i);
  176. dev_print(&ide_dev_desc[i]);
  177. }
  178. return 0;
  179. } else if (strncmp(argv[1],"dev",3) == 0) {
  180. if ((curr_device < 0) || (curr_device >= CFG_IDE_MAXDEVICE)) {
  181. puts ("\nno IDE devices available\n");
  182. return 1;
  183. }
  184. printf ("\nIDE device %d: ", curr_device);
  185. dev_print(&ide_dev_desc[curr_device]);
  186. return 0;
  187. } else if (strncmp(argv[1],"part",4) == 0) {
  188. int dev, ok;
  189. for (ok=0, dev=0; dev<CFG_IDE_MAXDEVICE; ++dev) {
  190. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  191. ++ok;
  192. if (dev)
  193. putc ('\n');
  194. print_part(&ide_dev_desc[dev]);
  195. }
  196. }
  197. if (!ok) {
  198. puts ("\nno IDE devices available\n");
  199. rcode ++;
  200. }
  201. return rcode;
  202. }
  203. printf ("Usage:\n%s\n", cmdtp->usage);
  204. return 1;
  205. case 3:
  206. if (strncmp(argv[1],"dev",3) == 0) {
  207. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  208. printf ("\nIDE device %d: ", dev);
  209. if (dev >= CFG_IDE_MAXDEVICE) {
  210. puts ("unknown device\n");
  211. return 1;
  212. }
  213. dev_print(&ide_dev_desc[dev]);
  214. /*ide_print (dev);*/
  215. if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
  216. return 1;
  217. }
  218. curr_device = dev;
  219. puts ("... is now current device\n");
  220. return 0;
  221. } else if (strncmp(argv[1],"part",4) == 0) {
  222. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  223. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  224. print_part(&ide_dev_desc[dev]);
  225. } else {
  226. printf ("\nIDE device %d not available\n", dev);
  227. rcode = 1;
  228. }
  229. return rcode;
  230. #if 0
  231. } else if (strncmp(argv[1],"pio",4) == 0) {
  232. int mode = (int)simple_strtoul(argv[2], NULL, 10);
  233. if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
  234. puts ("\nSetting ");
  235. pio_mode = mode;
  236. ide_init ();
  237. } else {
  238. printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
  239. mode, IDE_MAX_PIO_MODE);
  240. }
  241. return;
  242. #endif
  243. }
  244. printf ("Usage:\n%s\n", cmdtp->usage);
  245. return 1;
  246. default:
  247. /* at least 4 args */
  248. if (strcmp(argv[1],"read") == 0) {
  249. ulong addr = simple_strtoul(argv[2], NULL, 16);
  250. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  251. ulong n;
  252. #ifdef CFG_64BIT_STRTOUL
  253. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  254. printf ("\nIDE read: device %d block # %qd, count %ld ... ",
  255. curr_device, blk, cnt);
  256. #else
  257. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  258. printf ("\nIDE read: device %d block # %ld, count %ld ... ",
  259. curr_device, blk, cnt);
  260. #endif
  261. n = ide_dev_desc[curr_device].block_read (curr_device,
  262. blk, cnt,
  263. (ulong *)addr);
  264. /* flush cache after read */
  265. flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
  266. printf ("%ld blocks read: %s\n",
  267. n, (n==cnt) ? "OK" : "ERROR");
  268. if (n==cnt) {
  269. return 0;
  270. } else {
  271. return 1;
  272. }
  273. } else if (strcmp(argv[1],"write") == 0) {
  274. ulong addr = simple_strtoul(argv[2], NULL, 16);
  275. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  276. ulong n;
  277. #ifdef CFG_64BIT_STRTOUL
  278. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  279. printf ("\nIDE write: device %d block # %qd, count %ld ... ",
  280. curr_device, blk, cnt);
  281. #else
  282. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  283. printf ("\nIDE write: device %d block # %ld, count %ld ... ",
  284. curr_device, blk, cnt);
  285. #endif
  286. n = ide_write (curr_device, blk, cnt, (ulong *)addr);
  287. printf ("%ld blocks written: %s\n",
  288. n, (n==cnt) ? "OK" : "ERROR");
  289. if (n==cnt) {
  290. return 0;
  291. } else {
  292. return 1;
  293. }
  294. } else {
  295. printf ("Usage:\n%s\n", cmdtp->usage);
  296. rcode = 1;
  297. }
  298. return rcode;
  299. }
  300. }
  301. int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  302. {
  303. char *boot_device = NULL;
  304. char *ep;
  305. int dev, part = 0;
  306. ulong addr, cnt;
  307. disk_partition_t info;
  308. image_header_t *hdr;
  309. int rcode = 0;
  310. #if defined(CONFIG_FIT)
  311. const void *fit_hdr;
  312. #endif
  313. show_boot_progress (41);
  314. switch (argc) {
  315. case 1:
  316. addr = CFG_LOAD_ADDR;
  317. boot_device = getenv ("bootdevice");
  318. break;
  319. case 2:
  320. addr = simple_strtoul(argv[1], NULL, 16);
  321. boot_device = getenv ("bootdevice");
  322. break;
  323. case 3:
  324. addr = simple_strtoul(argv[1], NULL, 16);
  325. boot_device = argv[2];
  326. break;
  327. default:
  328. printf ("Usage:\n%s\n", cmdtp->usage);
  329. show_boot_progress (-42);
  330. return 1;
  331. }
  332. show_boot_progress (42);
  333. if (!boot_device) {
  334. puts ("\n** No boot device **\n");
  335. show_boot_progress (-43);
  336. return 1;
  337. }
  338. show_boot_progress (43);
  339. dev = simple_strtoul(boot_device, &ep, 16);
  340. if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
  341. printf ("\n** Device %d not available\n", dev);
  342. show_boot_progress (-44);
  343. return 1;
  344. }
  345. show_boot_progress (44);
  346. if (*ep) {
  347. if (*ep != ':') {
  348. puts ("\n** Invalid boot device, use `dev[:part]' **\n");
  349. show_boot_progress (-45);
  350. return 1;
  351. }
  352. part = simple_strtoul(++ep, NULL, 16);
  353. }
  354. show_boot_progress (45);
  355. if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
  356. show_boot_progress (-46);
  357. return 1;
  358. }
  359. show_boot_progress (46);
  360. if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
  361. (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
  362. printf ("\n** Invalid partition type \"%.32s\""
  363. " (expect \"" BOOT_PART_TYPE "\")\n",
  364. info.type);
  365. show_boot_progress (-47);
  366. return 1;
  367. }
  368. show_boot_progress (47);
  369. printf ("\nLoading from IDE device %d, partition %d: "
  370. "Name: %.32s Type: %.32s\n",
  371. dev, part, info.name, info.type);
  372. debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
  373. info.start, info.size, info.blksz);
  374. if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
  375. printf ("** Read error on %d:%d\n", dev, part);
  376. show_boot_progress (-48);
  377. return 1;
  378. }
  379. show_boot_progress (48);
  380. switch (genimg_get_format ((void *)addr)) {
  381. case IMAGE_FORMAT_LEGACY:
  382. hdr = (image_header_t *)addr;
  383. show_boot_progress (49);
  384. if (!image_check_hcrc (hdr)) {
  385. puts ("\n** Bad Header Checksum **\n");
  386. show_boot_progress (-50);
  387. return 1;
  388. }
  389. show_boot_progress (50);
  390. image_print_contents (hdr);
  391. cnt = image_get_image_size (hdr);
  392. break;
  393. #if defined(CONFIG_FIT)
  394. case IMAGE_FORMAT_FIT:
  395. fit_hdr = (const void *)addr;
  396. if (!fit_check_format (fit_hdr)) {
  397. show_boot_progress (-140);
  398. puts ("** Bad FIT image format\n");
  399. return 1;
  400. }
  401. show_boot_progress (141);
  402. puts ("Fit image detected...\n");
  403. cnt = fit_get_size (fit_hdr);
  404. break;
  405. #endif
  406. default:
  407. show_boot_progress (-49);
  408. puts ("** Unknown image type\n");
  409. return 1;
  410. }
  411. cnt += info.blksz - 1;
  412. cnt /= info.blksz;
  413. cnt -= 1;
  414. if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
  415. (ulong *)(addr+info.blksz)) != cnt) {
  416. printf ("** Read error on %d:%d\n", dev, part);
  417. show_boot_progress (-51);
  418. return 1;
  419. }
  420. show_boot_progress (51);
  421. #if defined(CONFIG_FIT)
  422. /* This cannot be done earlier, we need complete FIT image in RAM first */
  423. if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT)
  424. fit_print_contents ((const void *)addr);
  425. #endif
  426. /* Loading ok, update default load address */
  427. load_addr = addr;
  428. /* Check if we should attempt an auto-start */
  429. if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
  430. char *local_args[2];
  431. extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
  432. local_args[0] = argv[0];
  433. local_args[1] = NULL;
  434. printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
  435. do_bootm (cmdtp, 0, 1, local_args);
  436. rcode = 1;
  437. }
  438. return rcode;
  439. }
  440. /* ------------------------------------------------------------------------- */
  441. void ide_init (void)
  442. {
  443. #ifdef CONFIG_IDE_8xx_DIRECT
  444. volatile immap_t *immr = (immap_t *)CFG_IMMR;
  445. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  446. #endif
  447. unsigned char c;
  448. int i, bus;
  449. #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
  450. unsigned int ata_reset_time = ATA_RESET_TIME;
  451. char *s;
  452. #endif
  453. #ifdef CONFIG_AMIGAONEG3SE
  454. unsigned int max_bus_scan;
  455. #endif
  456. #ifdef CONFIG_IDE_8xx_PCCARD
  457. extern int pcmcia_on (void);
  458. extern int ide_devices_found; /* Initialized in check_ide_device() */
  459. #endif /* CONFIG_IDE_8xx_PCCARD */
  460. #ifdef CONFIG_IDE_PREINIT
  461. extern int ide_preinit (void);
  462. WATCHDOG_RESET();
  463. if (ide_preinit ()) {
  464. puts ("ide_preinit failed\n");
  465. return;
  466. }
  467. #endif /* CONFIG_IDE_PREINIT */
  468. #ifdef CONFIG_IDE_8xx_PCCARD
  469. extern int pcmcia_on (void);
  470. extern int ide_devices_found; /* Initialized in check_ide_device() */
  471. WATCHDOG_RESET();
  472. ide_devices_found = 0;
  473. /* initialize the PCMCIA IDE adapter card */
  474. pcmcia_on();
  475. if (!ide_devices_found)
  476. return;
  477. udelay (1000000); /* 1 s */
  478. #endif /* CONFIG_IDE_8xx_PCCARD */
  479. WATCHDOG_RESET();
  480. #ifdef CONFIG_IDE_8xx_DIRECT
  481. /* Initialize PIO timing tables */
  482. for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
  483. pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
  484. gd->bus_clk);
  485. pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
  486. gd->bus_clk);
  487. pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
  488. gd->bus_clk);
  489. debug ( "PIO Mode %d: setup=%2d ns/%d clk"
  490. " len=%3d ns/%d clk"
  491. " hold=%2d ns/%d clk\n",
  492. i,
  493. pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
  494. pio_config_ns[i].t_length, pio_config_clk[i].t_length,
  495. pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
  496. }
  497. #endif /* CONFIG_IDE_8xx_DIRECT */
  498. /* Reset the IDE just to be sure.
  499. * Light LED's to show
  500. */
  501. ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
  502. ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
  503. #ifdef CONFIG_IDE_8xx_DIRECT
  504. /* PCMCIA / IDE initialization for common mem space */
  505. pcmp->pcmc_pgcrb = 0;
  506. /* start in PIO mode 0 - most relaxed timings */
  507. pio_mode = 0;
  508. set_pcmcia_timing (pio_mode);
  509. #endif /* CONFIG_IDE_8xx_DIRECT */
  510. /*
  511. * Wait for IDE to get ready.
  512. * According to spec, this can take up to 31 seconds!
  513. */
  514. #ifndef CONFIG_AMIGAONEG3SE
  515. for (bus=0; bus<CFG_IDE_MAXBUS; ++bus) {
  516. int dev = bus * (CFG_IDE_MAXDEVICE / CFG_IDE_MAXBUS);
  517. #else
  518. s = getenv("ide_maxbus");
  519. if (s)
  520. max_bus_scan = simple_strtol(s, NULL, 10);
  521. else
  522. max_bus_scan = CFG_IDE_MAXBUS;
  523. for (bus=0; bus<max_bus_scan; ++bus) {
  524. int dev = bus * (CFG_IDE_MAXDEVICE / max_bus_scan);
  525. #endif
  526. #ifdef CONFIG_IDE_8xx_PCCARD
  527. /* Skip non-ide devices from probing */
  528. if ((ide_devices_found & (1 << bus)) == 0) {
  529. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  530. continue;
  531. }
  532. #endif
  533. printf ("Bus %d: ", bus);
  534. ide_bus_ok[bus] = 0;
  535. /* Select device
  536. */
  537. udelay (100000); /* 100 ms */
  538. ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  539. udelay (100000); /* 100 ms */
  540. #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
  541. if ((s = getenv("ide_reset_timeout")) != NULL)
  542. ata_reset_time = simple_strtol(s, NULL, 10);
  543. #endif
  544. i = 0;
  545. do {
  546. udelay (10000); /* 10 ms */
  547. c = ide_inb (dev, ATA_STATUS);
  548. i++;
  549. #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
  550. if (i > (ata_reset_time * 100)) {
  551. #else
  552. if (i > (ATA_RESET_TIME * 100)) {
  553. #endif
  554. puts ("** Timeout **\n");
  555. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  556. #ifdef CONFIG_AMIGAONEG3SE
  557. /* If this is the second bus, the first one was OK */
  558. if (bus != 0) {
  559. ide_bus_ok[bus] = 0;
  560. goto skip_bus;
  561. }
  562. #endif
  563. return;
  564. }
  565. if ((i >= 100) && ((i%100)==0)) {
  566. putc ('.');
  567. }
  568. } while (c & ATA_STAT_BUSY);
  569. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  570. puts ("not available ");
  571. debug ("Status = 0x%02X ", c);
  572. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  573. } else if ((c & ATA_STAT_READY) == 0) {
  574. puts ("not available ");
  575. debug ("Status = 0x%02X ", c);
  576. #endif
  577. } else {
  578. puts ("OK ");
  579. ide_bus_ok[bus] = 1;
  580. }
  581. WATCHDOG_RESET();
  582. }
  583. #ifdef CONFIG_AMIGAONEG3SE
  584. skip_bus:
  585. #endif
  586. putc ('\n');
  587. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  588. curr_device = -1;
  589. for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
  590. #ifdef CONFIG_IDE_LED
  591. int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
  592. #endif
  593. ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
  594. ide_dev_desc[i].if_type=IF_TYPE_IDE;
  595. ide_dev_desc[i].dev=i;
  596. ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
  597. ide_dev_desc[i].blksz=0;
  598. ide_dev_desc[i].lba=0;
  599. ide_dev_desc[i].block_read=ide_read;
  600. if (!ide_bus_ok[IDE_BUS(i)])
  601. continue;
  602. ide_led (led, 1); /* LED on */
  603. ide_ident(&ide_dev_desc[i]);
  604. ide_led (led, 0); /* LED off */
  605. dev_print(&ide_dev_desc[i]);
  606. /* ide_print (i); */
  607. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  608. init_part (&ide_dev_desc[i]); /* initialize partition type */
  609. if (curr_device < 0)
  610. curr_device = i;
  611. }
  612. }
  613. WATCHDOG_RESET();
  614. }
  615. /* ------------------------------------------------------------------------- */
  616. block_dev_desc_t * ide_get_dev(int dev)
  617. {
  618. return (dev < CFG_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
  619. }
  620. #ifdef CONFIG_IDE_8xx_DIRECT
  621. static void
  622. set_pcmcia_timing (int pmode)
  623. {
  624. volatile immap_t *immr = (immap_t *)CFG_IMMR;
  625. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  626. ulong timings;
  627. debug ("Set timing for PIO Mode %d\n", pmode);
  628. timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
  629. | PCMCIA_SST(pio_config_clk[pmode].t_setup)
  630. | PCMCIA_SL (pio_config_clk[pmode].t_length)
  631. ;
  632. /* IDE 0
  633. */
  634. pcmp->pcmc_pbr0 = CFG_PCMCIA_PBR0;
  635. pcmp->pcmc_por0 = CFG_PCMCIA_POR0
  636. #if (CFG_PCMCIA_POR0 != 0)
  637. | timings
  638. #endif
  639. ;
  640. debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
  641. pcmp->pcmc_pbr1 = CFG_PCMCIA_PBR1;
  642. pcmp->pcmc_por1 = CFG_PCMCIA_POR1
  643. #if (CFG_PCMCIA_POR1 != 0)
  644. | timings
  645. #endif
  646. ;
  647. debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
  648. pcmp->pcmc_pbr2 = CFG_PCMCIA_PBR2;
  649. pcmp->pcmc_por2 = CFG_PCMCIA_POR2
  650. #if (CFG_PCMCIA_POR2 != 0)
  651. | timings
  652. #endif
  653. ;
  654. debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
  655. pcmp->pcmc_pbr3 = CFG_PCMCIA_PBR3;
  656. pcmp->pcmc_por3 = CFG_PCMCIA_POR3
  657. #if (CFG_PCMCIA_POR3 != 0)
  658. | timings
  659. #endif
  660. ;
  661. debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
  662. /* IDE 1
  663. */
  664. pcmp->pcmc_pbr4 = CFG_PCMCIA_PBR4;
  665. pcmp->pcmc_por4 = CFG_PCMCIA_POR4
  666. #if (CFG_PCMCIA_POR4 != 0)
  667. | timings
  668. #endif
  669. ;
  670. debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
  671. pcmp->pcmc_pbr5 = CFG_PCMCIA_PBR5;
  672. pcmp->pcmc_por5 = CFG_PCMCIA_POR5
  673. #if (CFG_PCMCIA_POR5 != 0)
  674. | timings
  675. #endif
  676. ;
  677. debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
  678. pcmp->pcmc_pbr6 = CFG_PCMCIA_PBR6;
  679. pcmp->pcmc_por6 = CFG_PCMCIA_POR6
  680. #if (CFG_PCMCIA_POR6 != 0)
  681. | timings
  682. #endif
  683. ;
  684. debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
  685. pcmp->pcmc_pbr7 = CFG_PCMCIA_PBR7;
  686. pcmp->pcmc_por7 = CFG_PCMCIA_POR7
  687. #if (CFG_PCMCIA_POR7 != 0)
  688. | timings
  689. #endif
  690. ;
  691. debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
  692. }
  693. #endif /* CONFIG_IDE_8xx_DIRECT */
  694. /* ------------------------------------------------------------------------- */
  695. void inline
  696. __ide_outb(int dev, int port, unsigned char val)
  697. {
  698. debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  699. dev, port, val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
  700. outb(val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
  701. }
  702. void inline ide_outb (int dev, int port, unsigned char val)
  703. __attribute__((weak, alias("__ide_outb")));
  704. unsigned char inline
  705. __ide_inb(int dev, int port)
  706. {
  707. uchar val;
  708. val = inb((ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
  709. debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  710. dev, port, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)), val);
  711. return val;
  712. }
  713. unsigned char inline ide_inb(int dev, int port)
  714. __attribute__((weak, alias("__ide_inb")));
  715. #ifdef __PPC__
  716. # ifdef CONFIG_AMIGAONEG3SE
  717. static void
  718. output_data_short(int dev, ulong *sect_buf, int words)
  719. {
  720. ushort *dbuf;
  721. volatile ushort *pbuf;
  722. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  723. dbuf = (ushort *)sect_buf;
  724. while (words--) {
  725. EIEIO;
  726. *pbuf = *dbuf++;
  727. EIEIO;
  728. }
  729. if (words&1)
  730. *pbuf = 0;
  731. }
  732. # endif /* CONFIG_AMIGAONEG3SE */
  733. #endif /* __PPC_ */
  734. /* We only need to swap data if we are running on a big endian cpu. */
  735. /* But Au1x00 cpu:s already swaps data in big endian mode! */
  736. #if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
  737. #define input_swap_data(x,y,z) input_data(x,y,z)
  738. #else
  739. static void
  740. input_swap_data(int dev, ulong *sect_buf, int words)
  741. {
  742. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  743. uchar i;
  744. volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  745. volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  746. ushort *dbuf = (ushort *)sect_buf;
  747. while (words--) {
  748. for (i=0; i<2; i++) {
  749. *(((uchar *)(dbuf)) + 1) = *pbuf_even;
  750. *(uchar *)dbuf = *pbuf_odd;
  751. dbuf+=1;
  752. }
  753. }
  754. #else
  755. volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  756. ushort *dbuf = (ushort *)sect_buf;
  757. debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
  758. while (words--) {
  759. #ifdef __MIPS__
  760. *dbuf++ = swab16p((u16*)pbuf);
  761. *dbuf++ = swab16p((u16*)pbuf);
  762. #elif defined(CONFIG_PCS440EP)
  763. *dbuf++ = *pbuf;
  764. *dbuf++ = *pbuf;
  765. #else
  766. *dbuf++ = ld_le16(pbuf);
  767. *dbuf++ = ld_le16(pbuf);
  768. #endif /* !MIPS */
  769. }
  770. #endif
  771. }
  772. #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
  773. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
  774. static void
  775. output_data(int dev, ulong *sect_buf, int words)
  776. {
  777. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  778. uchar *dbuf;
  779. volatile uchar *pbuf_even;
  780. volatile uchar *pbuf_odd;
  781. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  782. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  783. dbuf = (uchar *)sect_buf;
  784. while (words--) {
  785. EIEIO;
  786. *pbuf_even = *dbuf++;
  787. EIEIO;
  788. *pbuf_odd = *dbuf++;
  789. EIEIO;
  790. *pbuf_even = *dbuf++;
  791. EIEIO;
  792. *pbuf_odd = *dbuf++;
  793. }
  794. #else
  795. ushort *dbuf;
  796. volatile ushort *pbuf;
  797. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  798. dbuf = (ushort *)sect_buf;
  799. while (words--) {
  800. #if defined(CONFIG_PCS440EP)
  801. /* not tested, because CF was write protected */
  802. EIEIO;
  803. *pbuf = ld_le16(dbuf++);
  804. EIEIO;
  805. *pbuf = ld_le16(dbuf++);
  806. #else
  807. EIEIO;
  808. *pbuf = *dbuf++;
  809. EIEIO;
  810. *pbuf = *dbuf++;
  811. #endif
  812. }
  813. #endif
  814. }
  815. #else /* ! __PPC__ */
  816. static void
  817. output_data(int dev, ulong *sect_buf, int words)
  818. {
  819. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
  820. }
  821. #endif /* __PPC__ */
  822. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
  823. static void
  824. input_data(int dev, ulong *sect_buf, int words)
  825. {
  826. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  827. uchar *dbuf;
  828. volatile uchar *pbuf_even;
  829. volatile uchar *pbuf_odd;
  830. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  831. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  832. dbuf = (uchar *)sect_buf;
  833. while (words--) {
  834. *dbuf++ = *pbuf_even;
  835. EIEIO;
  836. SYNC;
  837. *dbuf++ = *pbuf_odd;
  838. EIEIO;
  839. SYNC;
  840. *dbuf++ = *pbuf_even;
  841. EIEIO;
  842. SYNC;
  843. *dbuf++ = *pbuf_odd;
  844. EIEIO;
  845. SYNC;
  846. }
  847. #else
  848. ushort *dbuf;
  849. volatile ushort *pbuf;
  850. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  851. dbuf = (ushort *)sect_buf;
  852. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  853. while (words--) {
  854. #if defined(CONFIG_PCS440EP)
  855. EIEIO;
  856. *dbuf++ = ld_le16(pbuf);
  857. EIEIO;
  858. *dbuf++ = ld_le16(pbuf);
  859. #else
  860. EIEIO;
  861. *dbuf++ = *pbuf;
  862. EIEIO;
  863. *dbuf++ = *pbuf;
  864. #endif
  865. }
  866. #endif
  867. }
  868. #else /* ! __PPC__ */
  869. static void
  870. input_data(int dev, ulong *sect_buf, int words)
  871. {
  872. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
  873. }
  874. #endif /* __PPC__ */
  875. #ifdef CONFIG_AMIGAONEG3SE
  876. static void
  877. input_data_short(int dev, ulong *sect_buf, int words)
  878. {
  879. ushort *dbuf;
  880. volatile ushort *pbuf;
  881. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  882. dbuf = (ushort *)sect_buf;
  883. while (words--) {
  884. EIEIO;
  885. *dbuf++ = *pbuf;
  886. EIEIO;
  887. }
  888. if (words&1) {
  889. ushort dummy;
  890. dummy = *pbuf;
  891. }
  892. }
  893. #endif
  894. /* -------------------------------------------------------------------------
  895. */
  896. static void ide_ident (block_dev_desc_t *dev_desc)
  897. {
  898. ulong iobuf[ATA_SECTORWORDS];
  899. unsigned char c;
  900. hd_driveid_t *iop = (hd_driveid_t *)iobuf;
  901. #ifdef CONFIG_AMIGAONEG3SE
  902. int max_bus_scan;
  903. char *s;
  904. #endif
  905. #ifdef CONFIG_ATAPI
  906. int retries = 0;
  907. int do_retry = 0;
  908. #endif
  909. #if 0
  910. int mode, cycle_time;
  911. #endif
  912. int device;
  913. device=dev_desc->dev;
  914. printf (" Device %d: ", device);
  915. #ifdef CONFIG_AMIGAONEG3SE
  916. s = getenv("ide_maxbus");
  917. if (s) {
  918. max_bus_scan = simple_strtol(s, NULL, 10);
  919. } else {
  920. max_bus_scan = CFG_IDE_MAXBUS;
  921. }
  922. if (device >= max_bus_scan*2) {
  923. dev_desc->type=DEV_TYPE_UNKNOWN;
  924. return;
  925. }
  926. #endif
  927. ide_led (DEVICE_LED(device), 1); /* LED on */
  928. /* Select device
  929. */
  930. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  931. dev_desc->if_type=IF_TYPE_IDE;
  932. #ifdef CONFIG_ATAPI
  933. do_retry = 0;
  934. retries = 0;
  935. /* Warning: This will be tricky to read */
  936. while (retries <= 1) {
  937. /* check signature */
  938. if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
  939. (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
  940. (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
  941. (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
  942. /* ATAPI Signature found */
  943. dev_desc->if_type=IF_TYPE_ATAPI;
  944. /* Start Ident Command
  945. */
  946. ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
  947. /*
  948. * Wait for completion - ATAPI devices need more time
  949. * to become ready
  950. */
  951. c = ide_wait (device, ATAPI_TIME_OUT);
  952. } else
  953. #endif
  954. {
  955. /* Start Ident Command
  956. */
  957. ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
  958. /* Wait for completion
  959. */
  960. c = ide_wait (device, IDE_TIME_OUT);
  961. }
  962. ide_led (DEVICE_LED(device), 0); /* LED off */
  963. if (((c & ATA_STAT_DRQ) == 0) ||
  964. ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
  965. #ifdef CONFIG_ATAPI
  966. #ifdef CONFIG_AMIGAONEG3SE
  967. s = getenv("ide_doreset");
  968. if (s && strcmp(s, "on") == 0)
  969. #endif
  970. {
  971. /* Need to soft reset the device in case it's an ATAPI... */
  972. debug ("Retrying...\n");
  973. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  974. udelay(100000);
  975. ide_outb (device, ATA_COMMAND, 0x08);
  976. udelay (500000); /* 500 ms */
  977. }
  978. /* Select device
  979. */
  980. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  981. retries++;
  982. #else
  983. return;
  984. #endif
  985. }
  986. #ifdef CONFIG_ATAPI
  987. else
  988. break;
  989. } /* see above - ugly to read */
  990. if (retries == 2) /* Not found */
  991. return;
  992. #endif
  993. input_swap_data (device, iobuf, ATA_SECTORWORDS);
  994. ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
  995. ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
  996. ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
  997. #ifdef __LITTLE_ENDIAN
  998. /*
  999. * firmware revision and model number have Big Endian Byte
  1000. * order in Word. Convert both to little endian.
  1001. *
  1002. * See CF+ and CompactFlash Specification Revision 2.0:
  1003. * 6.2.1.6: Identfy Drive, Table 39 for more details
  1004. */
  1005. strswab (dev_desc->revision);
  1006. strswab (dev_desc->vendor);
  1007. #endif /* __LITTLE_ENDIAN */
  1008. if ((iop->config & 0x0080)==0x0080)
  1009. dev_desc->removable = 1;
  1010. else
  1011. dev_desc->removable = 0;
  1012. #if 0
  1013. /*
  1014. * Drive PIO mode autoselection
  1015. */
  1016. mode = iop->tPIO;
  1017. printf ("tPIO = 0x%02x = %d\n",mode, mode);
  1018. if (mode > 2) { /* 2 is maximum allowed tPIO value */
  1019. mode = 2;
  1020. debug ("Override tPIO -> 2\n");
  1021. }
  1022. if (iop->field_valid & 2) { /* drive implements ATA2? */
  1023. debug ("Drive implements ATA2\n");
  1024. if (iop->capability & 8) { /* drive supports use_iordy? */
  1025. cycle_time = iop->eide_pio_iordy;
  1026. } else {
  1027. cycle_time = iop->eide_pio;
  1028. }
  1029. debug ("cycle time = %d\n", cycle_time);
  1030. mode = 4;
  1031. if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
  1032. if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
  1033. if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
  1034. if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
  1035. }
  1036. printf ("PIO mode to use: PIO %d\n", mode);
  1037. #endif /* 0 */
  1038. #ifdef CONFIG_ATAPI
  1039. if (dev_desc->if_type==IF_TYPE_ATAPI) {
  1040. atapi_inquiry(dev_desc);
  1041. return;
  1042. }
  1043. #endif /* CONFIG_ATAPI */
  1044. #ifdef __BIG_ENDIAN
  1045. /* swap shorts */
  1046. dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
  1047. #else /* ! __BIG_ENDIAN */
  1048. /*
  1049. * do not swap shorts on little endian
  1050. *
  1051. * See CF+ and CompactFlash Specification Revision 2.0:
  1052. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  1053. */
  1054. dev_desc->lba = iop->lba_capacity;
  1055. #endif /* __BIG_ENDIAN */
  1056. #ifdef CONFIG_LBA48
  1057. if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
  1058. dev_desc->lba48 = 1;
  1059. dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
  1060. ((unsigned long long)iop->lba48_capacity[1] << 16) |
  1061. ((unsigned long long)iop->lba48_capacity[2] << 32) |
  1062. ((unsigned long long)iop->lba48_capacity[3] << 48);
  1063. } else {
  1064. dev_desc->lba48 = 0;
  1065. }
  1066. #endif /* CONFIG_LBA48 */
  1067. /* assuming HD */
  1068. dev_desc->type=DEV_TYPE_HARDDISK;
  1069. dev_desc->blksz=ATA_BLOCKSIZE;
  1070. dev_desc->lun=0; /* just to fill something in... */
  1071. #if 0 /* only used to test the powersaving mode,
  1072. * if enabled, the drive goes after 5 sec
  1073. * in standby mode */
  1074. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1075. c = ide_wait (device, IDE_TIME_OUT);
  1076. ide_outb (device, ATA_SECT_CNT, 1);
  1077. ide_outb (device, ATA_LBA_LOW, 0);
  1078. ide_outb (device, ATA_LBA_MID, 0);
  1079. ide_outb (device, ATA_LBA_HIGH, 0);
  1080. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1081. ide_outb (device, ATA_COMMAND, 0xe3);
  1082. udelay (50);
  1083. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1084. #endif
  1085. }
  1086. /* ------------------------------------------------------------------------- */
  1087. ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1088. {
  1089. ulong n = 0;
  1090. unsigned char c;
  1091. unsigned char pwrsave=0; /* power save */
  1092. #ifdef CONFIG_LBA48
  1093. unsigned char lba48 = 0;
  1094. if (blknr & 0x0000fffff0000000ULL) {
  1095. /* more than 28 bits used, use 48bit mode */
  1096. lba48 = 1;
  1097. }
  1098. #endif
  1099. debug ("ide_read dev %d start %qX, blocks %lX buffer at %lX\n",
  1100. device, blknr, blkcnt, (ulong)buffer);
  1101. ide_led (DEVICE_LED(device), 1); /* LED on */
  1102. /* Select device
  1103. */
  1104. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1105. c = ide_wait (device, IDE_TIME_OUT);
  1106. if (c & ATA_STAT_BUSY) {
  1107. printf ("IDE read: device %d not ready\n", device);
  1108. goto IDE_READ_E;
  1109. }
  1110. /* first check if the drive is in Powersaving mode, if yes,
  1111. * increase the timeout value */
  1112. ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  1113. udelay (50);
  1114. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1115. if (c & ATA_STAT_BUSY) {
  1116. printf ("IDE read: device %d not ready\n", device);
  1117. goto IDE_READ_E;
  1118. }
  1119. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1120. printf ("No Powersaving mode %X\n", c);
  1121. } else {
  1122. c = ide_inb(device,ATA_SECT_CNT);
  1123. debug ("Powersaving %02X\n",c);
  1124. if(c==0)
  1125. pwrsave=1;
  1126. }
  1127. while (blkcnt-- > 0) {
  1128. c = ide_wait (device, IDE_TIME_OUT);
  1129. if (c & ATA_STAT_BUSY) {
  1130. printf ("IDE read: device %d not ready\n", device);
  1131. break;
  1132. }
  1133. #ifdef CONFIG_LBA48
  1134. if (lba48) {
  1135. /* write high bits */
  1136. ide_outb (device, ATA_SECT_CNT, 0);
  1137. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1138. #ifdef CFG_64BIT_LBA
  1139. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1140. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1141. #else
  1142. ide_outb (device, ATA_LBA_MID, 0);
  1143. ide_outb (device, ATA_LBA_HIGH, 0);
  1144. #endif
  1145. }
  1146. #endif
  1147. ide_outb (device, ATA_SECT_CNT, 1);
  1148. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1149. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1150. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1151. #ifdef CONFIG_LBA48
  1152. if (lba48) {
  1153. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1154. ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
  1155. } else
  1156. #endif
  1157. {
  1158. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1159. ATA_DEVICE(device) |
  1160. ((blknr >> 24) & 0xF) );
  1161. ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
  1162. }
  1163. udelay (50);
  1164. if(pwrsave) {
  1165. c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
  1166. pwrsave=0;
  1167. } else {
  1168. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1169. }
  1170. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1171. #if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
  1172. printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
  1173. device, blknr, c);
  1174. #else
  1175. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1176. device, (ulong)blknr, c);
  1177. #endif
  1178. break;
  1179. }
  1180. input_data (device, buffer, ATA_SECTORWORDS);
  1181. (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
  1182. ++n;
  1183. ++blknr;
  1184. buffer += ATA_BLOCKSIZE;
  1185. }
  1186. IDE_READ_E:
  1187. ide_led (DEVICE_LED(device), 0); /* LED off */
  1188. return (n);
  1189. }
  1190. /* ------------------------------------------------------------------------- */
  1191. ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1192. {
  1193. ulong n = 0;
  1194. unsigned char c;
  1195. #ifdef CONFIG_LBA48
  1196. unsigned char lba48 = 0;
  1197. if (blknr & 0x0000fffff0000000ULL) {
  1198. /* more than 28 bits used, use 48bit mode */
  1199. lba48 = 1;
  1200. }
  1201. #endif
  1202. ide_led (DEVICE_LED(device), 1); /* LED on */
  1203. /* Select device
  1204. */
  1205. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1206. while (blkcnt-- > 0) {
  1207. c = ide_wait (device, IDE_TIME_OUT);
  1208. if (c & ATA_STAT_BUSY) {
  1209. printf ("IDE read: device %d not ready\n", device);
  1210. goto WR_OUT;
  1211. }
  1212. #ifdef CONFIG_LBA48
  1213. if (lba48) {
  1214. /* write high bits */
  1215. ide_outb (device, ATA_SECT_CNT, 0);
  1216. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1217. #ifdef CFG_64BIT_LBA
  1218. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1219. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1220. #else
  1221. ide_outb (device, ATA_LBA_MID, 0);
  1222. ide_outb (device, ATA_LBA_HIGH, 0);
  1223. #endif
  1224. }
  1225. #endif
  1226. ide_outb (device, ATA_SECT_CNT, 1);
  1227. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1228. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1229. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1230. #ifdef CONFIG_LBA48
  1231. if (lba48) {
  1232. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1233. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  1234. } else
  1235. #endif
  1236. {
  1237. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1238. ATA_DEVICE(device) |
  1239. ((blknr >> 24) & 0xF) );
  1240. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
  1241. }
  1242. udelay (50);
  1243. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1244. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1245. #if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
  1246. printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
  1247. device, blknr, c);
  1248. #else
  1249. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1250. device, (ulong)blknr, c);
  1251. #endif
  1252. goto WR_OUT;
  1253. }
  1254. output_data (device, buffer, ATA_SECTORWORDS);
  1255. c = ide_inb (device, ATA_STATUS); /* clear IRQ */
  1256. ++n;
  1257. ++blknr;
  1258. buffer += ATA_BLOCKSIZE;
  1259. }
  1260. WR_OUT:
  1261. ide_led (DEVICE_LED(device), 0); /* LED off */
  1262. return (n);
  1263. }
  1264. /* ------------------------------------------------------------------------- */
  1265. /*
  1266. * copy src to dest, skipping leading and trailing blanks and null
  1267. * terminate the string
  1268. * "len" is the size of available memory including the terminating '\0'
  1269. */
  1270. static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
  1271. {
  1272. unsigned char *end, *last;
  1273. last = dst;
  1274. end = src + len - 1;
  1275. /* reserve space for '\0' */
  1276. if (len < 2)
  1277. goto OUT;
  1278. /* skip leading white space */
  1279. while ((*src) && (src<end) && (*src==' '))
  1280. ++src;
  1281. /* copy string, omitting trailing white space */
  1282. while ((*src) && (src<end)) {
  1283. *dst++ = *src;
  1284. if (*src++ != ' ')
  1285. last = dst;
  1286. }
  1287. OUT:
  1288. *last = '\0';
  1289. }
  1290. /* ------------------------------------------------------------------------- */
  1291. /*
  1292. * Wait until Busy bit is off, or timeout (in ms)
  1293. * Return last status
  1294. */
  1295. static uchar ide_wait (int dev, ulong t)
  1296. {
  1297. ulong delay = 10 * t; /* poll every 100 us */
  1298. uchar c;
  1299. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  1300. udelay (100);
  1301. if (delay-- == 0) {
  1302. break;
  1303. }
  1304. }
  1305. return (c);
  1306. }
  1307. /* ------------------------------------------------------------------------- */
  1308. #ifdef CONFIG_IDE_RESET
  1309. extern void ide_set_reset(int idereset);
  1310. static void ide_reset (void)
  1311. {
  1312. #if defined(CFG_PB_12V_ENABLE) || defined(CFG_PB_IDE_MOTOR)
  1313. volatile immap_t *immr = (immap_t *)CFG_IMMR;
  1314. #endif
  1315. int i;
  1316. curr_device = -1;
  1317. for (i=0; i<CFG_IDE_MAXBUS; ++i)
  1318. ide_bus_ok[i] = 0;
  1319. for (i=0; i<CFG_IDE_MAXDEVICE; ++i)
  1320. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  1321. ide_set_reset (1); /* assert reset */
  1322. /* the reset signal shall be asserted for et least 25 us */
  1323. udelay(25);
  1324. WATCHDOG_RESET();
  1325. #ifdef CFG_PB_12V_ENABLE
  1326. immr->im_cpm.cp_pbdat &= ~(CFG_PB_12V_ENABLE); /* 12V Enable output OFF */
  1327. immr->im_cpm.cp_pbpar &= ~(CFG_PB_12V_ENABLE);
  1328. immr->im_cpm.cp_pbodr &= ~(CFG_PB_12V_ENABLE);
  1329. immr->im_cpm.cp_pbdir |= CFG_PB_12V_ENABLE;
  1330. /* wait 500 ms for the voltage to stabilize
  1331. */
  1332. for (i=0; i<500; ++i) {
  1333. udelay (1000);
  1334. }
  1335. immr->im_cpm.cp_pbdat |= CFG_PB_12V_ENABLE; /* 12V Enable output ON */
  1336. #endif /* CFG_PB_12V_ENABLE */
  1337. #ifdef CFG_PB_IDE_MOTOR
  1338. /* configure IDE Motor voltage monitor pin as input */
  1339. immr->im_cpm.cp_pbpar &= ~(CFG_PB_IDE_MOTOR);
  1340. immr->im_cpm.cp_pbodr &= ~(CFG_PB_IDE_MOTOR);
  1341. immr->im_cpm.cp_pbdir &= ~(CFG_PB_IDE_MOTOR);
  1342. /* wait up to 1 s for the motor voltage to stabilize
  1343. */
  1344. for (i=0; i<1000; ++i) {
  1345. if ((immr->im_cpm.cp_pbdat & CFG_PB_IDE_MOTOR) != 0) {
  1346. break;
  1347. }
  1348. udelay (1000);
  1349. }
  1350. if (i == 1000) { /* Timeout */
  1351. printf ("\nWarning: 5V for IDE Motor missing\n");
  1352. # ifdef CONFIG_STATUS_LED
  1353. # ifdef STATUS_LED_YELLOW
  1354. status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
  1355. # endif
  1356. # ifdef STATUS_LED_GREEN
  1357. status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
  1358. # endif
  1359. # endif /* CONFIG_STATUS_LED */
  1360. }
  1361. #endif /* CFG_PB_IDE_MOTOR */
  1362. WATCHDOG_RESET();
  1363. /* de-assert RESET signal */
  1364. ide_set_reset(0);
  1365. /* wait 250 ms */
  1366. for (i=0; i<250; ++i) {
  1367. udelay (1000);
  1368. }
  1369. }
  1370. #endif /* CONFIG_IDE_RESET */
  1371. /* ------------------------------------------------------------------------- */
  1372. #if defined(CONFIG_IDE_LED) && \
  1373. !defined(CONFIG_AMIGAONEG3SE)&& \
  1374. !defined(CONFIG_CPC45) && \
  1375. !defined(CONFIG_HMI10) && \
  1376. !defined(CONFIG_KUP4K) && \
  1377. !defined(CONFIG_KUP4X)
  1378. static uchar led_buffer = 0; /* Buffer for current LED status */
  1379. static void ide_led (uchar led, uchar status)
  1380. {
  1381. uchar *led_port = LED_PORT;
  1382. if (status) { /* switch LED on */
  1383. led_buffer |= led;
  1384. } else { /* switch LED off */
  1385. led_buffer &= ~led;
  1386. }
  1387. *led_port = led_buffer;
  1388. }
  1389. #endif /* CONFIG_IDE_LED */
  1390. /* ------------------------------------------------------------------------- */
  1391. #ifdef CONFIG_ATAPI
  1392. /****************************************************************************
  1393. * ATAPI Support
  1394. */
  1395. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
  1396. /* since ATAPI may use commands with not 4 bytes alligned length
  1397. * we have our own transfer functions, 2 bytes alligned */
  1398. static void
  1399. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1400. {
  1401. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1402. uchar *dbuf;
  1403. volatile uchar *pbuf_even;
  1404. volatile uchar *pbuf_odd;
  1405. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1406. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1407. while (shorts--) {
  1408. EIEIO;
  1409. *pbuf_even = *dbuf++;
  1410. EIEIO;
  1411. *pbuf_odd = *dbuf++;
  1412. }
  1413. #else
  1414. ushort *dbuf;
  1415. volatile ushort *pbuf;
  1416. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1417. dbuf = (ushort *)sect_buf;
  1418. debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
  1419. while (shorts--) {
  1420. EIEIO;
  1421. *pbuf = *dbuf++;
  1422. }
  1423. #endif
  1424. }
  1425. static void
  1426. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1427. {
  1428. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1429. uchar *dbuf;
  1430. volatile uchar *pbuf_even;
  1431. volatile uchar *pbuf_odd;
  1432. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1433. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1434. while (shorts--) {
  1435. EIEIO;
  1436. *dbuf++ = *pbuf_even;
  1437. EIEIO;
  1438. *dbuf++ = *pbuf_odd;
  1439. }
  1440. #else
  1441. ushort *dbuf;
  1442. volatile ushort *pbuf;
  1443. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1444. dbuf = (ushort *)sect_buf;
  1445. debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
  1446. while (shorts--) {
  1447. EIEIO;
  1448. *dbuf++ = *pbuf;
  1449. }
  1450. #endif
  1451. }
  1452. #else /* ! __PPC__ */
  1453. static void
  1454. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1455. {
  1456. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1457. }
  1458. static void
  1459. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1460. {
  1461. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1462. }
  1463. #endif /* __PPC__ */
  1464. /*
  1465. * Wait until (Status & mask) == res, or timeout (in ms)
  1466. * Return last status
  1467. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  1468. * and then they set their DRQ Bit
  1469. */
  1470. static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
  1471. {
  1472. ulong delay = 10 * t; /* poll every 100 us */
  1473. uchar c;
  1474. c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
  1475. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  1476. /* break if error occurs (doesn't make sense to wait more) */
  1477. if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
  1478. break;
  1479. udelay (100);
  1480. if (delay-- == 0) {
  1481. break;
  1482. }
  1483. }
  1484. return (c);
  1485. }
  1486. /*
  1487. * issue an atapi command
  1488. */
  1489. unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
  1490. {
  1491. unsigned char c,err,mask,res;
  1492. int n;
  1493. ide_led (DEVICE_LED(device), 1); /* LED on */
  1494. /* Select device
  1495. */
  1496. mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
  1497. res = 0;
  1498. #ifdef CONFIG_AMIGAONEG3SE
  1499. # warning THF: Removed LBA mode ???
  1500. #endif
  1501. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1502. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1503. if ((c & mask) != res) {
  1504. printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
  1505. err=0xFF;
  1506. goto AI_OUT;
  1507. }
  1508. /* write taskfile */
  1509. ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  1510. ide_outb (device, ATA_SECT_CNT, 0);
  1511. ide_outb (device, ATA_SECT_NUM, 0);
  1512. ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
  1513. ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
  1514. #ifdef CONFIG_AMIGAONEG3SE
  1515. # warning THF: Removed LBA mode ???
  1516. #endif
  1517. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1518. ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
  1519. udelay (50);
  1520. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1521. res = ATA_STAT_DRQ;
  1522. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1523. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  1524. printf ("ATTAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
  1525. err=0xFF;
  1526. goto AI_OUT;
  1527. }
  1528. output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
  1529. /* ATAPI Command written wait for completition */
  1530. udelay (5000); /* device must set bsy */
  1531. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1532. /* if no data wait for DRQ = 0 BSY = 0
  1533. * if data wait for DRQ = 1 BSY = 0 */
  1534. res=0;
  1535. if(buflen)
  1536. res = ATA_STAT_DRQ;
  1537. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1538. if ((c & mask) != res ) {
  1539. if (c & ATA_STAT_ERR) {
  1540. err=(ide_inb(device,ATA_ERROR_REG))>>4;
  1541. debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
  1542. } else {
  1543. printf ("ATTAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
  1544. err=0xFF;
  1545. }
  1546. goto AI_OUT;
  1547. }
  1548. n=ide_inb(device, ATA_CYL_HIGH);
  1549. n<<=8;
  1550. n+=ide_inb(device, ATA_CYL_LOW);
  1551. if(n>buflen) {
  1552. printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
  1553. err=0xff;
  1554. goto AI_OUT;
  1555. }
  1556. if((n==0)&&(buflen<0)) {
  1557. printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
  1558. err=0xff;
  1559. goto AI_OUT;
  1560. }
  1561. if(n!=buflen) {
  1562. debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
  1563. }
  1564. if(n!=0) { /* data transfer */
  1565. debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
  1566. /* we transfer shorts */
  1567. n>>=1;
  1568. /* ok now decide if it is an in or output */
  1569. if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
  1570. debug ("Write to device\n");
  1571. output_data_shorts(device,(unsigned short *)buffer,n);
  1572. } else {
  1573. debug ("Read from device @ %p shorts %d\n",buffer,n);
  1574. input_data_shorts(device,(unsigned short *)buffer,n);
  1575. }
  1576. }
  1577. udelay(5000); /* seems that some CD ROMs need this... */
  1578. mask = ATA_STAT_BUSY|ATA_STAT_ERR;
  1579. res=0;
  1580. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1581. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1582. err=(ide_inb(device,ATA_ERROR_REG) >> 4);
  1583. debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
  1584. } else {
  1585. err = 0;
  1586. }
  1587. AI_OUT:
  1588. ide_led (DEVICE_LED(device), 0); /* LED off */
  1589. return (err);
  1590. }
  1591. /*
  1592. * sending the command to atapi_issue. If an status other than good
  1593. * returns, an request_sense will be issued
  1594. */
  1595. #define ATAPI_DRIVE_NOT_READY 100
  1596. #define ATAPI_UNIT_ATTN 10
  1597. unsigned char atapi_issue_autoreq (int device,
  1598. unsigned char* ccb,
  1599. int ccblen,
  1600. unsigned char *buffer,
  1601. int buflen)
  1602. {
  1603. unsigned char sense_data[18],sense_ccb[12];
  1604. unsigned char res,key,asc,ascq;
  1605. int notready,unitattn;
  1606. #ifdef CONFIG_AMIGAONEG3SE
  1607. char *s;
  1608. unsigned int timeout, retrycnt;
  1609. s = getenv("ide_cd_timeout");
  1610. timeout = s ? (simple_strtol(s, NULL, 10)*1000000)/5 : 0;
  1611. retrycnt = 0;
  1612. #endif
  1613. unitattn=ATAPI_UNIT_ATTN;
  1614. notready=ATAPI_DRIVE_NOT_READY;
  1615. retry:
  1616. res= atapi_issue(device,ccb,ccblen,buffer,buflen);
  1617. if (res==0)
  1618. return (0); /* Ok */
  1619. if (res==0xFF)
  1620. return (0xFF); /* error */
  1621. debug ("(auto_req)atapi_issue returned sense key %X\n",res);
  1622. memset(sense_ccb,0,sizeof(sense_ccb));
  1623. memset(sense_data,0,sizeof(sense_data));
  1624. sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
  1625. sense_ccb[4]=18; /* allocation Length */
  1626. res=atapi_issue(device,sense_ccb,12,sense_data,18);
  1627. key=(sense_data[2]&0xF);
  1628. asc=(sense_data[12]);
  1629. ascq=(sense_data[13]);
  1630. debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
  1631. debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  1632. sense_data[0],
  1633. key,
  1634. asc,
  1635. ascq);
  1636. if((key==0))
  1637. return 0; /* ok device ready */
  1638. if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
  1639. if(unitattn-->0) {
  1640. udelay(200*1000);
  1641. goto retry;
  1642. }
  1643. printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
  1644. goto error;
  1645. }
  1646. if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
  1647. if (notready-->0) {
  1648. udelay(200*1000);
  1649. goto retry;
  1650. }
  1651. printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
  1652. goto error;
  1653. }
  1654. if(asc==0x3a) {
  1655. debug ("Media not present\n");
  1656. goto error;
  1657. }
  1658. #ifdef CONFIG_AMIGAONEG3SE
  1659. if ((sense_data[2]&0xF)==0x0B) {
  1660. debug ("ABORTED COMMAND...retry\n");
  1661. if (retrycnt++ < 4)
  1662. goto retry;
  1663. return (0xFF);
  1664. }
  1665. if ((sense_data[2]&0xf) == 0x02 &&
  1666. sense_data[12] == 0x04 &&
  1667. sense_data[13] == 0x01 ) {
  1668. debug ("Waiting for unit to become active\n");
  1669. udelay(timeout);
  1670. if (retrycnt++ < 4)
  1671. goto retry;
  1672. return 0xFF;
  1673. }
  1674. #endif /* CONFIG_AMIGAONEG3SE */
  1675. printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1676. error:
  1677. debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1678. return (0xFF);
  1679. }
  1680. static void atapi_inquiry(block_dev_desc_t * dev_desc)
  1681. {
  1682. unsigned char ccb[12]; /* Command descriptor block */
  1683. unsigned char iobuf[64]; /* temp buf */
  1684. unsigned char c;
  1685. int device;
  1686. device=dev_desc->dev;
  1687. dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
  1688. dev_desc->block_read=atapi_read;
  1689. memset(ccb,0,sizeof(ccb));
  1690. memset(iobuf,0,sizeof(iobuf));
  1691. ccb[0]=ATAPI_CMD_INQUIRY;
  1692. ccb[4]=40; /* allocation Legnth */
  1693. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
  1694. debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
  1695. if (c!=0)
  1696. return;
  1697. /* copy device ident strings */
  1698. ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
  1699. ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
  1700. ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
  1701. dev_desc->lun=0;
  1702. dev_desc->lba=0;
  1703. dev_desc->blksz=0;
  1704. dev_desc->type=iobuf[0] & 0x1f;
  1705. if ((iobuf[1]&0x80)==0x80)
  1706. dev_desc->removable = 1;
  1707. else
  1708. dev_desc->removable = 0;
  1709. memset(ccb,0,sizeof(ccb));
  1710. memset(iobuf,0,sizeof(iobuf));
  1711. ccb[0]=ATAPI_CMD_START_STOP;
  1712. ccb[4]=0x03; /* start */
  1713. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1714. debug ("ATAPI_CMD_START_STOP returned %x\n",c);
  1715. if (c!=0)
  1716. return;
  1717. memset(ccb,0,sizeof(ccb));
  1718. memset(iobuf,0,sizeof(iobuf));
  1719. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1720. debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
  1721. if (c!=0)
  1722. return;
  1723. memset(ccb,0,sizeof(ccb));
  1724. memset(iobuf,0,sizeof(iobuf));
  1725. ccb[0]=ATAPI_CMD_READ_CAP;
  1726. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
  1727. debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
  1728. if (c!=0)
  1729. return;
  1730. debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  1731. iobuf[0],iobuf[1],iobuf[2],iobuf[3],
  1732. iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
  1733. dev_desc->lba =((unsigned long)iobuf[0]<<24) +
  1734. ((unsigned long)iobuf[1]<<16) +
  1735. ((unsigned long)iobuf[2]<< 8) +
  1736. ((unsigned long)iobuf[3]);
  1737. dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
  1738. ((unsigned long)iobuf[5]<<16) +
  1739. ((unsigned long)iobuf[6]<< 8) +
  1740. ((unsigned long)iobuf[7]);
  1741. #ifdef CONFIG_LBA48
  1742. dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  1743. #endif
  1744. return;
  1745. }
  1746. /*
  1747. * atapi_read:
  1748. * we transfer only one block per command, since the multiple DRQ per
  1749. * command is not yet implemented
  1750. */
  1751. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  1752. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  1753. #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
  1754. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1755. {
  1756. ulong n = 0;
  1757. unsigned char ccb[12]; /* Command descriptor block */
  1758. ulong cnt;
  1759. debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
  1760. device, blknr, blkcnt, (ulong)buffer);
  1761. do {
  1762. if (blkcnt>ATAPI_READ_MAX_BLOCK) {
  1763. cnt=ATAPI_READ_MAX_BLOCK;
  1764. } else {
  1765. cnt=blkcnt;
  1766. }
  1767. ccb[0]=ATAPI_CMD_READ_12;
  1768. ccb[1]=0; /* reserved */
  1769. ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
  1770. ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
  1771. ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
  1772. ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
  1773. ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
  1774. ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
  1775. ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
  1776. ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
  1777. ccb[10]=0; /* reserved */
  1778. ccb[11]=0; /* reserved */
  1779. if (atapi_issue_autoreq(device,ccb,12,
  1780. (unsigned char *)buffer,
  1781. cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
  1782. return (n);
  1783. }
  1784. n+=cnt;
  1785. blkcnt-=cnt;
  1786. blknr+=cnt;
  1787. buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
  1788. } while (blkcnt > 0);
  1789. return (n);
  1790. }
  1791. /* ------------------------------------------------------------------------- */
  1792. #endif /* CONFIG_ATAPI */
  1793. U_BOOT_CMD(
  1794. ide, 5, 1, do_ide,
  1795. "ide - IDE sub-system\n",
  1796. "reset - reset IDE controller\n"
  1797. "ide info - show available IDE devices\n"
  1798. "ide device [dev] - show or set current device\n"
  1799. "ide part [dev] - print partition table of one or all IDE devices\n"
  1800. "ide read addr blk# cnt\n"
  1801. "ide write addr blk# cnt - read/write `cnt'"
  1802. " blocks starting at block `blk#'\n"
  1803. " to/from memory address `addr'\n"
  1804. );
  1805. U_BOOT_CMD(
  1806. diskboot, 3, 1, do_diskboot,
  1807. "diskboot- boot from IDE device\n",
  1808. "loadAddr dev:part\n"
  1809. );