mx31ads.c 2.5 KB

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  1. /*
  2. * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #include <common.h>
  23. #include <asm/io.h>
  24. #include <asm/arch/mx31.h>
  25. #include <asm/arch/mx31-regs.h>
  26. DECLARE_GLOBAL_DATA_PTR;
  27. int dram_init (void)
  28. {
  29. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  30. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  31. return 0;
  32. }
  33. int board_init (void)
  34. {
  35. int i;
  36. /* CS0: Nor Flash */
  37. /*
  38. * CS0L and CS0A values are from the RedBoot sources by Freescale
  39. * and are also equal to those used by Sascha Hauer for the Phytec
  40. * i.MX31 board. CS0U is just a slightly optimized hardware default:
  41. * the only non-zero field "Wait State Control" is set to half the
  42. * default value.
  43. */
  44. __REG(CSCR_U(0)) = 0x00000f00;
  45. __REG(CSCR_L(0)) = 0x10000D03;
  46. __REG(CSCR_A(0)) = 0x00720900;
  47. /* setup pins for UART1 */
  48. mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
  49. mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
  50. mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
  51. mx31_gpio_mux(MUX_RTS1__UART1_CTS_B);
  52. /* PBC setup */
  53. /* Enable UART transceivers also reset the Ethernet/external UART */
  54. readw(CS4_BASE + 4);
  55. writew(0x8023, CS4_BASE + 4);
  56. /* RedBoot also has an empty loop with 100000 iterations here -
  57. * clock doesn't run yet */
  58. for (i = 0; i < 100000; i++)
  59. ;
  60. /* Clear the reset, toggle the LEDs */
  61. writew(0xDF, CS4_BASE + 6);
  62. /* clock still doesn't run */
  63. for (i = 0; i < 100000; i++)
  64. ;
  65. /* See 1.5.4 in IMX31ADSE_PERI_BUS_CNTRL_CPLD_RM.pdf */
  66. readb(CS4_BASE + 8);
  67. readb(CS4_BASE + 7);
  68. readb(CS4_BASE + 8);
  69. readb(CS4_BASE + 7);
  70. gd->bd->bi_arch_number = 447; /* board id for linux */
  71. gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */
  72. return 0;
  73. }
  74. int checkboard (void)
  75. {
  76. printf("Board: MX31ADS\n");
  77. return 0;
  78. }