i2c.c 8.2 KB

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  1. /*
  2. * (C) Copyright 2003 - 2009
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. * Based on the MPC5xxx code.
  24. */
  25. #include <common.h>
  26. #include <asm/io.h>
  27. DECLARE_GLOBAL_DATA_PTR;
  28. #ifdef CONFIG_HARD_I2C
  29. #include <i2c.h>
  30. /* by default set I2C bus 0 active */
  31. static unsigned int bus_num __attribute__ ((section (".data"))) = 0;
  32. #define I2C_TIMEOUT 100
  33. #define I2C_RETRIES 3
  34. struct mpc512x_i2c_tap {
  35. int scl2tap;
  36. int tap2tap;
  37. };
  38. static int mpc_reg_in(volatile u32 *reg);
  39. static void mpc_reg_out(volatile u32 *reg, int val, int mask);
  40. static int wait_for_bb(void);
  41. static int wait_for_pin(int *status);
  42. static int do_address(uchar chip, char rdwr_flag);
  43. static int send_bytes(uchar chip, char *buf, int len);
  44. static int receive_bytes(uchar chip, char *buf, int len);
  45. static int mpc_get_fdr(int);
  46. static int mpc_reg_in (volatile u32 *reg)
  47. {
  48. int ret = in_be32(reg) >> 24;
  49. return ret;
  50. }
  51. static void mpc_reg_out (volatile u32 *reg, int val, int mask)
  52. {
  53. if (!mask) {
  54. out_be32(reg, val << 24);
  55. } else {
  56. clrsetbits_be32(reg, mask << 24, (val & mask) << 24);
  57. }
  58. }
  59. static int wait_for_bb (void)
  60. {
  61. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  62. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  63. int timeout = I2C_TIMEOUT;
  64. int status;
  65. status = mpc_reg_in (&regs->msr);
  66. while (timeout-- && (status & I2C_BB)) {
  67. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  68. (void)mpc_reg_in(&regs->mdr);
  69. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  70. mpc_reg_out (&regs->mcr, 0, 0);
  71. mpc_reg_out (&regs->mcr, I2C_EN, 0);
  72. udelay (1000);
  73. status = mpc_reg_in (&regs->msr);
  74. }
  75. return (status & I2C_BB);
  76. }
  77. static int wait_for_pin (int *status)
  78. {
  79. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  80. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  81. int timeout = I2C_TIMEOUT;
  82. *status = mpc_reg_in (&regs->msr);
  83. while (timeout-- && !(*status & I2C_IF)) {
  84. udelay (1000);
  85. *status = mpc_reg_in (&regs->msr);
  86. }
  87. if (!(*status & I2C_IF)) {
  88. return -1;
  89. }
  90. mpc_reg_out (&regs->msr, 0, I2C_IF);
  91. return 0;
  92. }
  93. static int do_address (uchar chip, char rdwr_flag)
  94. {
  95. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  96. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  97. int status;
  98. chip <<= 1;
  99. if (rdwr_flag) {
  100. chip |= 1;
  101. }
  102. mpc_reg_out (&regs->mcr, I2C_TX, I2C_TX);
  103. mpc_reg_out (&regs->mdr, chip, 0);
  104. if (wait_for_pin (&status)) {
  105. return -2;
  106. }
  107. if (status & I2C_RXAK) {
  108. return -3;
  109. }
  110. return 0;
  111. }
  112. static int send_bytes (uchar chip, char *buf, int len)
  113. {
  114. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  115. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  116. int wrcount;
  117. int status;
  118. for (wrcount = 0; wrcount < len; ++wrcount) {
  119. mpc_reg_out (&regs->mdr, buf[wrcount], 0);
  120. if (wait_for_pin (&status)) {
  121. break;
  122. }
  123. if (status & I2C_RXAK) {
  124. break;
  125. }
  126. }
  127. return !(wrcount == len);
  128. }
  129. static int receive_bytes (uchar chip, char *buf, int len)
  130. {
  131. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  132. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  133. int dummy = 1;
  134. int rdcount = 0;
  135. int status;
  136. int i;
  137. mpc_reg_out (&regs->mcr, 0, I2C_TX);
  138. for (i = 0; i < len; ++i) {
  139. buf[rdcount] = mpc_reg_in (&regs->mdr);
  140. if (dummy) {
  141. dummy = 0;
  142. } else {
  143. rdcount++;
  144. }
  145. if (wait_for_pin (&status)) {
  146. return -4;
  147. }
  148. }
  149. mpc_reg_out (&regs->mcr, I2C_TXAK, I2C_TXAK);
  150. buf[rdcount++] = mpc_reg_in (&regs->mdr);
  151. if (wait_for_pin (&status)) {
  152. return -5;
  153. }
  154. mpc_reg_out (&regs->mcr, 0, I2C_TXAK);
  155. return 0;
  156. }
  157. /**************** I2C API ****************/
  158. void i2c_init (int speed, int saddr)
  159. {
  160. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  161. int i;
  162. for (i = 0; i < I2C_BUS_CNT; i++){
  163. volatile i2c512x_dev_t *regs = &im->i2c.dev[i];
  164. mpc_reg_out (&regs->mcr, 0, 0);
  165. /* Set clock */
  166. mpc_reg_out (&regs->mfdr, mpc_get_fdr (speed), 0);
  167. mpc_reg_out (&regs->madr, saddr << 1, 0);
  168. /* Enable module */
  169. mpc_reg_out (&regs->mcr, I2C_EN, I2C_INIT_MASK);
  170. mpc_reg_out (&regs->msr, 0, I2C_IF);
  171. }
  172. /* Disable interrupts */
  173. out_be32(&im->i2c.icr, 0);
  174. /* Turn off filters */
  175. out_be32(&im->i2c.mifr, 0);
  176. }
  177. static int mpc_get_fdr (int speed)
  178. {
  179. static int fdr = -1;
  180. if (fdr == -1) {
  181. ulong best_speed = 0;
  182. ulong divider;
  183. ulong ips, scl;
  184. ulong bestmatch = 0xffffffffUL;
  185. int best_i = 0, best_j = 0, i, j;
  186. int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
  187. struct mpc512x_i2c_tap scltap[] = {
  188. {4, 1},
  189. {4, 2},
  190. {6, 4},
  191. {6, 8},
  192. {14, 16},
  193. {30, 32},
  194. {62, 64},
  195. {126, 128}
  196. };
  197. ips = gd->ips_clk;
  198. for (i = 7; i >= 0; i--) {
  199. for (j = 7; j >= 0; j--) {
  200. scl = 2 * (scltap[j].scl2tap +
  201. (SCL_Tap[i] - 1) * scltap[j].tap2tap
  202. + 2);
  203. if (ips <= speed*scl) {
  204. if ((speed*scl - ips) < bestmatch) {
  205. bestmatch = speed*scl - ips;
  206. best_i = i;
  207. best_j = j;
  208. best_speed = ips/scl;
  209. }
  210. }
  211. }
  212. }
  213. divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
  214. if (gd->flags & GD_FLG_RELOC) {
  215. fdr = divider;
  216. } else {
  217. debug("%ld kHz, \n", best_speed / 1000);
  218. return divider;
  219. }
  220. }
  221. return fdr;
  222. }
  223. int i2c_probe (uchar chip)
  224. {
  225. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  226. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  227. int i;
  228. for (i = 0; i < I2C_RETRIES; i++) {
  229. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  230. if (! do_address (chip, 0)) {
  231. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  232. udelay (500);
  233. break;
  234. }
  235. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  236. udelay (500);
  237. }
  238. return (i == I2C_RETRIES);
  239. }
  240. int i2c_read (uchar chip, uint addr, int alen, uchar *buf, int len)
  241. {
  242. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  243. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  244. char xaddr[4];
  245. int ret = -1;
  246. xaddr[0] = (addr >> 24) & 0xFF;
  247. xaddr[1] = (addr >> 16) & 0xFF;
  248. xaddr[2] = (addr >> 8) & 0xFF;
  249. xaddr[3] = addr & 0xFF;
  250. if (wait_for_bb ()) {
  251. printf ("i2c_read: bus is busy\n");
  252. goto Done;
  253. }
  254. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  255. if (do_address (chip, 0)) {
  256. printf ("i2c_read: failed to address chip\n");
  257. goto Done;
  258. }
  259. if (send_bytes (chip, &xaddr[4-alen], alen)) {
  260. printf ("i2c_read: send_bytes failed\n");
  261. goto Done;
  262. }
  263. mpc_reg_out (&regs->mcr, I2C_RSTA, I2C_RSTA);
  264. if (do_address (chip, 1)) {
  265. printf ("i2c_read: failed to address chip\n");
  266. goto Done;
  267. }
  268. if (receive_bytes (chip, (char *)buf, len)) {
  269. printf ("i2c_read: receive_bytes failed\n");
  270. goto Done;
  271. }
  272. ret = 0;
  273. Done:
  274. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  275. return ret;
  276. }
  277. int i2c_write (uchar chip, uint addr, int alen, uchar *buf, int len)
  278. {
  279. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  280. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  281. char xaddr[4];
  282. int ret = -1;
  283. xaddr[0] = (addr >> 24) & 0xFF;
  284. xaddr[1] = (addr >> 16) & 0xFF;
  285. xaddr[2] = (addr >> 8) & 0xFF;
  286. xaddr[3] = addr & 0xFF;
  287. if (wait_for_bb ()) {
  288. printf ("i2c_write: bus is busy\n");
  289. goto Done;
  290. }
  291. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  292. if (do_address (chip, 0)) {
  293. printf ("i2c_write: failed to address chip\n");
  294. goto Done;
  295. }
  296. if (send_bytes (chip, &xaddr[4-alen], alen)) {
  297. printf ("i2c_write: send_bytes failed\n");
  298. goto Done;
  299. }
  300. if (send_bytes (chip, (char *)buf, len)) {
  301. printf ("i2c_write: send_bytes failed\n");
  302. goto Done;
  303. }
  304. ret = 0;
  305. Done:
  306. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  307. return ret;
  308. }
  309. int i2c_set_bus_num (unsigned int bus)
  310. {
  311. if (bus >= I2C_BUS_CNT) {
  312. return -1;
  313. }
  314. bus_num = bus;
  315. return 0;
  316. }
  317. unsigned int i2c_get_bus_num (void)
  318. {
  319. return bus_num;
  320. }
  321. #endif /* CONFIG_HARD_I2C */