altera.c 7.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287
  1. /*
  2. * (C) Copyright 2003
  3. * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de
  4. *
  5. * (C) Copyright 2002
  6. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. *
  26. */
  27. /*
  28. * Altera FPGA support
  29. */
  30. #include <common.h>
  31. #include <ACEX1K.h>
  32. #include <stratixII.h>
  33. /* Define FPGA_DEBUG to get debug printf's */
  34. /* #define FPGA_DEBUG */
  35. #ifdef FPGA_DEBUG
  36. #define PRINTF(fmt,args...) printf (fmt ,##args)
  37. #else
  38. #define PRINTF(fmt,args...)
  39. #endif
  40. #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA)
  41. /* Local Static Functions */
  42. static int altera_validate (Altera_desc * desc, const char *fn);
  43. /* ------------------------------------------------------------------------- */
  44. int altera_load( Altera_desc *desc, void *buf, size_t bsize )
  45. {
  46. int ret_val = FPGA_FAIL; /* assume a failure */
  47. if (!altera_validate (desc, (char *)__FUNCTION__)) {
  48. printf ("%s: Invalid device descriptor\n", __FUNCTION__);
  49. } else {
  50. switch (desc->family) {
  51. case Altera_ACEX1K:
  52. case Altera_CYC2:
  53. #if defined(CONFIG_FPGA_ACEX1K)
  54. PRINTF ("%s: Launching the ACEX1K Loader...\n",
  55. __FUNCTION__);
  56. ret_val = ACEX1K_load (desc, buf, bsize);
  57. #elif defined(CONFIG_FPGA_CYCLON2)
  58. PRINTF ("%s: Launching the CYCLON II Loader...\n",
  59. __FUNCTION__);
  60. ret_val = CYC2_load (desc, buf, bsize);
  61. #else
  62. printf ("%s: No support for ACEX1K devices.\n",
  63. __FUNCTION__);
  64. #endif
  65. break;
  66. #if defined(CONFIG_FPGA_STRATIX_II)
  67. case Altera_StratixII:
  68. PRINTF ("%s: Launching the Stratix II Loader...\n",
  69. __FUNCTION__);
  70. ret_val = StratixII_load (desc, buf, bsize);
  71. break;
  72. #endif
  73. default:
  74. printf ("%s: Unsupported family type, %d\n",
  75. __FUNCTION__, desc->family);
  76. }
  77. }
  78. return ret_val;
  79. }
  80. int altera_dump( Altera_desc *desc, void *buf, size_t bsize )
  81. {
  82. int ret_val = FPGA_FAIL; /* assume a failure */
  83. if (!altera_validate (desc, (char *)__FUNCTION__)) {
  84. printf ("%s: Invalid device descriptor\n", __FUNCTION__);
  85. } else {
  86. switch (desc->family) {
  87. case Altera_ACEX1K:
  88. #if defined(CONFIG_FPGA_ACEX)
  89. PRINTF ("%s: Launching the ACEX1K Reader...\n",
  90. __FUNCTION__);
  91. ret_val = ACEX1K_dump (desc, buf, bsize);
  92. #else
  93. printf ("%s: No support for ACEX1K devices.\n",
  94. __FUNCTION__);
  95. #endif
  96. break;
  97. #if defined(CONFIG_FPGA_STRATIX_II)
  98. case Altera_StratixII:
  99. PRINTF ("%s: Launching the Stratix II Reader...\n",
  100. __FUNCTION__);
  101. ret_val = StratixII_dump (desc, buf, bsize);
  102. break;
  103. #endif
  104. default:
  105. printf ("%s: Unsupported family type, %d\n",
  106. __FUNCTION__, desc->family);
  107. }
  108. }
  109. return ret_val;
  110. }
  111. int altera_info( Altera_desc *desc )
  112. {
  113. int ret_val = FPGA_FAIL;
  114. if (altera_validate (desc, (char *)__FUNCTION__)) {
  115. printf ("Family: \t");
  116. switch (desc->family) {
  117. case Altera_ACEX1K:
  118. printf ("ACEX1K\n");
  119. break;
  120. case Altera_CYC2:
  121. printf ("CYCLON II\n");
  122. break;
  123. case Altera_StratixII:
  124. printf ("Stratix II\n");
  125. break;
  126. /* Add new family types here */
  127. default:
  128. printf ("Unknown family type, %d\n", desc->family);
  129. }
  130. printf ("Interface type:\t");
  131. switch (desc->iface) {
  132. case passive_serial:
  133. printf ("Passive Serial (PS)\n");
  134. break;
  135. case passive_parallel_synchronous:
  136. printf ("Passive Parallel Synchronous (PPS)\n");
  137. break;
  138. case passive_parallel_asynchronous:
  139. printf ("Passive Parallel Asynchronous (PPA)\n");
  140. break;
  141. case passive_serial_asynchronous:
  142. printf ("Passive Serial Asynchronous (PSA)\n");
  143. break;
  144. case altera_jtag_mode: /* Not used */
  145. printf ("JTAG Mode\n");
  146. break;
  147. case fast_passive_parallel:
  148. printf ("Fast Passive Parallel (FPP)\n");
  149. break;
  150. case fast_passive_parallel_security:
  151. printf
  152. ("Fast Passive Parallel with Security (FPPS) \n");
  153. break;
  154. /* Add new interface types here */
  155. default:
  156. printf ("Unsupported interface type, %d\n", desc->iface);
  157. }
  158. printf ("Device Size: \t%d bytes\n"
  159. "Cookie: \t0x%x (%d)\n",
  160. desc->size, desc->cookie, desc->cookie);
  161. if (desc->iface_fns) {
  162. printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
  163. switch (desc->family) {
  164. case Altera_ACEX1K:
  165. case Altera_CYC2:
  166. #if defined(CONFIG_FPGA_ACEX1K)
  167. ACEX1K_info (desc);
  168. #elif defined(CONFIG_FPGA_CYCLON2)
  169. CYC2_info (desc);
  170. #else
  171. /* just in case */
  172. printf ("%s: No support for ACEX1K devices.\n",
  173. __FUNCTION__);
  174. #endif
  175. break;
  176. #if defined(CONFIG_FPGA_STRATIX_II)
  177. case Altera_StratixII:
  178. StratixII_info (desc);
  179. break;
  180. #endif
  181. /* Add new family types here */
  182. default:
  183. /* we don't need a message here - we give one up above */
  184. break;
  185. }
  186. } else {
  187. printf ("No Device Function Table.\n");
  188. }
  189. ret_val = FPGA_SUCCESS;
  190. } else {
  191. printf ("%s: Invalid device descriptor\n", __FUNCTION__);
  192. }
  193. return ret_val;
  194. }
  195. int altera_reloc( Altera_desc *desc, ulong reloc_offset)
  196. {
  197. int ret_val = FPGA_FAIL; /* assume a failure */
  198. if (!altera_validate (desc, (char *)__FUNCTION__)) {
  199. printf ("%s: Invalid device descriptor\n", __FUNCTION__);
  200. } else {
  201. switch (desc->family) {
  202. case Altera_ACEX1K:
  203. #if defined(CONFIG_FPGA_ACEX1K)
  204. ret_val = ACEX1K_reloc (desc, reloc_offset);
  205. #else
  206. printf ("%s: No support for ACEX devices.\n",
  207. __FUNCTION__);
  208. #endif
  209. break;
  210. #if defined(CONFIG_FPGA_STRATIX_II)
  211. case Altera_StratixII:
  212. ret_val = StratixII_reloc (desc, reloc_offset);
  213. break;
  214. #endif
  215. case Altera_CYC2:
  216. #if defined(CONFIG_FPGA_CYCLON2)
  217. ret_val = CYC2_reloc (desc, reloc_offset);
  218. #else
  219. printf ("%s: No support for CYCLON II devices.\n",
  220. __FUNCTION__);
  221. #endif
  222. break;
  223. /* Add new family types here */
  224. default:
  225. printf ("%s: Unsupported family type, %d\n",
  226. __FUNCTION__, desc->family);
  227. }
  228. }
  229. return ret_val;
  230. }
  231. /* ------------------------------------------------------------------------- */
  232. static int altera_validate (Altera_desc * desc, const char *fn)
  233. {
  234. int ret_val = FALSE;
  235. if (desc) {
  236. if ((desc->family > min_altera_type) &&
  237. (desc->family < max_altera_type)) {
  238. if ((desc->iface > min_altera_iface_type) &&
  239. (desc->iface < max_altera_iface_type)) {
  240. if (desc->size) {
  241. ret_val = TRUE;
  242. } else {
  243. printf ("%s: NULL part size\n", fn);
  244. }
  245. } else {
  246. printf ("%s: Invalid Interface type, %d\n",
  247. fn, desc->iface);
  248. }
  249. } else {
  250. printf ("%s: Invalid family type, %d\n", fn, desc->family);
  251. }
  252. } else {
  253. printf ("%s: NULL descriptor!\n", fn);
  254. }
  255. return ret_val;
  256. }
  257. /* ------------------------------------------------------------------------- */
  258. #endif /* CONFIG_FPGA & CONFIG_FPGA_ALTERA */