cmd_ide.c 53 KB

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  1. /*
  2. * (C) Copyright 2000-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * IDE support
  26. */
  27. #include <common.h>
  28. #include <config.h>
  29. #include <watchdog.h>
  30. #include <command.h>
  31. #include <image.h>
  32. #include <asm/byteorder.h>
  33. #include <asm/io.h>
  34. #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
  35. # include <pcmcia.h>
  36. #endif
  37. #ifdef CONFIG_8xx
  38. # include <mpc8xx.h>
  39. #endif
  40. #ifdef CONFIG_MPC5xxx
  41. #include <mpc5xxx.h>
  42. #endif
  43. #include <ide.h>
  44. #include <ata.h>
  45. #ifdef CONFIG_STATUS_LED
  46. # include <status_led.h>
  47. #endif
  48. #ifdef CONFIG_IDE_8xx_DIRECT
  49. DECLARE_GLOBAL_DATA_PTR;
  50. #endif
  51. #ifdef __PPC__
  52. # define EIEIO __asm__ volatile ("eieio")
  53. # define SYNC __asm__ volatile ("sync")
  54. #else
  55. # define EIEIO /* nothing */
  56. # define SYNC /* nothing */
  57. #endif
  58. #ifdef CONFIG_IDE_8xx_DIRECT
  59. /* Timings for IDE Interface
  60. *
  61. * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
  62. * 70 165 30 PIO-Mode 0, [ns]
  63. * 4 9 2 [Cycles]
  64. * 50 125 20 PIO-Mode 1, [ns]
  65. * 3 7 2 [Cycles]
  66. * 30 100 15 PIO-Mode 2, [ns]
  67. * 2 6 1 [Cycles]
  68. * 30 80 10 PIO-Mode 3, [ns]
  69. * 2 5 1 [Cycles]
  70. * 25 70 10 PIO-Mode 4, [ns]
  71. * 2 4 1 [Cycles]
  72. */
  73. const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
  74. {
  75. /* Setup Length Hold */
  76. { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
  77. { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
  78. { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
  79. { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
  80. { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
  81. };
  82. static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
  83. #ifndef CONFIG_SYS_PIO_MODE
  84. #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
  85. #endif
  86. static int pio_mode = CONFIG_SYS_PIO_MODE;
  87. /* Make clock cycles and always round up */
  88. #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
  89. #endif /* CONFIG_IDE_8xx_DIRECT */
  90. /* ------------------------------------------------------------------------- */
  91. /* Current I/O Device */
  92. static int curr_device = -1;
  93. /* Current offset for IDE0 / IDE1 bus access */
  94. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  95. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  96. CONFIG_SYS_ATA_IDE0_OFFSET,
  97. #endif
  98. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  99. CONFIG_SYS_ATA_IDE1_OFFSET,
  100. #endif
  101. };
  102. #ifndef CONFIG_AMIGAONEG3SE
  103. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  104. #else
  105. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS] = {0,};
  106. #endif
  107. block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  108. /* ------------------------------------------------------------------------- */
  109. #ifdef CONFIG_IDE_LED
  110. #if !defined(CONFIG_KUP4K) && !defined(CONFIG_KUP4X) &&!defined(CONFIG_BMS2003) &&!defined(CONFIG_CPC45)
  111. static void ide_led (uchar led, uchar status);
  112. #else
  113. extern void ide_led (uchar led, uchar status);
  114. #endif
  115. #else
  116. #ifndef CONFIG_AMIGAONEG3SE
  117. #define ide_led(a,b) /* dummy */
  118. #else
  119. extern void ide_led(uchar led, uchar status);
  120. #define LED_IDE1 1
  121. #define LED_IDE2 2
  122. #define CONFIG_IDE_LED 1
  123. #define DEVICE_LED(x) 1
  124. #endif
  125. #endif
  126. #ifdef CONFIG_IDE_RESET
  127. static void ide_reset (void);
  128. #else
  129. #define ide_reset() /* dummy */
  130. #endif
  131. static void ide_ident (block_dev_desc_t *dev_desc);
  132. static uchar ide_wait (int dev, ulong t);
  133. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  134. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  135. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  136. static void input_data(int dev, ulong *sect_buf, int words);
  137. static void output_data(int dev, ulong *sect_buf, int words);
  138. static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
  139. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  140. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  141. #endif
  142. #ifdef CONFIG_ATAPI
  143. static void atapi_inquiry(block_dev_desc_t *dev_desc);
  144. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
  145. #endif
  146. #ifdef CONFIG_IDE_8xx_DIRECT
  147. static void set_pcmcia_timing (int pmode);
  148. #endif
  149. /* ------------------------------------------------------------------------- */
  150. int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  151. {
  152. int rcode = 0;
  153. switch (argc) {
  154. case 0:
  155. case 1:
  156. printf ("Usage:\n%s\n", cmdtp->usage);
  157. return 1;
  158. case 2:
  159. if (strncmp(argv[1],"res",3) == 0) {
  160. puts ("\nReset IDE"
  161. #ifdef CONFIG_IDE_8xx_DIRECT
  162. " on PCMCIA " PCMCIA_SLOT_MSG
  163. #endif
  164. ": ");
  165. ide_init ();
  166. return 0;
  167. } else if (strncmp(argv[1],"inf",3) == 0) {
  168. int i;
  169. putc ('\n');
  170. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  171. if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
  172. continue; /* list only known devices */
  173. printf ("IDE device %d: ", i);
  174. dev_print(&ide_dev_desc[i]);
  175. }
  176. return 0;
  177. } else if (strncmp(argv[1],"dev",3) == 0) {
  178. if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
  179. puts ("\nno IDE devices available\n");
  180. return 1;
  181. }
  182. printf ("\nIDE device %d: ", curr_device);
  183. dev_print(&ide_dev_desc[curr_device]);
  184. return 0;
  185. } else if (strncmp(argv[1],"part",4) == 0) {
  186. int dev, ok;
  187. for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
  188. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  189. ++ok;
  190. if (dev)
  191. putc ('\n');
  192. print_part(&ide_dev_desc[dev]);
  193. }
  194. }
  195. if (!ok) {
  196. puts ("\nno IDE devices available\n");
  197. rcode ++;
  198. }
  199. return rcode;
  200. }
  201. printf ("Usage:\n%s\n", cmdtp->usage);
  202. return 1;
  203. case 3:
  204. if (strncmp(argv[1],"dev",3) == 0) {
  205. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  206. printf ("\nIDE device %d: ", dev);
  207. if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
  208. puts ("unknown device\n");
  209. return 1;
  210. }
  211. dev_print(&ide_dev_desc[dev]);
  212. /*ide_print (dev);*/
  213. if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
  214. return 1;
  215. }
  216. curr_device = dev;
  217. puts ("... is now current device\n");
  218. return 0;
  219. } else if (strncmp(argv[1],"part",4) == 0) {
  220. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  221. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  222. print_part(&ide_dev_desc[dev]);
  223. } else {
  224. printf ("\nIDE device %d not available\n", dev);
  225. rcode = 1;
  226. }
  227. return rcode;
  228. #if 0
  229. } else if (strncmp(argv[1],"pio",4) == 0) {
  230. int mode = (int)simple_strtoul(argv[2], NULL, 10);
  231. if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
  232. puts ("\nSetting ");
  233. pio_mode = mode;
  234. ide_init ();
  235. } else {
  236. printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
  237. mode, IDE_MAX_PIO_MODE);
  238. }
  239. return;
  240. #endif
  241. }
  242. printf ("Usage:\n%s\n", cmdtp->usage);
  243. return 1;
  244. default:
  245. /* at least 4 args */
  246. if (strcmp(argv[1],"read") == 0) {
  247. ulong addr = simple_strtoul(argv[2], NULL, 16);
  248. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  249. ulong n;
  250. #ifdef CONFIG_SYS_64BIT_LBA
  251. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  252. printf ("\nIDE read: device %d block # %qd, count %ld ... ",
  253. curr_device, blk, cnt);
  254. #else
  255. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  256. printf ("\nIDE read: device %d block # %ld, count %ld ... ",
  257. curr_device, blk, cnt);
  258. #endif
  259. n = ide_dev_desc[curr_device].block_read (curr_device,
  260. blk, cnt,
  261. (ulong *)addr);
  262. /* flush cache after read */
  263. flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
  264. printf ("%ld blocks read: %s\n",
  265. n, (n==cnt) ? "OK" : "ERROR");
  266. if (n==cnt) {
  267. return 0;
  268. } else {
  269. return 1;
  270. }
  271. } else if (strcmp(argv[1],"write") == 0) {
  272. ulong addr = simple_strtoul(argv[2], NULL, 16);
  273. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  274. ulong n;
  275. #ifdef CONFIG_SYS_64BIT_LBA
  276. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  277. printf ("\nIDE write: device %d block # %qd, count %ld ... ",
  278. curr_device, blk, cnt);
  279. #else
  280. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  281. printf ("\nIDE write: device %d block # %ld, count %ld ... ",
  282. curr_device, blk, cnt);
  283. #endif
  284. n = ide_write (curr_device, blk, cnt, (ulong *)addr);
  285. printf ("%ld blocks written: %s\n",
  286. n, (n==cnt) ? "OK" : "ERROR");
  287. if (n==cnt) {
  288. return 0;
  289. } else {
  290. return 1;
  291. }
  292. } else {
  293. printf ("Usage:\n%s\n", cmdtp->usage);
  294. rcode = 1;
  295. }
  296. return rcode;
  297. }
  298. }
  299. int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  300. {
  301. char *boot_device = NULL;
  302. char *ep;
  303. int dev, part = 0;
  304. ulong addr, cnt;
  305. disk_partition_t info;
  306. image_header_t *hdr;
  307. int rcode = 0;
  308. #if defined(CONFIG_FIT)
  309. const void *fit_hdr = NULL;
  310. #endif
  311. show_boot_progress (41);
  312. switch (argc) {
  313. case 1:
  314. addr = CONFIG_SYS_LOAD_ADDR;
  315. boot_device = getenv ("bootdevice");
  316. break;
  317. case 2:
  318. addr = simple_strtoul(argv[1], NULL, 16);
  319. boot_device = getenv ("bootdevice");
  320. break;
  321. case 3:
  322. addr = simple_strtoul(argv[1], NULL, 16);
  323. boot_device = argv[2];
  324. break;
  325. default:
  326. printf ("Usage:\n%s\n", cmdtp->usage);
  327. show_boot_progress (-42);
  328. return 1;
  329. }
  330. show_boot_progress (42);
  331. if (!boot_device) {
  332. puts ("\n** No boot device **\n");
  333. show_boot_progress (-43);
  334. return 1;
  335. }
  336. show_boot_progress (43);
  337. dev = simple_strtoul(boot_device, &ep, 16);
  338. if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
  339. printf ("\n** Device %d not available\n", dev);
  340. show_boot_progress (-44);
  341. return 1;
  342. }
  343. show_boot_progress (44);
  344. if (*ep) {
  345. if (*ep != ':') {
  346. puts ("\n** Invalid boot device, use `dev[:part]' **\n");
  347. show_boot_progress (-45);
  348. return 1;
  349. }
  350. part = simple_strtoul(++ep, NULL, 16);
  351. }
  352. show_boot_progress (45);
  353. if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
  354. show_boot_progress (-46);
  355. return 1;
  356. }
  357. show_boot_progress (46);
  358. if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
  359. (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
  360. printf ("\n** Invalid partition type \"%.32s\""
  361. " (expect \"" BOOT_PART_TYPE "\")\n",
  362. info.type);
  363. show_boot_progress (-47);
  364. return 1;
  365. }
  366. show_boot_progress (47);
  367. printf ("\nLoading from IDE device %d, partition %d: "
  368. "Name: %.32s Type: %.32s\n",
  369. dev, part, info.name, info.type);
  370. debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
  371. info.start, info.size, info.blksz);
  372. if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
  373. printf ("** Read error on %d:%d\n", dev, part);
  374. show_boot_progress (-48);
  375. return 1;
  376. }
  377. show_boot_progress (48);
  378. switch (genimg_get_format ((void *)addr)) {
  379. case IMAGE_FORMAT_LEGACY:
  380. hdr = (image_header_t *)addr;
  381. show_boot_progress (49);
  382. if (!image_check_hcrc (hdr)) {
  383. puts ("\n** Bad Header Checksum **\n");
  384. show_boot_progress (-50);
  385. return 1;
  386. }
  387. show_boot_progress (50);
  388. image_print_contents (hdr);
  389. cnt = image_get_image_size (hdr);
  390. break;
  391. #if defined(CONFIG_FIT)
  392. case IMAGE_FORMAT_FIT:
  393. fit_hdr = (const void *)addr;
  394. puts ("Fit image detected...\n");
  395. cnt = fit_get_size (fit_hdr);
  396. break;
  397. #endif
  398. default:
  399. show_boot_progress (-49);
  400. puts ("** Unknown image type\n");
  401. return 1;
  402. }
  403. cnt += info.blksz - 1;
  404. cnt /= info.blksz;
  405. cnt -= 1;
  406. if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
  407. (ulong *)(addr+info.blksz)) != cnt) {
  408. printf ("** Read error on %d:%d\n", dev, part);
  409. show_boot_progress (-51);
  410. return 1;
  411. }
  412. show_boot_progress (51);
  413. #if defined(CONFIG_FIT)
  414. /* This cannot be done earlier, we need complete FIT image in RAM first */
  415. if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
  416. if (!fit_check_format (fit_hdr)) {
  417. show_boot_progress (-140);
  418. puts ("** Bad FIT image format\n");
  419. return 1;
  420. }
  421. show_boot_progress (141);
  422. fit_print_contents (fit_hdr);
  423. }
  424. #endif
  425. /* Loading ok, update default load address */
  426. load_addr = addr;
  427. /* Check if we should attempt an auto-start */
  428. if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
  429. char *local_args[2];
  430. extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
  431. local_args[0] = argv[0];
  432. local_args[1] = NULL;
  433. printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
  434. do_bootm (cmdtp, 0, 1, local_args);
  435. rcode = 1;
  436. }
  437. return rcode;
  438. }
  439. /* ------------------------------------------------------------------------- */
  440. void inline
  441. __ide_outb(int dev, int port, unsigned char val)
  442. {
  443. debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  444. dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  445. outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  446. }
  447. void inline ide_outb (int dev, int port, unsigned char val)
  448. __attribute__((weak, alias("__ide_outb")));
  449. unsigned char inline
  450. __ide_inb(int dev, int port)
  451. {
  452. uchar val;
  453. val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  454. debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  455. dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  456. return val;
  457. }
  458. unsigned char inline ide_inb(int dev, int port)
  459. __attribute__((weak, alias("__ide_inb")));
  460. #ifdef CONFIG_TUNE_PIO
  461. int inline
  462. __ide_set_piomode(int pio_mode)
  463. {
  464. return 0;
  465. }
  466. int inline ide_set_piomode(int pio_mode)
  467. __attribute__((weak, alias("__ide_set_piomode")));
  468. #endif
  469. void ide_init (void)
  470. {
  471. #ifdef CONFIG_IDE_8xx_DIRECT
  472. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  473. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  474. #endif
  475. unsigned char c;
  476. int i, bus;
  477. #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
  478. unsigned int ata_reset_time = ATA_RESET_TIME;
  479. char *s;
  480. #endif
  481. #ifdef CONFIG_AMIGAONEG3SE
  482. unsigned int max_bus_scan;
  483. #endif
  484. #ifdef CONFIG_IDE_8xx_PCCARD
  485. extern int pcmcia_on (void);
  486. extern int ide_devices_found; /* Initialized in check_ide_device() */
  487. #endif /* CONFIG_IDE_8xx_PCCARD */
  488. #ifdef CONFIG_IDE_PREINIT
  489. extern int ide_preinit (void);
  490. WATCHDOG_RESET();
  491. if (ide_preinit ()) {
  492. puts ("ide_preinit failed\n");
  493. return;
  494. }
  495. #endif /* CONFIG_IDE_PREINIT */
  496. #ifdef CONFIG_IDE_8xx_PCCARD
  497. extern int pcmcia_on (void);
  498. extern int ide_devices_found; /* Initialized in check_ide_device() */
  499. WATCHDOG_RESET();
  500. ide_devices_found = 0;
  501. /* initialize the PCMCIA IDE adapter card */
  502. pcmcia_on();
  503. if (!ide_devices_found)
  504. return;
  505. udelay (1000000); /* 1 s */
  506. #endif /* CONFIG_IDE_8xx_PCCARD */
  507. WATCHDOG_RESET();
  508. #ifdef CONFIG_IDE_8xx_DIRECT
  509. /* Initialize PIO timing tables */
  510. for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
  511. pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
  512. gd->bus_clk);
  513. pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
  514. gd->bus_clk);
  515. pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
  516. gd->bus_clk);
  517. debug ( "PIO Mode %d: setup=%2d ns/%d clk"
  518. " len=%3d ns/%d clk"
  519. " hold=%2d ns/%d clk\n",
  520. i,
  521. pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
  522. pio_config_ns[i].t_length, pio_config_clk[i].t_length,
  523. pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
  524. }
  525. #endif /* CONFIG_IDE_8xx_DIRECT */
  526. /* Reset the IDE just to be sure.
  527. * Light LED's to show
  528. */
  529. ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
  530. ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
  531. #ifdef CONFIG_IDE_8xx_DIRECT
  532. /* PCMCIA / IDE initialization for common mem space */
  533. pcmp->pcmc_pgcrb = 0;
  534. /* start in PIO mode 0 - most relaxed timings */
  535. pio_mode = 0;
  536. set_pcmcia_timing (pio_mode);
  537. #endif /* CONFIG_IDE_8xx_DIRECT */
  538. /*
  539. * Wait for IDE to get ready.
  540. * According to spec, this can take up to 31 seconds!
  541. */
  542. #ifndef CONFIG_AMIGAONEG3SE
  543. for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
  544. int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
  545. #else
  546. s = getenv("ide_maxbus");
  547. if (s)
  548. max_bus_scan = simple_strtol(s, NULL, 10);
  549. else
  550. max_bus_scan = CONFIG_SYS_IDE_MAXBUS;
  551. for (bus=0; bus<max_bus_scan; ++bus) {
  552. int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / max_bus_scan);
  553. #endif
  554. #ifdef CONFIG_IDE_8xx_PCCARD
  555. /* Skip non-ide devices from probing */
  556. if ((ide_devices_found & (1 << bus)) == 0) {
  557. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  558. continue;
  559. }
  560. #endif
  561. printf ("Bus %d: ", bus);
  562. ide_bus_ok[bus] = 0;
  563. /* Select device
  564. */
  565. udelay (100000); /* 100 ms */
  566. ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  567. udelay (100000); /* 100 ms */
  568. #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
  569. if ((s = getenv("ide_reset_timeout")) != NULL)
  570. ata_reset_time = simple_strtol(s, NULL, 10);
  571. #endif
  572. i = 0;
  573. do {
  574. udelay (10000); /* 10 ms */
  575. c = ide_inb (dev, ATA_STATUS);
  576. i++;
  577. #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
  578. if (i > (ata_reset_time * 100)) {
  579. #else
  580. if (i > (ATA_RESET_TIME * 100)) {
  581. #endif
  582. puts ("** Timeout **\n");
  583. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  584. #ifdef CONFIG_AMIGAONEG3SE
  585. /* If this is the second bus, the first one was OK */
  586. if (bus != 0) {
  587. ide_bus_ok[bus] = 0;
  588. goto skip_bus;
  589. }
  590. #endif
  591. return;
  592. }
  593. if ((i >= 100) && ((i%100)==0)) {
  594. putc ('.');
  595. }
  596. } while (c & ATA_STAT_BUSY);
  597. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  598. puts ("not available ");
  599. debug ("Status = 0x%02X ", c);
  600. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  601. } else if ((c & ATA_STAT_READY) == 0) {
  602. puts ("not available ");
  603. debug ("Status = 0x%02X ", c);
  604. #endif
  605. } else {
  606. puts ("OK ");
  607. ide_bus_ok[bus] = 1;
  608. }
  609. WATCHDOG_RESET();
  610. }
  611. #ifdef CONFIG_AMIGAONEG3SE
  612. skip_bus:
  613. #endif
  614. putc ('\n');
  615. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  616. curr_device = -1;
  617. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  618. #ifdef CONFIG_IDE_LED
  619. int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
  620. #endif
  621. ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
  622. ide_dev_desc[i].if_type=IF_TYPE_IDE;
  623. ide_dev_desc[i].dev=i;
  624. ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
  625. ide_dev_desc[i].blksz=0;
  626. ide_dev_desc[i].lba=0;
  627. ide_dev_desc[i].block_read=ide_read;
  628. if (!ide_bus_ok[IDE_BUS(i)])
  629. continue;
  630. ide_led (led, 1); /* LED on */
  631. ide_ident(&ide_dev_desc[i]);
  632. ide_led (led, 0); /* LED off */
  633. dev_print(&ide_dev_desc[i]);
  634. /* ide_print (i); */
  635. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  636. init_part (&ide_dev_desc[i]); /* initialize partition type */
  637. if (curr_device < 0)
  638. curr_device = i;
  639. }
  640. }
  641. WATCHDOG_RESET();
  642. }
  643. /* ------------------------------------------------------------------------- */
  644. block_dev_desc_t * ide_get_dev(int dev)
  645. {
  646. return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
  647. }
  648. #ifdef CONFIG_IDE_8xx_DIRECT
  649. static void
  650. set_pcmcia_timing (int pmode)
  651. {
  652. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  653. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  654. ulong timings;
  655. debug ("Set timing for PIO Mode %d\n", pmode);
  656. timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
  657. | PCMCIA_SST(pio_config_clk[pmode].t_setup)
  658. | PCMCIA_SL (pio_config_clk[pmode].t_length)
  659. ;
  660. /* IDE 0
  661. */
  662. pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
  663. pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
  664. #if (CONFIG_SYS_PCMCIA_POR0 != 0)
  665. | timings
  666. #endif
  667. ;
  668. debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
  669. pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
  670. pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
  671. #if (CONFIG_SYS_PCMCIA_POR1 != 0)
  672. | timings
  673. #endif
  674. ;
  675. debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
  676. pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
  677. pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
  678. #if (CONFIG_SYS_PCMCIA_POR2 != 0)
  679. | timings
  680. #endif
  681. ;
  682. debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
  683. pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
  684. pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
  685. #if (CONFIG_SYS_PCMCIA_POR3 != 0)
  686. | timings
  687. #endif
  688. ;
  689. debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
  690. /* IDE 1
  691. */
  692. pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
  693. pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
  694. #if (CONFIG_SYS_PCMCIA_POR4 != 0)
  695. | timings
  696. #endif
  697. ;
  698. debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
  699. pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
  700. pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
  701. #if (CONFIG_SYS_PCMCIA_POR5 != 0)
  702. | timings
  703. #endif
  704. ;
  705. debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
  706. pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
  707. pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
  708. #if (CONFIG_SYS_PCMCIA_POR6 != 0)
  709. | timings
  710. #endif
  711. ;
  712. debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
  713. pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
  714. pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
  715. #if (CONFIG_SYS_PCMCIA_POR7 != 0)
  716. | timings
  717. #endif
  718. ;
  719. debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
  720. }
  721. #endif /* CONFIG_IDE_8xx_DIRECT */
  722. /* ------------------------------------------------------------------------- */
  723. #ifdef __PPC__
  724. # ifdef CONFIG_AMIGAONEG3SE
  725. static void
  726. output_data_short(int dev, ulong *sect_buf, int words)
  727. {
  728. ushort *dbuf;
  729. volatile ushort *pbuf;
  730. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  731. dbuf = (ushort *)sect_buf;
  732. while (words--) {
  733. EIEIO;
  734. *pbuf = *dbuf++;
  735. EIEIO;
  736. }
  737. if (words&1)
  738. *pbuf = 0;
  739. }
  740. # endif /* CONFIG_AMIGAONEG3SE */
  741. #endif /* __PPC_ */
  742. /* We only need to swap data if we are running on a big endian cpu. */
  743. /* But Au1x00 cpu:s already swaps data in big endian mode! */
  744. #if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
  745. #define input_swap_data(x,y,z) input_data(x,y,z)
  746. #else
  747. static void
  748. input_swap_data(int dev, ulong *sect_buf, int words)
  749. {
  750. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  751. uchar i;
  752. volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  753. volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  754. ushort *dbuf = (ushort *)sect_buf;
  755. while (words--) {
  756. for (i=0; i<2; i++) {
  757. *(((uchar *)(dbuf)) + 1) = *pbuf_even;
  758. *(uchar *)dbuf = *pbuf_odd;
  759. dbuf+=1;
  760. }
  761. }
  762. #else
  763. volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  764. ushort *dbuf = (ushort *)sect_buf;
  765. debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
  766. while (words--) {
  767. #ifdef __MIPS__
  768. *dbuf++ = swab16p((u16*)pbuf);
  769. *dbuf++ = swab16p((u16*)pbuf);
  770. #elif defined(CONFIG_PCS440EP)
  771. *dbuf++ = *pbuf;
  772. *dbuf++ = *pbuf;
  773. #else
  774. *dbuf++ = ld_le16(pbuf);
  775. *dbuf++ = ld_le16(pbuf);
  776. #endif /* !MIPS */
  777. }
  778. #endif
  779. }
  780. #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
  781. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
  782. static void
  783. output_data(int dev, ulong *sect_buf, int words)
  784. {
  785. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  786. uchar *dbuf;
  787. volatile uchar *pbuf_even;
  788. volatile uchar *pbuf_odd;
  789. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  790. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  791. dbuf = (uchar *)sect_buf;
  792. while (words--) {
  793. EIEIO;
  794. *pbuf_even = *dbuf++;
  795. EIEIO;
  796. *pbuf_odd = *dbuf++;
  797. EIEIO;
  798. *pbuf_even = *dbuf++;
  799. EIEIO;
  800. *pbuf_odd = *dbuf++;
  801. }
  802. #else
  803. ushort *dbuf;
  804. volatile ushort *pbuf;
  805. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  806. dbuf = (ushort *)sect_buf;
  807. while (words--) {
  808. #if defined(CONFIG_PCS440EP)
  809. /* not tested, because CF was write protected */
  810. EIEIO;
  811. *pbuf = ld_le16(dbuf++);
  812. EIEIO;
  813. *pbuf = ld_le16(dbuf++);
  814. #else
  815. EIEIO;
  816. *pbuf = *dbuf++;
  817. EIEIO;
  818. *pbuf = *dbuf++;
  819. #endif
  820. }
  821. #endif
  822. }
  823. #else /* ! __PPC__ */
  824. static void
  825. output_data(int dev, ulong *sect_buf, int words)
  826. {
  827. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
  828. }
  829. #endif /* __PPC__ */
  830. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
  831. static void
  832. input_data(int dev, ulong *sect_buf, int words)
  833. {
  834. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  835. uchar *dbuf;
  836. volatile uchar *pbuf_even;
  837. volatile uchar *pbuf_odd;
  838. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  839. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  840. dbuf = (uchar *)sect_buf;
  841. while (words--) {
  842. *dbuf++ = *pbuf_even;
  843. EIEIO;
  844. SYNC;
  845. *dbuf++ = *pbuf_odd;
  846. EIEIO;
  847. SYNC;
  848. *dbuf++ = *pbuf_even;
  849. EIEIO;
  850. SYNC;
  851. *dbuf++ = *pbuf_odd;
  852. EIEIO;
  853. SYNC;
  854. }
  855. #else
  856. ushort *dbuf;
  857. volatile ushort *pbuf;
  858. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  859. dbuf = (ushort *)sect_buf;
  860. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  861. while (words--) {
  862. #if defined(CONFIG_PCS440EP)
  863. EIEIO;
  864. *dbuf++ = ld_le16(pbuf);
  865. EIEIO;
  866. *dbuf++ = ld_le16(pbuf);
  867. #else
  868. EIEIO;
  869. *dbuf++ = *pbuf;
  870. EIEIO;
  871. *dbuf++ = *pbuf;
  872. #endif
  873. }
  874. #endif
  875. }
  876. #else /* ! __PPC__ */
  877. static void
  878. input_data(int dev, ulong *sect_buf, int words)
  879. {
  880. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
  881. }
  882. #endif /* __PPC__ */
  883. #ifdef CONFIG_AMIGAONEG3SE
  884. static void
  885. input_data_short(int dev, ulong *sect_buf, int words)
  886. {
  887. ushort *dbuf;
  888. volatile ushort *pbuf;
  889. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  890. dbuf = (ushort *)sect_buf;
  891. while (words--) {
  892. EIEIO;
  893. *dbuf++ = *pbuf;
  894. EIEIO;
  895. }
  896. if (words&1) {
  897. ushort dummy;
  898. dummy = *pbuf;
  899. }
  900. }
  901. #endif
  902. /* -------------------------------------------------------------------------
  903. */
  904. static void ide_ident (block_dev_desc_t *dev_desc)
  905. {
  906. ulong iobuf[ATA_SECTORWORDS];
  907. unsigned char c;
  908. hd_driveid_t *iop = (hd_driveid_t *)iobuf;
  909. #ifdef CONFIG_AMIGAONEG3SE
  910. int max_bus_scan;
  911. char *s;
  912. #endif
  913. #ifdef CONFIG_ATAPI
  914. int retries = 0;
  915. int do_retry = 0;
  916. #endif
  917. #ifdef CONFIG_TUNE_PIO
  918. int pio_mode;
  919. #endif
  920. #if 0
  921. int mode, cycle_time;
  922. #endif
  923. int device;
  924. device=dev_desc->dev;
  925. printf (" Device %d: ", device);
  926. #ifdef CONFIG_AMIGAONEG3SE
  927. s = getenv("ide_maxbus");
  928. if (s) {
  929. max_bus_scan = simple_strtol(s, NULL, 10);
  930. } else {
  931. max_bus_scan = CONFIG_SYS_IDE_MAXBUS;
  932. }
  933. if (device >= max_bus_scan*2) {
  934. dev_desc->type=DEV_TYPE_UNKNOWN;
  935. return;
  936. }
  937. #endif
  938. ide_led (DEVICE_LED(device), 1); /* LED on */
  939. /* Select device
  940. */
  941. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  942. dev_desc->if_type=IF_TYPE_IDE;
  943. #ifdef CONFIG_ATAPI
  944. do_retry = 0;
  945. retries = 0;
  946. /* Warning: This will be tricky to read */
  947. while (retries <= 1) {
  948. /* check signature */
  949. if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
  950. (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
  951. (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
  952. (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
  953. /* ATAPI Signature found */
  954. dev_desc->if_type=IF_TYPE_ATAPI;
  955. /* Start Ident Command
  956. */
  957. ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
  958. /*
  959. * Wait for completion - ATAPI devices need more time
  960. * to become ready
  961. */
  962. c = ide_wait (device, ATAPI_TIME_OUT);
  963. } else
  964. #endif
  965. {
  966. /* Start Ident Command
  967. */
  968. ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
  969. /* Wait for completion
  970. */
  971. c = ide_wait (device, IDE_TIME_OUT);
  972. }
  973. ide_led (DEVICE_LED(device), 0); /* LED off */
  974. if (((c & ATA_STAT_DRQ) == 0) ||
  975. ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
  976. #ifdef CONFIG_ATAPI
  977. #ifdef CONFIG_AMIGAONEG3SE
  978. s = getenv("ide_doreset");
  979. if (s && strcmp(s, "on") == 0)
  980. #endif
  981. {
  982. /* Need to soft reset the device in case it's an ATAPI... */
  983. debug ("Retrying...\n");
  984. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  985. udelay(100000);
  986. ide_outb (device, ATA_COMMAND, 0x08);
  987. udelay (500000); /* 500 ms */
  988. }
  989. /* Select device
  990. */
  991. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  992. retries++;
  993. #else
  994. return;
  995. #endif
  996. }
  997. #ifdef CONFIG_ATAPI
  998. else
  999. break;
  1000. } /* see above - ugly to read */
  1001. if (retries == 2) /* Not found */
  1002. return;
  1003. #endif
  1004. input_swap_data (device, iobuf, ATA_SECTORWORDS);
  1005. ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
  1006. ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
  1007. ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
  1008. #ifdef __LITTLE_ENDIAN
  1009. /*
  1010. * firmware revision, model, and serial number have Big Endian Byte
  1011. * order in Word. Convert all three to little endian.
  1012. *
  1013. * See CF+ and CompactFlash Specification Revision 2.0:
  1014. * 6.2.1.6: Identify Drive, Table 39 for more details
  1015. */
  1016. strswab (dev_desc->revision);
  1017. strswab (dev_desc->vendor);
  1018. strswab (dev_desc->product);
  1019. #endif /* __LITTLE_ENDIAN */
  1020. if ((iop->config & 0x0080)==0x0080)
  1021. dev_desc->removable = 1;
  1022. else
  1023. dev_desc->removable = 0;
  1024. #ifdef CONFIG_TUNE_PIO
  1025. /* Mode 0 - 2 only, are directly determined by word 51. */
  1026. pio_mode = iop->tPIO;
  1027. if (pio_mode > 2) {
  1028. printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
  1029. pio_mode = 0; /* Force it to dead slow, and hope for the best... */
  1030. }
  1031. /* Any CompactFlash Storage Card that supports PIO mode 3 or above
  1032. * shall set bit 1 of word 53 to one and support the fields contained
  1033. * in words 64 through 70.
  1034. */
  1035. if (iop->field_valid & 0x02) {
  1036. /* Mode 3 and above are possible. Check in order from slow
  1037. * to fast, so we wind up with the highest mode allowed.
  1038. */
  1039. if (iop->eide_pio_modes & 0x01)
  1040. pio_mode = 3;
  1041. if (iop->eide_pio_modes & 0x02)
  1042. pio_mode = 4;
  1043. if (ata_id_is_cfa((u16 *)iop)) {
  1044. if ((iop->cf_advanced_caps & 0x07) == 0x01)
  1045. pio_mode = 5;
  1046. if ((iop->cf_advanced_caps & 0x07) == 0x02)
  1047. pio_mode = 6;
  1048. }
  1049. }
  1050. /* System-specific, depends on bus speeds, etc. */
  1051. ide_set_piomode(pio_mode);
  1052. #endif /* CONFIG_TUNE_PIO */
  1053. #if 0
  1054. /*
  1055. * Drive PIO mode autoselection
  1056. */
  1057. mode = iop->tPIO;
  1058. printf ("tPIO = 0x%02x = %d\n",mode, mode);
  1059. if (mode > 2) { /* 2 is maximum allowed tPIO value */
  1060. mode = 2;
  1061. debug ("Override tPIO -> 2\n");
  1062. }
  1063. if (iop->field_valid & 2) { /* drive implements ATA2? */
  1064. debug ("Drive implements ATA2\n");
  1065. if (iop->capability & 8) { /* drive supports use_iordy? */
  1066. cycle_time = iop->eide_pio_iordy;
  1067. } else {
  1068. cycle_time = iop->eide_pio;
  1069. }
  1070. debug ("cycle time = %d\n", cycle_time);
  1071. mode = 4;
  1072. if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
  1073. if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
  1074. if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
  1075. if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
  1076. }
  1077. printf ("PIO mode to use: PIO %d\n", mode);
  1078. #endif /* 0 */
  1079. #ifdef CONFIG_ATAPI
  1080. if (dev_desc->if_type==IF_TYPE_ATAPI) {
  1081. atapi_inquiry(dev_desc);
  1082. return;
  1083. }
  1084. #endif /* CONFIG_ATAPI */
  1085. #ifdef __BIG_ENDIAN
  1086. /* swap shorts */
  1087. dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
  1088. #else /* ! __BIG_ENDIAN */
  1089. /*
  1090. * do not swap shorts on little endian
  1091. *
  1092. * See CF+ and CompactFlash Specification Revision 2.0:
  1093. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  1094. */
  1095. dev_desc->lba = iop->lba_capacity;
  1096. #endif /* __BIG_ENDIAN */
  1097. #ifdef CONFIG_LBA48
  1098. if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
  1099. dev_desc->lba48 = 1;
  1100. dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
  1101. ((unsigned long long)iop->lba48_capacity[1] << 16) |
  1102. ((unsigned long long)iop->lba48_capacity[2] << 32) |
  1103. ((unsigned long long)iop->lba48_capacity[3] << 48);
  1104. } else {
  1105. dev_desc->lba48 = 0;
  1106. }
  1107. #endif /* CONFIG_LBA48 */
  1108. /* assuming HD */
  1109. dev_desc->type=DEV_TYPE_HARDDISK;
  1110. dev_desc->blksz=ATA_BLOCKSIZE;
  1111. dev_desc->lun=0; /* just to fill something in... */
  1112. #if 0 /* only used to test the powersaving mode,
  1113. * if enabled, the drive goes after 5 sec
  1114. * in standby mode */
  1115. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1116. c = ide_wait (device, IDE_TIME_OUT);
  1117. ide_outb (device, ATA_SECT_CNT, 1);
  1118. ide_outb (device, ATA_LBA_LOW, 0);
  1119. ide_outb (device, ATA_LBA_MID, 0);
  1120. ide_outb (device, ATA_LBA_HIGH, 0);
  1121. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1122. ide_outb (device, ATA_COMMAND, 0xe3);
  1123. udelay (50);
  1124. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1125. #endif
  1126. }
  1127. /* ------------------------------------------------------------------------- */
  1128. ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1129. {
  1130. ulong n = 0;
  1131. unsigned char c;
  1132. unsigned char pwrsave=0; /* power save */
  1133. #ifdef CONFIG_LBA48
  1134. unsigned char lba48 = 0;
  1135. if (blknr & 0x0000fffff0000000ULL) {
  1136. /* more than 28 bits used, use 48bit mode */
  1137. lba48 = 1;
  1138. }
  1139. #endif
  1140. debug ("ide_read dev %d start %qX, blocks %lX buffer at %lX\n",
  1141. device, blknr, blkcnt, (ulong)buffer);
  1142. ide_led (DEVICE_LED(device), 1); /* LED on */
  1143. /* Select device
  1144. */
  1145. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1146. c = ide_wait (device, IDE_TIME_OUT);
  1147. if (c & ATA_STAT_BUSY) {
  1148. printf ("IDE read: device %d not ready\n", device);
  1149. goto IDE_READ_E;
  1150. }
  1151. /* first check if the drive is in Powersaving mode, if yes,
  1152. * increase the timeout value */
  1153. ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  1154. udelay (50);
  1155. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1156. if (c & ATA_STAT_BUSY) {
  1157. printf ("IDE read: device %d not ready\n", device);
  1158. goto IDE_READ_E;
  1159. }
  1160. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1161. printf ("No Powersaving mode %X\n", c);
  1162. } else {
  1163. c = ide_inb(device,ATA_SECT_CNT);
  1164. debug ("Powersaving %02X\n",c);
  1165. if(c==0)
  1166. pwrsave=1;
  1167. }
  1168. while (blkcnt-- > 0) {
  1169. c = ide_wait (device, IDE_TIME_OUT);
  1170. if (c & ATA_STAT_BUSY) {
  1171. printf ("IDE read: device %d not ready\n", device);
  1172. break;
  1173. }
  1174. #ifdef CONFIG_LBA48
  1175. if (lba48) {
  1176. /* write high bits */
  1177. ide_outb (device, ATA_SECT_CNT, 0);
  1178. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1179. #ifdef CONFIG_SYS_64BIT_LBA
  1180. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1181. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1182. #else
  1183. ide_outb (device, ATA_LBA_MID, 0);
  1184. ide_outb (device, ATA_LBA_HIGH, 0);
  1185. #endif
  1186. }
  1187. #endif
  1188. ide_outb (device, ATA_SECT_CNT, 1);
  1189. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1190. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1191. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1192. #ifdef CONFIG_LBA48
  1193. if (lba48) {
  1194. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1195. ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
  1196. } else
  1197. #endif
  1198. {
  1199. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1200. ATA_DEVICE(device) |
  1201. ((blknr >> 24) & 0xF) );
  1202. ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
  1203. }
  1204. udelay (50);
  1205. if(pwrsave) {
  1206. c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
  1207. pwrsave=0;
  1208. } else {
  1209. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1210. }
  1211. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1212. #if defined(CONFIG_SYS_64BIT_LBA) && defined(CONFIG_SYS_64BIT_VSPRINTF)
  1213. printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
  1214. device, blknr, c);
  1215. #else
  1216. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1217. device, (ulong)blknr, c);
  1218. #endif
  1219. break;
  1220. }
  1221. input_data (device, buffer, ATA_SECTORWORDS);
  1222. (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
  1223. ++n;
  1224. ++blknr;
  1225. buffer += ATA_BLOCKSIZE;
  1226. }
  1227. IDE_READ_E:
  1228. ide_led (DEVICE_LED(device), 0); /* LED off */
  1229. return (n);
  1230. }
  1231. /* ------------------------------------------------------------------------- */
  1232. ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1233. {
  1234. ulong n = 0;
  1235. unsigned char c;
  1236. #ifdef CONFIG_LBA48
  1237. unsigned char lba48 = 0;
  1238. if (blknr & 0x0000fffff0000000ULL) {
  1239. /* more than 28 bits used, use 48bit mode */
  1240. lba48 = 1;
  1241. }
  1242. #endif
  1243. ide_led (DEVICE_LED(device), 1); /* LED on */
  1244. /* Select device
  1245. */
  1246. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1247. while (blkcnt-- > 0) {
  1248. c = ide_wait (device, IDE_TIME_OUT);
  1249. if (c & ATA_STAT_BUSY) {
  1250. printf ("IDE read: device %d not ready\n", device);
  1251. goto WR_OUT;
  1252. }
  1253. #ifdef CONFIG_LBA48
  1254. if (lba48) {
  1255. /* write high bits */
  1256. ide_outb (device, ATA_SECT_CNT, 0);
  1257. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1258. #ifdef CONFIG_SYS_64BIT_LBA
  1259. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1260. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1261. #else
  1262. ide_outb (device, ATA_LBA_MID, 0);
  1263. ide_outb (device, ATA_LBA_HIGH, 0);
  1264. #endif
  1265. }
  1266. #endif
  1267. ide_outb (device, ATA_SECT_CNT, 1);
  1268. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1269. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1270. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1271. #ifdef CONFIG_LBA48
  1272. if (lba48) {
  1273. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1274. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  1275. } else
  1276. #endif
  1277. {
  1278. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1279. ATA_DEVICE(device) |
  1280. ((blknr >> 24) & 0xF) );
  1281. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
  1282. }
  1283. udelay (50);
  1284. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1285. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1286. #if defined(CONFIG_SYS_64BIT_LBA) && defined(CONFIG_SYS_64BIT_VSPRINTF)
  1287. printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
  1288. device, blknr, c);
  1289. #else
  1290. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1291. device, (ulong)blknr, c);
  1292. #endif
  1293. goto WR_OUT;
  1294. }
  1295. output_data (device, buffer, ATA_SECTORWORDS);
  1296. c = ide_inb (device, ATA_STATUS); /* clear IRQ */
  1297. ++n;
  1298. ++blknr;
  1299. buffer += ATA_BLOCKSIZE;
  1300. }
  1301. WR_OUT:
  1302. ide_led (DEVICE_LED(device), 0); /* LED off */
  1303. return (n);
  1304. }
  1305. /* ------------------------------------------------------------------------- */
  1306. /*
  1307. * copy src to dest, skipping leading and trailing blanks and null
  1308. * terminate the string
  1309. * "len" is the size of available memory including the terminating '\0'
  1310. */
  1311. static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
  1312. {
  1313. unsigned char *end, *last;
  1314. last = dst;
  1315. end = src + len - 1;
  1316. /* reserve space for '\0' */
  1317. if (len < 2)
  1318. goto OUT;
  1319. /* skip leading white space */
  1320. while ((*src) && (src<end) && (*src==' '))
  1321. ++src;
  1322. /* copy string, omitting trailing white space */
  1323. while ((*src) && (src<end)) {
  1324. *dst++ = *src;
  1325. if (*src++ != ' ')
  1326. last = dst;
  1327. }
  1328. OUT:
  1329. *last = '\0';
  1330. }
  1331. /* ------------------------------------------------------------------------- */
  1332. /*
  1333. * Wait until Busy bit is off, or timeout (in ms)
  1334. * Return last status
  1335. */
  1336. static uchar ide_wait (int dev, ulong t)
  1337. {
  1338. ulong delay = 10 * t; /* poll every 100 us */
  1339. uchar c;
  1340. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  1341. udelay (100);
  1342. if (delay-- == 0) {
  1343. break;
  1344. }
  1345. }
  1346. return (c);
  1347. }
  1348. /* ------------------------------------------------------------------------- */
  1349. #ifdef CONFIG_IDE_RESET
  1350. extern void ide_set_reset(int idereset);
  1351. static void ide_reset (void)
  1352. {
  1353. #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
  1354. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  1355. #endif
  1356. int i;
  1357. curr_device = -1;
  1358. for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
  1359. ide_bus_ok[i] = 0;
  1360. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
  1361. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  1362. ide_set_reset (1); /* assert reset */
  1363. /* the reset signal shall be asserted for et least 25 us */
  1364. udelay(25);
  1365. WATCHDOG_RESET();
  1366. #ifdef CONFIG_SYS_PB_12V_ENABLE
  1367. immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */
  1368. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1369. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1370. immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
  1371. /* wait 500 ms for the voltage to stabilize
  1372. */
  1373. for (i=0; i<500; ++i) {
  1374. udelay (1000);
  1375. }
  1376. immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */
  1377. #endif /* CONFIG_SYS_PB_12V_ENABLE */
  1378. #ifdef CONFIG_SYS_PB_IDE_MOTOR
  1379. /* configure IDE Motor voltage monitor pin as input */
  1380. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1381. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1382. immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1383. /* wait up to 1 s for the motor voltage to stabilize
  1384. */
  1385. for (i=0; i<1000; ++i) {
  1386. if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
  1387. break;
  1388. }
  1389. udelay (1000);
  1390. }
  1391. if (i == 1000) { /* Timeout */
  1392. printf ("\nWarning: 5V for IDE Motor missing\n");
  1393. # ifdef CONFIG_STATUS_LED
  1394. # ifdef STATUS_LED_YELLOW
  1395. status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
  1396. # endif
  1397. # ifdef STATUS_LED_GREEN
  1398. status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
  1399. # endif
  1400. # endif /* CONFIG_STATUS_LED */
  1401. }
  1402. #endif /* CONFIG_SYS_PB_IDE_MOTOR */
  1403. WATCHDOG_RESET();
  1404. /* de-assert RESET signal */
  1405. ide_set_reset(0);
  1406. /* wait 250 ms */
  1407. for (i=0; i<250; ++i) {
  1408. udelay (1000);
  1409. }
  1410. }
  1411. #endif /* CONFIG_IDE_RESET */
  1412. /* ------------------------------------------------------------------------- */
  1413. #if defined(CONFIG_IDE_LED) && \
  1414. !defined(CONFIG_AMIGAONEG3SE)&& \
  1415. !defined(CONFIG_CPC45) && \
  1416. !defined(CONFIG_HMI10) && \
  1417. !defined(CONFIG_KUP4K) && \
  1418. !defined(CONFIG_KUP4X)
  1419. static uchar led_buffer = 0; /* Buffer for current LED status */
  1420. static void ide_led (uchar led, uchar status)
  1421. {
  1422. uchar *led_port = LED_PORT;
  1423. if (status) { /* switch LED on */
  1424. led_buffer |= led;
  1425. } else { /* switch LED off */
  1426. led_buffer &= ~led;
  1427. }
  1428. *led_port = led_buffer;
  1429. }
  1430. #endif /* CONFIG_IDE_LED */
  1431. /* ------------------------------------------------------------------------- */
  1432. #ifdef CONFIG_ATAPI
  1433. /****************************************************************************
  1434. * ATAPI Support
  1435. */
  1436. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
  1437. /* since ATAPI may use commands with not 4 bytes alligned length
  1438. * we have our own transfer functions, 2 bytes alligned */
  1439. static void
  1440. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1441. {
  1442. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1443. uchar *dbuf;
  1444. volatile uchar *pbuf_even;
  1445. volatile uchar *pbuf_odd;
  1446. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1447. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1448. while (shorts--) {
  1449. EIEIO;
  1450. *pbuf_even = *dbuf++;
  1451. EIEIO;
  1452. *pbuf_odd = *dbuf++;
  1453. }
  1454. #else
  1455. ushort *dbuf;
  1456. volatile ushort *pbuf;
  1457. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1458. dbuf = (ushort *)sect_buf;
  1459. debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
  1460. while (shorts--) {
  1461. EIEIO;
  1462. *pbuf = *dbuf++;
  1463. }
  1464. #endif
  1465. }
  1466. static void
  1467. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1468. {
  1469. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1470. uchar *dbuf;
  1471. volatile uchar *pbuf_even;
  1472. volatile uchar *pbuf_odd;
  1473. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1474. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1475. while (shorts--) {
  1476. EIEIO;
  1477. *dbuf++ = *pbuf_even;
  1478. EIEIO;
  1479. *dbuf++ = *pbuf_odd;
  1480. }
  1481. #else
  1482. ushort *dbuf;
  1483. volatile ushort *pbuf;
  1484. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1485. dbuf = (ushort *)sect_buf;
  1486. debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
  1487. while (shorts--) {
  1488. EIEIO;
  1489. *dbuf++ = *pbuf;
  1490. }
  1491. #endif
  1492. }
  1493. #else /* ! __PPC__ */
  1494. static void
  1495. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1496. {
  1497. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1498. }
  1499. static void
  1500. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1501. {
  1502. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1503. }
  1504. #endif /* __PPC__ */
  1505. /*
  1506. * Wait until (Status & mask) == res, or timeout (in ms)
  1507. * Return last status
  1508. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  1509. * and then they set their DRQ Bit
  1510. */
  1511. static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
  1512. {
  1513. ulong delay = 10 * t; /* poll every 100 us */
  1514. uchar c;
  1515. c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
  1516. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  1517. /* break if error occurs (doesn't make sense to wait more) */
  1518. if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
  1519. break;
  1520. udelay (100);
  1521. if (delay-- == 0) {
  1522. break;
  1523. }
  1524. }
  1525. return (c);
  1526. }
  1527. /*
  1528. * issue an atapi command
  1529. */
  1530. unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
  1531. {
  1532. unsigned char c,err,mask,res;
  1533. int n;
  1534. ide_led (DEVICE_LED(device), 1); /* LED on */
  1535. /* Select device
  1536. */
  1537. mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
  1538. res = 0;
  1539. #ifdef CONFIG_AMIGAONEG3SE
  1540. # warning THF: Removed LBA mode ???
  1541. #endif
  1542. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1543. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1544. if ((c & mask) != res) {
  1545. printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
  1546. err=0xFF;
  1547. goto AI_OUT;
  1548. }
  1549. /* write taskfile */
  1550. ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  1551. ide_outb (device, ATA_SECT_CNT, 0);
  1552. ide_outb (device, ATA_SECT_NUM, 0);
  1553. ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
  1554. ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
  1555. #ifdef CONFIG_AMIGAONEG3SE
  1556. # warning THF: Removed LBA mode ???
  1557. #endif
  1558. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1559. ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
  1560. udelay (50);
  1561. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1562. res = ATA_STAT_DRQ;
  1563. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1564. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  1565. printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
  1566. err=0xFF;
  1567. goto AI_OUT;
  1568. }
  1569. output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
  1570. /* ATAPI Command written wait for completition */
  1571. udelay (5000); /* device must set bsy */
  1572. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1573. /* if no data wait for DRQ = 0 BSY = 0
  1574. * if data wait for DRQ = 1 BSY = 0 */
  1575. res=0;
  1576. if(buflen)
  1577. res = ATA_STAT_DRQ;
  1578. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1579. if ((c & mask) != res ) {
  1580. if (c & ATA_STAT_ERR) {
  1581. err=(ide_inb(device,ATA_ERROR_REG))>>4;
  1582. debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
  1583. } else {
  1584. printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
  1585. err=0xFF;
  1586. }
  1587. goto AI_OUT;
  1588. }
  1589. n=ide_inb(device, ATA_CYL_HIGH);
  1590. n<<=8;
  1591. n+=ide_inb(device, ATA_CYL_LOW);
  1592. if(n>buflen) {
  1593. printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
  1594. err=0xff;
  1595. goto AI_OUT;
  1596. }
  1597. if((n==0)&&(buflen<0)) {
  1598. printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
  1599. err=0xff;
  1600. goto AI_OUT;
  1601. }
  1602. if(n!=buflen) {
  1603. debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
  1604. }
  1605. if(n!=0) { /* data transfer */
  1606. debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
  1607. /* we transfer shorts */
  1608. n>>=1;
  1609. /* ok now decide if it is an in or output */
  1610. if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
  1611. debug ("Write to device\n");
  1612. output_data_shorts(device,(unsigned short *)buffer,n);
  1613. } else {
  1614. debug ("Read from device @ %p shorts %d\n",buffer,n);
  1615. input_data_shorts(device,(unsigned short *)buffer,n);
  1616. }
  1617. }
  1618. udelay(5000); /* seems that some CD ROMs need this... */
  1619. mask = ATA_STAT_BUSY|ATA_STAT_ERR;
  1620. res=0;
  1621. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1622. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1623. err=(ide_inb(device,ATA_ERROR_REG) >> 4);
  1624. debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
  1625. } else {
  1626. err = 0;
  1627. }
  1628. AI_OUT:
  1629. ide_led (DEVICE_LED(device), 0); /* LED off */
  1630. return (err);
  1631. }
  1632. /*
  1633. * sending the command to atapi_issue. If an status other than good
  1634. * returns, an request_sense will be issued
  1635. */
  1636. #define ATAPI_DRIVE_NOT_READY 100
  1637. #define ATAPI_UNIT_ATTN 10
  1638. unsigned char atapi_issue_autoreq (int device,
  1639. unsigned char* ccb,
  1640. int ccblen,
  1641. unsigned char *buffer,
  1642. int buflen)
  1643. {
  1644. unsigned char sense_data[18],sense_ccb[12];
  1645. unsigned char res,key,asc,ascq;
  1646. int notready,unitattn;
  1647. #ifdef CONFIG_AMIGAONEG3SE
  1648. char *s;
  1649. unsigned int timeout, retrycnt;
  1650. s = getenv("ide_cd_timeout");
  1651. timeout = s ? (simple_strtol(s, NULL, 10)*1000000)/5 : 0;
  1652. retrycnt = 0;
  1653. #endif
  1654. unitattn=ATAPI_UNIT_ATTN;
  1655. notready=ATAPI_DRIVE_NOT_READY;
  1656. retry:
  1657. res= atapi_issue(device,ccb,ccblen,buffer,buflen);
  1658. if (res==0)
  1659. return (0); /* Ok */
  1660. if (res==0xFF)
  1661. return (0xFF); /* error */
  1662. debug ("(auto_req)atapi_issue returned sense key %X\n",res);
  1663. memset(sense_ccb,0,sizeof(sense_ccb));
  1664. memset(sense_data,0,sizeof(sense_data));
  1665. sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
  1666. sense_ccb[4]=18; /* allocation Length */
  1667. res=atapi_issue(device,sense_ccb,12,sense_data,18);
  1668. key=(sense_data[2]&0xF);
  1669. asc=(sense_data[12]);
  1670. ascq=(sense_data[13]);
  1671. debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
  1672. debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  1673. sense_data[0],
  1674. key,
  1675. asc,
  1676. ascq);
  1677. if((key==0))
  1678. return 0; /* ok device ready */
  1679. if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
  1680. if(unitattn-->0) {
  1681. udelay(200*1000);
  1682. goto retry;
  1683. }
  1684. printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
  1685. goto error;
  1686. }
  1687. if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
  1688. if (notready-->0) {
  1689. udelay(200*1000);
  1690. goto retry;
  1691. }
  1692. printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
  1693. goto error;
  1694. }
  1695. if(asc==0x3a) {
  1696. debug ("Media not present\n");
  1697. goto error;
  1698. }
  1699. #ifdef CONFIG_AMIGAONEG3SE
  1700. if ((sense_data[2]&0xF)==0x0B) {
  1701. debug ("ABORTED COMMAND...retry\n");
  1702. if (retrycnt++ < 4)
  1703. goto retry;
  1704. return (0xFF);
  1705. }
  1706. if ((sense_data[2]&0xf) == 0x02 &&
  1707. sense_data[12] == 0x04 &&
  1708. sense_data[13] == 0x01 ) {
  1709. debug ("Waiting for unit to become active\n");
  1710. udelay(timeout);
  1711. if (retrycnt++ < 4)
  1712. goto retry;
  1713. return 0xFF;
  1714. }
  1715. #endif /* CONFIG_AMIGAONEG3SE */
  1716. printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1717. error:
  1718. debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1719. return (0xFF);
  1720. }
  1721. static void atapi_inquiry(block_dev_desc_t * dev_desc)
  1722. {
  1723. unsigned char ccb[12]; /* Command descriptor block */
  1724. unsigned char iobuf[64]; /* temp buf */
  1725. unsigned char c;
  1726. int device;
  1727. device=dev_desc->dev;
  1728. dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
  1729. dev_desc->block_read=atapi_read;
  1730. memset(ccb,0,sizeof(ccb));
  1731. memset(iobuf,0,sizeof(iobuf));
  1732. ccb[0]=ATAPI_CMD_INQUIRY;
  1733. ccb[4]=40; /* allocation Legnth */
  1734. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
  1735. debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
  1736. if (c!=0)
  1737. return;
  1738. /* copy device ident strings */
  1739. ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
  1740. ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
  1741. ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
  1742. dev_desc->lun=0;
  1743. dev_desc->lba=0;
  1744. dev_desc->blksz=0;
  1745. dev_desc->type=iobuf[0] & 0x1f;
  1746. if ((iobuf[1]&0x80)==0x80)
  1747. dev_desc->removable = 1;
  1748. else
  1749. dev_desc->removable = 0;
  1750. memset(ccb,0,sizeof(ccb));
  1751. memset(iobuf,0,sizeof(iobuf));
  1752. ccb[0]=ATAPI_CMD_START_STOP;
  1753. ccb[4]=0x03; /* start */
  1754. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1755. debug ("ATAPI_CMD_START_STOP returned %x\n",c);
  1756. if (c!=0)
  1757. return;
  1758. memset(ccb,0,sizeof(ccb));
  1759. memset(iobuf,0,sizeof(iobuf));
  1760. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1761. debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
  1762. if (c!=0)
  1763. return;
  1764. memset(ccb,0,sizeof(ccb));
  1765. memset(iobuf,0,sizeof(iobuf));
  1766. ccb[0]=ATAPI_CMD_READ_CAP;
  1767. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
  1768. debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
  1769. if (c!=0)
  1770. return;
  1771. debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  1772. iobuf[0],iobuf[1],iobuf[2],iobuf[3],
  1773. iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
  1774. dev_desc->lba =((unsigned long)iobuf[0]<<24) +
  1775. ((unsigned long)iobuf[1]<<16) +
  1776. ((unsigned long)iobuf[2]<< 8) +
  1777. ((unsigned long)iobuf[3]);
  1778. dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
  1779. ((unsigned long)iobuf[5]<<16) +
  1780. ((unsigned long)iobuf[6]<< 8) +
  1781. ((unsigned long)iobuf[7]);
  1782. #ifdef CONFIG_LBA48
  1783. dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  1784. #endif
  1785. return;
  1786. }
  1787. /*
  1788. * atapi_read:
  1789. * we transfer only one block per command, since the multiple DRQ per
  1790. * command is not yet implemented
  1791. */
  1792. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  1793. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  1794. #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
  1795. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1796. {
  1797. ulong n = 0;
  1798. unsigned char ccb[12]; /* Command descriptor block */
  1799. ulong cnt;
  1800. debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
  1801. device, blknr, blkcnt, (ulong)buffer);
  1802. do {
  1803. if (blkcnt>ATAPI_READ_MAX_BLOCK) {
  1804. cnt=ATAPI_READ_MAX_BLOCK;
  1805. } else {
  1806. cnt=blkcnt;
  1807. }
  1808. ccb[0]=ATAPI_CMD_READ_12;
  1809. ccb[1]=0; /* reserved */
  1810. ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
  1811. ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
  1812. ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
  1813. ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
  1814. ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
  1815. ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
  1816. ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
  1817. ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
  1818. ccb[10]=0; /* reserved */
  1819. ccb[11]=0; /* reserved */
  1820. if (atapi_issue_autoreq(device,ccb,12,
  1821. (unsigned char *)buffer,
  1822. cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
  1823. return (n);
  1824. }
  1825. n+=cnt;
  1826. blkcnt-=cnt;
  1827. blknr+=cnt;
  1828. buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
  1829. } while (blkcnt > 0);
  1830. return (n);
  1831. }
  1832. /* ------------------------------------------------------------------------- */
  1833. #endif /* CONFIG_ATAPI */
  1834. U_BOOT_CMD(
  1835. ide, 5, 1, do_ide,
  1836. "ide - IDE sub-system\n",
  1837. "reset - reset IDE controller\n"
  1838. "ide info - show available IDE devices\n"
  1839. "ide device [dev] - show or set current device\n"
  1840. "ide part [dev] - print partition table of one or all IDE devices\n"
  1841. "ide read addr blk# cnt\n"
  1842. "ide write addr blk# cnt - read/write `cnt'"
  1843. " blocks starting at block `blk#'\n"
  1844. " to/from memory address `addr'\n"
  1845. );
  1846. U_BOOT_CMD(
  1847. diskboot, 3, 1, do_diskboot,
  1848. "diskboot- boot from IDE device\n",
  1849. "loadAddr dev:part\n"
  1850. );