voiceblue.h 8.0 KB

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  1. /*
  2. * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
  3. *
  4. * Configuation settings for the TI OMAP VoiceBlue board.
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #ifndef __CONFIG_H
  24. #define __CONFIG_H
  25. #include <configs/omap1510.h>
  26. /*
  27. * High Level Configuration Options
  28. * (easy to change)
  29. */
  30. #define CONFIG_ARM925T 1 /* This is an arm925t CPU */
  31. #define CONFIG_OMAP 1 /* in a TI OMAP core */
  32. #define CONFIG_OMAP1510 1 /* which is in a 5910 */
  33. /* Input clock of PLL */
  34. #define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz input clock */
  35. #define CONFIG_XTAL_FREQ 12000000
  36. #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
  37. #define CONFIG_MISC_INIT_R /* There is nothing to really init */
  38. #define BOARD_LATE_INIT /* but we flash the LEDs here */
  39. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  40. #define CONFIG_SETUP_MEMORY_TAGS 1
  41. #define CONFIG_INITRD_TAG 1
  42. /*
  43. * Physical Memory Map
  44. */
  45. #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
  46. #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
  47. #define PHYS_SDRAM_1_SIZE SZ_64M
  48. #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
  49. #define PHYS_FLASH_2 0x0c000000
  50. #define CFG_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */
  51. /*
  52. * FLASH organization
  53. */
  54. #define CFG_FLASH_CFI /* Flash is CFI conformant */
  55. #define CFG_FLASH_CFI_DRIVER /* Use the common driver */
  56. #define CFG_MAX_FLASH_BANKS 1
  57. #ifdef VOICEBLUE_SMALL_FLASH
  58. #define CFG_FLASH_BANKS_LIST { PHYS_FLASH_2 }
  59. #else
  60. #define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1 }
  61. #endif
  62. /* FIXME: Does not work on AMD flash */
  63. /* #define CFG_FLASH_USE_BUFFER_WRITE 1 */ /* use buffered writes (20x faster) */
  64. #define CFG_MAX_FLASH_SECT 512 /* max # of sectors on one chip */
  65. #define CFG_MONITOR_BASE PHYS_FLASH_1
  66. #define CFG_MONITOR_LEN SZ_128K
  67. /*
  68. * Environment settings
  69. */
  70. #ifdef VOICEBLUE_SMALL_FLASH
  71. #define CFG_ENV_IS_NOWHERE
  72. #define CFG_ENV_SIZE SZ_1K
  73. #else
  74. #define CFG_ENV_IS_IN_FLASH
  75. #define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_MONITOR_LEN)
  76. #define CFG_ENV_SIZE SZ_8K
  77. #define CFG_ENV_SECT_SIZE SZ_64K
  78. #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
  79. #define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
  80. #define CONFIG_ENV_OVERWRITE
  81. #define CFG_JFFS_CUSTOM_PART /* see board/voiceblue/jffs2parts.c */
  82. #endif
  83. /*
  84. * Size of malloc() pool and stack
  85. */
  86. #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  87. #ifdef VOICEBLUE_SMALL_FLASH
  88. #define CFG_MALLOC_LEN (SZ_64K - CFG_GBL_DATA_SIZE)
  89. #define CONFIG_STACKSIZE SZ_8K
  90. #else
  91. #define CFG_MALLOC_LEN SZ_4M
  92. #define CONFIG_STACKSIZE SZ_1M
  93. #endif
  94. /*
  95. * Hardware drivers
  96. */
  97. #define CONFIG_DRIVER_SMC91111
  98. #define CONFIG_SMC91111_BASE 0x08000300
  99. /*
  100. * NS16550 Configuration
  101. */
  102. #define CFG_NS16550
  103. #define CFG_NS16550_SERIAL
  104. #define CFG_NS16550_REG_SIZE (-4)
  105. #define CFG_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */
  106. #define CFG_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */
  107. #define CONFIG_CONS_INDEX 1
  108. #define CONFIG_BAUDRATE 115200
  109. #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  110. #ifdef VOICEBLUE_SMALL_FLASH
  111. #define CONFIG_COMMANDS (CFG_CMD_BDI | \
  112. CFG_CMD_LOADB | \
  113. CFG_CMD_IMI | \
  114. CFG_CMD_FLASH | \
  115. CFG_CMD_MEMORY | \
  116. CFG_CMD_NET | \
  117. CFG_CMD_BOOTD | \
  118. CFG_CMD_DHCP | \
  119. CFG_CMD_PING | \
  120. CFG_CMD_RUN)
  121. #else
  122. #define CONFIG_COMMANDS (CFG_CMD_BDI | \
  123. CFG_CMD_LOADB | \
  124. CFG_CMD_IMI | \
  125. CFG_CMD_FLASH | \
  126. CFG_CMD_MEMORY | \
  127. CFG_CMD_NET | \
  128. CFG_CMD_ENV | \
  129. CFG_CMD_BOOTD | \
  130. CFG_CMD_DHCP | \
  131. CFG_CMD_PING | \
  132. CFG_CMD_RUN | \
  133. CFG_CMD_JFFS2)
  134. #endif
  135. #define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
  136. #define CONFIG_LOOPW
  137. #ifdef VOICEBLUE_SMALL_FLASH
  138. #define CONFIG_BOOTDELAY 0
  139. #undef CONFIG_BOOTARGS /* the preboot command will set bootargs*/
  140. #define CFG_AUTOLOAD "n" /* no autoload */
  141. #define CONFIG_PREBOOT "run setup"
  142. #define CONFIG_EXTRA_ENV_SETTINGS \
  143. "setup=setenv bootargs console=ttyS0,${baudrate} " \
  144. "root=/dev/nfs ip=dhcp\0" \
  145. "update=erase c000000 c03ffff; " \
  146. "cp.b 10400000 c000000 ${filesize}\0"
  147. #else
  148. #define CONFIG_BOOTDELAY 3
  149. #undef CONFIG_BOOTARGS /* boot command will set bootargs */
  150. #define CFG_AUTOLOAD "n" /* no autoload */
  151. #define CONFIG_BOOTCOMMAND "run nboot"
  152. #define CONFIG_PREBOOT "run setup"
  153. #define CONFIG_EXTRA_ENV_SETTINGS \
  154. "ospart=0\0" \
  155. "swapos=no\0" \
  156. "setpart=" \
  157. "if test $swapos = yes; then " \
  158. "if test $ospart -eq 0; then chpart 4; else chpart 3; fi; "\
  159. "setenv swapos no; saveenv; " \
  160. "else " \
  161. "if test $ospart -eq 0; then chpart 3; else chpart 4; fi; "\
  162. "fi\0" \
  163. "setup=setenv bootargs console=ttyS0,$baudrate " \
  164. "mtdparts=$mtdparts\0" \
  165. "nfsargs=run setpart; setenv bootargs $bootargs " \
  166. "root=/dev/nfs ip=dhcp\0" \
  167. "flashargs=run setpart; setenv bootargs $bootargs " \
  168. "root=/dev/mtdblock$partition ro " \
  169. "rootfstype=jffs2\0" \
  170. "nboot=run nfsargs; bootp; tftp; bootm\0" \
  171. "fboot=run flashargs; fsload /boot/uImage; bootm\0"
  172. #endif
  173. /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  174. #include <cmd_confdefs.h>
  175. /*
  176. * Miscellaneous configurable options
  177. */
  178. #ifndef VOICEBLUE_SMALL_FLASH
  179. #define CFG_HUSH_PARSER
  180. #define CFG_PROMPT_HUSH_PS2 "> "
  181. #define CONFIG_AUTO_COMPLETE
  182. #endif
  183. #define CFG_LONGHELP /* undef to save memory */
  184. #define CFG_PROMPT "# " /* Monitor Command Prompt */
  185. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  186. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  187. #define CFG_MAXARGS 16 /* max number of command args */
  188. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  189. #define CFG_MEMTEST_START PHYS_SDRAM_1
  190. #define CFG_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE
  191. #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
  192. /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
  193. * This time is further subdivided by a local divisor.
  194. */
  195. #define CFG_TIMERBASE OMAP1510_TIMER1_BASE
  196. #define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
  197. #define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
  198. #define OMAP5910_DPLL_DIV 1
  199. #define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \
  200. (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
  201. #define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */
  202. #define OMAP5910_LCD_DIV 2 /* CKL/4 */
  203. #define OMAP5910_ARM_DIV 0 /* CKL/1 */
  204. #define OMAP5910_DSP_DIV 0 /* CKL/1 */
  205. #define OMAP5910_TC_DIV 1 /* CKL/2 */
  206. #define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */
  207. #define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */
  208. #define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b Clock Enable */
  209. #define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) | \
  210. (OMAP5910_LCD_DIV << 2) | \
  211. (OMAP5910_ARM_DIV << 4) | \
  212. (OMAP5910_DSP_DIV << 6) | \
  213. (OMAP5910_TC_DIV << 8) | \
  214. (OMAP5910_DSP_MMU_DIV << 10) | \
  215. (OMAP5910_ARM_TIM_SEL << 12))
  216. #define VOICEBLUE_LED_REG 0x04030000
  217. /*
  218. * JFFS2 partitions
  219. *
  220. */
  221. /* No command line, one static partition */
  222. #undef CONFIG_JFFS2_CMDLINE
  223. #define CONFIG_JFFS2_DEV "nor0"
  224. #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
  225. #define CONFIG_JFFS2_PART_OFFSET 0x00040000
  226. /* mtdparts command line support */
  227. /* Note: fake mtd_id used, no linux mtd map file */
  228. /*
  229. #define CONFIG_JFFS2_CMDLINE
  230. #define MTDIDS_DEFAULT "nor0=voiceblue-0"
  231. #define MTDPARTS_DEFAULT "mtdparts=voiceblue-0:128k(uboot),64k(env),64k(renv),-(jffs2)"
  232. */
  233. #endif /* __CONFIG_H */