cpux9k2.c 8.9 KB

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  1. /*
  2. * (C) Copyright 2008-2009
  3. * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
  4. * Jens Scharsig <esw@bus-elektronik.de>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <common.h>
  25. #include <exports.h>
  26. #include <net.h>
  27. #include <netdev.h>
  28. #include <nand.h>
  29. #include <asm/io.h>
  30. #include <asm/arch/hardware.h>
  31. #include <asm/arch/at91_pio.h>
  32. #include <asm/arch/at91_pmc.h>
  33. #include <asm/arch/at91_mc.h>
  34. #ifdef CONFIG_STATUS_LED
  35. #include <status_led.h>
  36. #endif
  37. #ifdef CONFIG_VIDEO
  38. #include <bus_vcxk.h>
  39. extern unsigned long display_width;
  40. extern unsigned long display_height;
  41. #endif
  42. #ifdef CONFIG_CMD_NAND
  43. void cpux9k2_nand_hw_init(void);
  44. #endif
  45. DECLARE_GLOBAL_DATA_PTR;
  46. /*
  47. * Miscelaneous platform dependent initialisations
  48. */
  49. int board_init(void)
  50. {
  51. at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
  52. /* Enable Ctrlc */
  53. console_init_f();
  54. /* Correct IRDA resistor problem / Set PA23_TXD in Output */
  55. writel(AT91_PMX_AA_TXD2, &pio->pioa.oer);
  56. gd->bd->bi_arch_number = MACH_TYPE_EB_CPUX9K2;
  57. /* adress of boot parameters */
  58. gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  59. #ifdef CONFIG_STATUS_LED
  60. status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
  61. #endif
  62. #ifdef CONFIG_CMD_NAND
  63. cpux9k2_nand_hw_init();
  64. #endif
  65. return 0;
  66. }
  67. #ifdef CONFIG_MISC_INIT_R
  68. int misc_init_r(void)
  69. {
  70. uchar mac[8];
  71. uchar tm;
  72. uchar midx;
  73. uchar macn6, macn7;
  74. #ifdef CONFIG_NET_MULTI
  75. if (getenv("ethaddr") == NULL) {
  76. if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x00,
  77. CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
  78. (uchar *) &mac, sizeof(mac)) != 0) {
  79. puts("Error reading MAC from EEPROM\n");
  80. } else {
  81. tm = 0;
  82. macn6 = 0;
  83. macn7 = 0xFF;
  84. for (midx = 0; midx < 6; midx++) {
  85. if ((mac[midx] != 0) && (mac[midx] != 0xFF))
  86. tm++;
  87. macn6 += mac[midx];
  88. macn7 ^= mac[midx];
  89. }
  90. if ((macn6 != mac[6]) || (macn7 != mac[7]))
  91. tm = 0;
  92. if (tm)
  93. eth_setenv_enetaddr("ethaddr", mac);
  94. else
  95. puts("Error: invalid MAC at EEPROM\n");
  96. }
  97. }
  98. #endif
  99. gd->jt[XF_do_reset] = (void *) do_reset;
  100. #ifdef CONFIG_STATUS_LED
  101. status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
  102. #endif
  103. return 0;
  104. }
  105. #endif
  106. #ifdef CONFIG_RESET_PHY_R
  107. void reset_phy(void)
  108. {
  109. udelay(10000);
  110. eth_init(gd->bd);
  111. }
  112. #endif
  113. /*
  114. * DRAM initialisations
  115. */
  116. int dram_init(void)
  117. {
  118. gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE,
  119. CONFIG_SYS_SDRAM_SIZE);
  120. return 0;
  121. }
  122. /*
  123. * Ethernet initialisations
  124. */
  125. #ifdef CONFIG_DRIVER_AT91EMAC
  126. int board_eth_init(bd_t *bis)
  127. {
  128. int rc = 0;
  129. rc = at91emac_register(bis, (u32) AT91_EMAC_BASE);
  130. return rc;
  131. }
  132. #endif
  133. /*
  134. * Disk On Chip (NAND) Millenium initialization.
  135. * The NAND lives in the CS2* space
  136. */
  137. #if defined(CONFIG_CMD_NAND)
  138. #define MASK_ALE (1 << 22) /* our ALE is AD22 */
  139. #define MASK_CLE (1 << 21) /* our CLE is AD21 */
  140. void cpux9k2_nand_hw_init(void)
  141. {
  142. unsigned long csr;
  143. at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
  144. at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
  145. at91_mc_t *mc = (at91_mc_t *) AT91_MC_BASE;
  146. /* Setup Smart Media, fitst enable the address range of CS3 */
  147. writel(readl(&mc->ebi.csa) | AT91_EBI_CSA_CS3A, &mc->ebi.csa);
  148. /* RWH = 1 | RWS = 0 | TDF = 1 | NWS = 3 */
  149. csr = AT91_SMC_CSR_RWHOLD(1) | AT91_SMC_CSR_TDF(1) |
  150. AT91_SMC_CSR_NWS(3) |
  151. AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_8 |
  152. AT91_SMC_CSR_WSEN;
  153. writel(csr, &mc->smc.csr[3]);
  154. writel(AT91_PMX_CA_SMOE | AT91_PMX_CA_SMWE, &pio->pioc.asr);
  155. writel(AT91_PMX_CA_BFCK | AT91_PMX_CA_SMOE | AT91_PMX_CA_SMWE,
  156. &pio->pioc.pdr);
  157. /* Configure PC2 as input (signal Nand READY ) */
  158. writel(AT91_PMX_CA_BFAVD, &pio->pioc.per);
  159. writel(AT91_PMX_CA_BFAVD, &pio->pioc.odr); /* disable output */
  160. writel(AT91_PMX_CA_BFCK, &pio->pioc.codr);
  161. /* PIOC clock enabling */
  162. writel(1 << AT91_ID_PIOC, &pmc->pcer);
  163. }
  164. static void board_nand_hwcontrol(struct mtd_info *mtd,
  165. int cmd, unsigned int ctrl)
  166. {
  167. at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
  168. struct nand_chip *this = mtd->priv;
  169. ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
  170. if (ctrl & NAND_CTRL_CHANGE) {
  171. IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
  172. if (ctrl & NAND_CLE)
  173. IO_ADDR_W |= MASK_CLE;
  174. if (ctrl & NAND_ALE)
  175. IO_ADDR_W |= MASK_ALE;
  176. if ((ctrl & NAND_NCE))
  177. writel(1, &pio->pioc.codr);
  178. else
  179. writel(1, &pio->pioc.sodr);
  180. this->IO_ADDR_W = (void *) IO_ADDR_W;
  181. }
  182. if (cmd != NAND_CMD_NONE)
  183. writeb(cmd, this->IO_ADDR_W);
  184. }
  185. static int board_nand_dev_ready(struct mtd_info *mtd)
  186. {
  187. at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
  188. return ((readl(&pio->pioc.pdsr) & (1 << 2)) != 0);
  189. }
  190. int board_nand_init(struct nand_chip *nand)
  191. {
  192. cpux9k2_nand_hw_init();
  193. nand->ecc.mode = NAND_ECC_SOFT;
  194. nand->cmd_ctrl = board_nand_hwcontrol;
  195. nand->dev_ready = board_nand_dev_ready;
  196. nand->chip_delay = 20;
  197. return 0;
  198. }
  199. #endif
  200. #if defined(CONFIG_VIDEO)
  201. /*
  202. * drv_video_init
  203. * FUNCTION: initialize VCxK device
  204. */
  205. int drv_video_init(void)
  206. {
  207. #ifdef CONFIG_SPLASH_SCREEN
  208. unsigned long splash;
  209. #endif
  210. char *s;
  211. unsigned long csr;
  212. at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
  213. at91_mc_t *mc = (at91_mc_t *) AT91_MC_BASE;
  214. printf("Init Video as ");
  215. s = getenv("displaywidth");
  216. if (s != NULL)
  217. display_width = simple_strtoul(s, NULL, 10);
  218. else
  219. display_width = 256;
  220. s = getenv("displayheight");
  221. if (s != NULL)
  222. display_height = simple_strtoul(s, NULL, 10);
  223. else
  224. display_height = 256;
  225. printf("%ld x %ld pixel matrix\n", display_width, display_height);
  226. /* RWH = 7 | RWS =7 | TDF = 15 | NWS = 0x7F */
  227. csr = AT91_SMC_CSR_RWHOLD(7) | AT91_SMC_CSR_RWSETUP(7) |
  228. AT91_SMC_CSR_TDF(15) | AT91_SMC_CSR_NWS(127) |
  229. AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 |
  230. AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN;
  231. writel(csr, &mc->smc.csr[2]);
  232. writel(1 << AT91_ID_PIOB, &pmc->pcer);
  233. vcxk_init(display_width, display_height);
  234. #ifdef CONFIG_SPLASH_SCREEN
  235. s = getenv("splashimage");
  236. if (s != NULL) {
  237. splash = simple_strtoul(s, NULL, 16);
  238. printf("use splashimage: %lx\n", splash);
  239. video_display_bitmap(splash, 0, 0);
  240. }
  241. #endif
  242. return 0;
  243. }
  244. #endif
  245. #ifdef CONFIG_SOFT_I2C
  246. void i2c_init_board(void)
  247. {
  248. u32 pin;
  249. at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
  250. at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
  251. writel(1 << AT91_ID_PIOA, &pmc->pcer);
  252. pin = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK;
  253. writel(pin, &pio->pioa.idr);
  254. writel(pin, &pio->pioa.pudr);
  255. writel(pin, &pio->pioa.per);
  256. writel(pin, &pio->pioa.oer);
  257. writel(pin, &pio->pioa.sodr);
  258. }
  259. #endif
  260. /*--------------------------------------------------------------------------*/
  261. #ifdef CONFIG_STATUS_LED
  262. void __led_toggle(led_id_t mask)
  263. {
  264. at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
  265. if (readl(&pio->piod.odsr) & mask)
  266. writel(mask, &pio->piod.codr);
  267. else
  268. writel(mask, &pio->piod.codr);
  269. }
  270. void __led_init(led_id_t mask, int state)
  271. {
  272. at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
  273. at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
  274. writel(1 << AT91_ID_PIOD, &pmc->pcer); /* Enable PIOB clock */
  275. /* Disable peripherals on LEDs */
  276. writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.per);
  277. /* Enable pins as outputs */
  278. writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.oer);
  279. /* Turn all LEDs OFF */
  280. writel(STATUS_LED_BIT | STATUS_LED_BIT1, &pio->piod.sodr);
  281. __led_set(mask, state);
  282. }
  283. void __led_set(led_id_t mask, int state)
  284. {
  285. at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
  286. if (state == STATUS_LED_ON)
  287. writel(mask, &pio->piod.codr);
  288. else
  289. writel(mask, &pio->piod.sodr);
  290. }
  291. #endif
  292. /*---------------------------------------------------------------------------*/
  293. int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  294. {
  295. int rcode = 0;
  296. ulong side;
  297. ulong bright;
  298. switch (argc) {
  299. case 3:
  300. side = simple_strtoul(argv[1], NULL, 10);
  301. bright = simple_strtoul(argv[2], NULL, 10);
  302. if ((side >= 0) && (side <= 3) &&
  303. (bright >= 0) && (bright <= 1000)) {
  304. vcxk_setbrightness(side, bright);
  305. rcode = 0;
  306. } else {
  307. printf("parameters out of range\n");
  308. printf("Usage:\n%s\n", cmdtp->usage);
  309. rcode = 1;
  310. }
  311. break;
  312. default:
  313. printf("Usage:\n%s\n", cmdtp->usage);
  314. rcode = 1;
  315. break;
  316. }
  317. return rcode;
  318. }
  319. /*---------------------------------------------------------------------------*/
  320. U_BOOT_CMD(
  321. bright, 3, 0, do_brightness,
  322. "bright - sets the display brightness\n",
  323. " <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
  324. );
  325. /* EOF cpu9k2.c */