cmpi.c 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134
  1. /*
  2. * (C) Copyright 2002
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. /*
  25. * CPU test
  26. * Integer compare instructions: cmpwi, cmplwi
  27. *
  28. * To verify these instructions the test runs them with
  29. * different combinations of operands, reads the condition
  30. * register value and compares it with the expected one.
  31. * The test contains a pre-built table
  32. * containing the description of each test case: the instruction,
  33. * the values of the operands, the condition field to save
  34. * the result in and the expected result.
  35. */
  36. #include <post.h>
  37. #include "cpu_asm.h"
  38. #if CONFIG_POST & CONFIG_SYS_POST_CPU
  39. extern void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1);
  40. static struct cpu_post_cmpi_s
  41. {
  42. ulong cmd;
  43. ulong op1;
  44. ushort op2;
  45. ulong cr;
  46. ulong res;
  47. } cpu_post_cmpi_table[] =
  48. {
  49. {
  50. OP_CMPWI,
  51. 123,
  52. 123,
  53. 2,
  54. 0x02
  55. },
  56. {
  57. OP_CMPWI,
  58. 123,
  59. 133,
  60. 3,
  61. 0x08
  62. },
  63. {
  64. OP_CMPWI,
  65. 123,
  66. -133,
  67. 4,
  68. 0x04
  69. },
  70. {
  71. OP_CMPLWI,
  72. 123,
  73. 123,
  74. 2,
  75. 0x02
  76. },
  77. {
  78. OP_CMPLWI,
  79. 123,
  80. -133,
  81. 3,
  82. 0x08
  83. },
  84. {
  85. OP_CMPLWI,
  86. 123,
  87. 113,
  88. 4,
  89. 0x04
  90. },
  91. };
  92. static unsigned int cpu_post_cmpi_size =
  93. sizeof (cpu_post_cmpi_table) / sizeof (struct cpu_post_cmpi_s);
  94. int cpu_post_test_cmpi (void)
  95. {
  96. int ret = 0;
  97. unsigned int i;
  98. int flag = disable_interrupts();
  99. for (i = 0; i < cpu_post_cmpi_size && ret == 0; i++)
  100. {
  101. struct cpu_post_cmpi_s *test = cpu_post_cmpi_table + i;
  102. unsigned long code[] =
  103. {
  104. ASM_1IC(test->cmd, test->cr, 3, test->op2),
  105. ASM_MFCR(3),
  106. ASM_BLR
  107. };
  108. ulong res;
  109. cpu_post_exec_11 (code, & res, test->op1);
  110. ret = ((res >> (28 - 4 * test->cr)) & 0xe) == test->res ? 0 : -1;
  111. if (ret != 0)
  112. {
  113. post_log ("Error at cmpi test %d !\n", i);
  114. }
  115. }
  116. if (flag)
  117. enable_interrupts();
  118. return ret;
  119. }
  120. #endif