hawkboard_nand_spl.c 4.2 KB

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  1. /*
  2. * Modified for Hawkboard - Syed Mohammed Khasim <khasim@beagleboard.org>
  3. *
  4. * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com>
  5. * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  6. * Copyright (C) 2004 Texas Instruments.
  7. *
  8. * ----------------------------------------------------------------------------
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. * ----------------------------------------------------------------------------
  23. */
  24. #include <common.h>
  25. #include <asm/errno.h>
  26. #include <asm/arch/hardware.h>
  27. #include <asm/io.h>
  28. #include <asm/arch/davinci_misc.h>
  29. #include <ns16550.h>
  30. DECLARE_GLOBAL_DATA_PTR;
  31. #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
  32. static const struct pinmux_config mii_pins[] = {
  33. { pinmux(2), 8, 1 },
  34. { pinmux(2), 8, 2 },
  35. { pinmux(2), 8, 3 },
  36. { pinmux(2), 8, 4 },
  37. { pinmux(2), 8, 5 },
  38. { pinmux(2), 8, 6 },
  39. { pinmux(2), 8, 7 }
  40. };
  41. static const struct pinmux_config mdio_pins[] = {
  42. { pinmux(4), 8, 0 },
  43. { pinmux(4), 8, 1 }
  44. };
  45. static const struct pinmux_config nand_pins[] = {
  46. { pinmux(7), 1, 1 },
  47. { pinmux(7), 1, 2 },
  48. { pinmux(7), 1, 4 },
  49. { pinmux(7), 1, 5 },
  50. { pinmux(9), 1, 0 },
  51. { pinmux(9), 1, 1 },
  52. { pinmux(9), 1, 2 },
  53. { pinmux(9), 1, 3 },
  54. { pinmux(9), 1, 4 },
  55. { pinmux(9), 1, 5 },
  56. { pinmux(9), 1, 6 },
  57. { pinmux(9), 1, 7 },
  58. { pinmux(12), 1, 5 },
  59. { pinmux(12), 1, 6 }
  60. };
  61. static const struct pinmux_config uart2_pins[] = {
  62. { pinmux(0), 4, 6 },
  63. { pinmux(0), 4, 7 },
  64. { pinmux(4), 2, 4 },
  65. { pinmux(4), 2, 5 }
  66. };
  67. static const struct pinmux_config i2c_pins[] = {
  68. { pinmux(4), 2, 4 },
  69. { pinmux(4), 2, 5 }
  70. };
  71. static const struct pinmux_resource pinmuxes[] = {
  72. PINMUX_ITEM(mii_pins),
  73. PINMUX_ITEM(mdio_pins),
  74. PINMUX_ITEM(i2c_pins),
  75. PINMUX_ITEM(nand_pins),
  76. PINMUX_ITEM(uart2_pins),
  77. };
  78. static const struct lpsc_resource lpsc[] = {
  79. { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
  80. { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
  81. { DAVINCI_LPSC_EMAC }, /* image download */
  82. { DAVINCI_LPSC_UART2 }, /* console */
  83. { DAVINCI_LPSC_GPIO },
  84. };
  85. void board_init_f(ulong bootflag)
  86. {
  87. /*
  88. * Kick Registers need to be set to allow access to Pin Mux registers
  89. */
  90. writel(HAWKBOARD_KICK0_UNLOCK, &davinci_syscfg_regs->kick0);
  91. writel(HAWKBOARD_KICK1_UNLOCK, &davinci_syscfg_regs->kick1);
  92. /* setup the SUSPSRC for ARM to control emulation suspend */
  93. writel(readl(&davinci_syscfg_regs->suspsrc) &
  94. ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
  95. DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
  96. DAVINCI_SYSCFG_SUSPSRC_UART2), &davinci_syscfg_regs->suspsrc);
  97. /* Power on required peripherals
  98. * ARM does not have acess by default to PSC0 and PSC1
  99. * assuming here that the DSP bootloader has set the IOPU
  100. * such that PSC access is available to ARM
  101. */
  102. da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc));
  103. /* configure pinmux settings */
  104. davinci_configure_pin_mux_items(pinmuxes,
  105. ARRAY_SIZE(pinmuxes));
  106. writel(readl(&davinci_uart2_ctrl_regs->pwremu_mgmt) |
  107. (DAVINCI_UART_PWREMU_MGMT_FREE) |
  108. (DAVINCI_UART_PWREMU_MGMT_URRST) |
  109. (DAVINCI_UART_PWREMU_MGMT_UTRST),
  110. &davinci_uart2_ctrl_regs->pwremu_mgmt);
  111. NS16550_init((NS16550_t)(DAVINCI_UART2_BASE),
  112. CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
  113. puts("Nand boot...\n");
  114. nand_boot();
  115. }
  116. void puts(const char *str)
  117. {
  118. while (*str)
  119. putc(*str++);
  120. }
  121. void putc(char c)
  122. {
  123. if (gd->flags & GD_FLG_SILENT)
  124. return;
  125. if (c == '\n')
  126. NS16550_putc((NS16550_t)(DAVINCI_UART2_BASE), '\r');
  127. NS16550_putc((NS16550_t)(DAVINCI_UART2_BASE), c);
  128. }
  129. void hang(void)
  130. {
  131. puts("### ERROR ### Please RESET the board ###\n");
  132. for (;;)
  133. ;
  134. }