tlb.c 2.7 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc.
  3. *
  4. * (C) Copyright 2000
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #include <common.h>
  26. #include <asm/mmu.h>
  27. struct fsl_e_tlb_entry tlb_table[] = {
  28. SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
  29. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  30. 0, 1, BOOKE_PAGESZ_1M, 1),
  31. #if defined(CONFIG_SYS_FLASH_PORT_WIDTH_16)
  32. SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE,
  33. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  34. 0, 2, BOOKE_PAGESZ_4M, 1),
  35. SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE + 0x400000, CONFIG_SYS_FLASH_BASE + 0x400000,
  36. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  37. 0, 3, BOOKE_PAGESZ_4M, 1),
  38. #else
  39. SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE,
  40. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  41. 0, 2, BOOKE_PAGESZ_16M, 1),
  42. #endif
  43. #if !defined(CONFIG_SPD_EEPROM)
  44. SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
  45. MAS3_SX|MAS3_SW|MAS3_SR, 0,
  46. 0, 4, BOOKE_PAGESZ_64M, 1),
  47. SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x4000000, CONFIG_SYS_DDR_SDRAM_BASE + 0x4000000,
  48. MAS3_SX|MAS3_SW|MAS3_SR, 0,
  49. 0, 5, BOOKE_PAGESZ_64M, 1),
  50. #endif
  51. SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE, CONFIG_SYS_LBC_SDRAM_BASE,
  52. #if defined(CONFIG_RAM_AS_FLASH)
  53. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  54. #else
  55. MAS3_SX|MAS3_SW|MAS3_SR, 0,
  56. #endif
  57. 0, 6, BOOKE_PAGESZ_64M, 1),
  58. SET_TLB_ENTRY(1, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR,
  59. MAS3_SX|MAS3_SW|MAS3_SR, 0,
  60. 0, 7, BOOKE_PAGESZ_16K, 1),
  61. SET_TLB_ENTRY(1, CONFIG_SYS_PCI_MEM_PHYS, CONFIG_SYS_PCI_MEM_PHYS,
  62. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  63. 0, 8, BOOKE_PAGESZ_256M, 1),
  64. SET_TLB_ENTRY(1, CONFIG_SYS_BCSR, CONFIG_SYS_BCSR,
  65. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  66. 0, 9, BOOKE_PAGESZ_16K, 1),
  67. };
  68. int num_tlb_entries = ARRAY_SIZE(tlb_table);