vexpress_common.h 10 KB

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  1. /*
  2. * (C) Copyright 2011 ARM Limited
  3. * (C) Copyright 2010 Linaro
  4. * Matt Waddel, <matt.waddel@linaro.org>
  5. *
  6. * Configuration for Versatile Express. Parts were derived from other ARM
  7. * configurations.
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #ifndef __VEXPRESS_COMMON_H
  28. #define __VEXPRESS_COMMON_H
  29. /*
  30. * Definitions copied from linux kernel:
  31. * arch/arm/mach-vexpress/include/mach/motherboard.h
  32. */
  33. #ifdef CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP
  34. /* CS register bases for the original memory map. */
  35. #define V2M_PA_CS0 0x40000000
  36. #define V2M_PA_CS1 0x44000000
  37. #define V2M_PA_CS2 0x48000000
  38. #define V2M_PA_CS3 0x4c000000
  39. #define V2M_PA_CS7 0x10000000
  40. #define V2M_PERIPH_OFFSET(x) (x << 12)
  41. #define V2M_SYSREGS (V2M_PA_CS7 + V2M_PERIPH_OFFSET(0))
  42. #define V2M_SYSCTL (V2M_PA_CS7 + V2M_PERIPH_OFFSET(1))
  43. #define V2M_SERIAL_BUS_PCI (V2M_PA_CS7 + V2M_PERIPH_OFFSET(2))
  44. #define V2M_BASE 0x60000000
  45. #define CONFIG_SYS_TEXT_BASE 0x60800000
  46. #elif defined(CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP)
  47. /* CS register bases for the extended memory map. */
  48. #define V2M_PA_CS0 0x08000000
  49. #define V2M_PA_CS1 0x0c000000
  50. #define V2M_PA_CS2 0x14000000
  51. #define V2M_PA_CS3 0x18000000
  52. #define V2M_PA_CS7 0x1c000000
  53. #define V2M_PERIPH_OFFSET(x) (x << 16)
  54. #define V2M_SYSREGS (V2M_PA_CS7 + V2M_PERIPH_OFFSET(1))
  55. #define V2M_SYSCTL (V2M_PA_CS7 + V2M_PERIPH_OFFSET(2))
  56. #define V2M_SERIAL_BUS_PCI (V2M_PA_CS7 + V2M_PERIPH_OFFSET(3))
  57. #define V2M_BASE 0x80000000
  58. #define CONFIG_SYS_TEXT_BASE 0x80800000
  59. #endif
  60. /*
  61. * Physical addresses, offset from V2M_PA_CS0-3
  62. */
  63. #define V2M_NOR0 (V2M_PA_CS0)
  64. #define V2M_NOR1 (V2M_PA_CS1)
  65. #define V2M_SRAM (V2M_PA_CS2)
  66. #define V2M_VIDEO_SRAM (V2M_PA_CS3 + 0x00000000)
  67. #define V2M_LAN9118 (V2M_PA_CS3 + 0x02000000)
  68. #define V2M_ISP1761 (V2M_PA_CS3 + 0x03000000)
  69. /* Common peripherals relative to CS7. */
  70. #define V2M_AACI (V2M_PA_CS7 + V2M_PERIPH_OFFSET(4))
  71. #define V2M_MMCI (V2M_PA_CS7 + V2M_PERIPH_OFFSET(5))
  72. #define V2M_KMI0 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(6))
  73. #define V2M_KMI1 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(7))
  74. #define V2M_UART0 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(9))
  75. #define V2M_UART1 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(10))
  76. #define V2M_UART2 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(11))
  77. #define V2M_UART3 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(12))
  78. #define V2M_WDT (V2M_PA_CS7 + V2M_PERIPH_OFFSET(15))
  79. #define V2M_TIMER01 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(17))
  80. #define V2M_TIMER23 (V2M_PA_CS7 + V2M_PERIPH_OFFSET(18))
  81. #define V2M_SERIAL_BUS_DVI (V2M_PA_CS7 + V2M_PERIPH_OFFSET(22))
  82. #define V2M_RTC (V2M_PA_CS7 + V2M_PERIPH_OFFSET(23))
  83. #define V2M_CF (V2M_PA_CS7 + V2M_PERIPH_OFFSET(26))
  84. #define V2M_CLCD (V2M_PA_CS7 + V2M_PERIPH_OFFSET(31))
  85. #define V2M_SIZE_CS7 V2M_PERIPH_OFFSET(32)
  86. /* System register offsets. */
  87. #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
  88. #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
  89. #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
  90. /*
  91. * Configuration
  92. */
  93. #define SYS_CFG_START (1 << 31)
  94. #define SYS_CFG_WRITE (1 << 30)
  95. #define SYS_CFG_OSC (1 << 20)
  96. #define SYS_CFG_VOLT (2 << 20)
  97. #define SYS_CFG_AMP (3 << 20)
  98. #define SYS_CFG_TEMP (4 << 20)
  99. #define SYS_CFG_RESET (5 << 20)
  100. #define SYS_CFG_SCC (6 << 20)
  101. #define SYS_CFG_MUXFPGA (7 << 20)
  102. #define SYS_CFG_SHUTDOWN (8 << 20)
  103. #define SYS_CFG_REBOOT (9 << 20)
  104. #define SYS_CFG_DVIMODE (11 << 20)
  105. #define SYS_CFG_POWER (12 << 20)
  106. #define SYS_CFG_SITE_MB (0 << 16)
  107. #define SYS_CFG_SITE_DB1 (1 << 16)
  108. #define SYS_CFG_SITE_DB2 (2 << 16)
  109. #define SYS_CFG_STACK(n) ((n) << 12)
  110. #define SYS_CFG_ERR (1 << 1)
  111. #define SYS_CFG_COMPLETE (1 << 0)
  112. /* Board info register */
  113. #define SYS_ID V2M_SYSREGS
  114. #define CONFIG_REVISION_TAG 1
  115. #define CONFIG_SYS_MEMTEST_START V2M_BASE
  116. #define CONFIG_SYS_MEMTEST_END 0x20000000
  117. #define CONFIG_SYS_HZ 1000
  118. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  119. #define CONFIG_SETUP_MEMORY_TAGS 1
  120. #define CONFIG_SYS_L2CACHE_OFF 1
  121. #define CONFIG_INITRD_TAG 1
  122. #define CONFIG_OF_LIBFDT 1
  123. /* Size of malloc() pool */
  124. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
  125. #define SCTL_BASE V2M_SYSCTL
  126. #define VEXPRESS_FLASHPROG_FLVPPEN (1 << 0)
  127. /* SMSC9115 Ethernet from SMSC9118 family */
  128. #define CONFIG_SMC911X 1
  129. #define CONFIG_SMC911X_32_BIT 1
  130. #define CONFIG_SMC911X_BASE V2M_LAN9118
  131. /* PL011 Serial Configuration */
  132. #define CONFIG_PL011_SERIAL
  133. #define CONFIG_PL011_CLOCK 24000000
  134. #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
  135. (void *)CONFIG_SYS_SERIAL1}
  136. #define CONFIG_CONS_INDEX 0
  137. #define CONFIG_BAUDRATE 38400
  138. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  139. #define CONFIG_SYS_SERIAL0 V2M_UART0
  140. #define CONFIG_SYS_SERIAL1 V2M_UART1
  141. /* Command line configuration */
  142. #define CONFIG_CMD_BDI
  143. #define CONFIG_CMD_DHCP
  144. #define CONFIG_CMD_PXE
  145. #define CONFIG_MENU
  146. #define CONFIG_CMD_ELF
  147. #define CONFIG_CMD_ENV
  148. #define CONFIG_CMD_FLASH
  149. #define CONFIG_CMD_IMI
  150. #define CONFIG_CMD_MEMORY
  151. #define CONFIG_CMD_NET
  152. #define CONFIG_CMD_PING
  153. #define CONFIG_CMD_SAVEENV
  154. #define CONFIG_CMD_RUN
  155. #define CONFIG_CMD_FAT
  156. #define CONFIG_DOS_PARTITION 1
  157. #define CONFIG_MMC 1
  158. #define CONFIG_CMD_MMC
  159. #define CONFIG_GENERIC_MMC
  160. #define CONFIG_ARM_PL180_MMCI
  161. #define CONFIG_ARM_PL180_MMCI_BASE V2M_MMCI
  162. #define CONFIG_SYS_MMC_MAX_BLK_COUNT 127
  163. #define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 6250000
  164. /* BOOTP options */
  165. #define CONFIG_BOOTP_BOOTFILESIZE
  166. #define CONFIG_BOOTP_BOOTPATH
  167. #define CONFIG_BOOTP_GATEWAY
  168. #define CONFIG_BOOTP_HOSTNAME
  169. #define CONFIG_BOOTP_PXE
  170. #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
  171. /* Miscellaneous configurable options */
  172. #undef CONFIG_SYS_CLKS_IN_HZ
  173. #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x8000)
  174. #define LINUX_BOOT_PARAM_ADDR (V2M_BASE + 0x2000)
  175. #define CONFIG_BOOTDELAY 2
  176. /* Physical Memory Map */
  177. #define CONFIG_NR_DRAM_BANKS 2
  178. #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */
  179. #define PHYS_SDRAM_2 (((unsigned int)V2M_BASE) + \
  180. ((unsigned int)0x20000000))
  181. #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
  182. #define PHYS_SDRAM_2_SIZE 0x20000000 /* 512 MB */
  183. /* additions for new relocation code */
  184. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  185. #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
  186. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
  187. CONFIG_SYS_INIT_RAM_SIZE - \
  188. GENERATED_GBL_DATA_SIZE)
  189. #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
  190. /* Basic environment settings */
  191. #define CONFIG_BOOTCOMMAND "run bootflash;"
  192. #ifdef CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP
  193. #define CONFIG_PLATFORM_ENV_SETTINGS \
  194. "loadaddr=0x80008000\0" \
  195. "ramdisk_addr_r=0x61000000\0" \
  196. "kernel_addr=0x44100000\0" \
  197. "ramdisk_addr=0x44800000\0" \
  198. "maxramdisk=0x1800000\0" \
  199. "pxefile_addr_r=0x88000000\0" \
  200. "kernel_addr_r=0x80008000\0"
  201. #elif defined(CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP)
  202. #define CONFIG_PLATFORM_ENV_SETTINGS \
  203. "loadaddr=0xa0008000\0" \
  204. "ramdisk_addr_r=0x81000000\0" \
  205. "kernel_addr=0x0c100000\0" \
  206. "ramdisk_addr=0x0c800000\0" \
  207. "maxramdisk=0x1800000\0" \
  208. "pxefile_addr_r=0xa8000000\0" \
  209. "kernel_addr_r=0xa0008000\0"
  210. #endif
  211. #define CONFIG_EXTRA_ENV_SETTINGS \
  212. CONFIG_PLATFORM_ENV_SETTINGS \
  213. "console=ttyAMA0,38400n8\0" \
  214. "dram=1024M\0" \
  215. "root=/dev/sda1 rw\0" \
  216. "mtd=armflash:1M@0x800000(uboot),7M@0x1000000(kernel)," \
  217. "24M@0x2000000(initrd)\0" \
  218. "flashargs=setenv bootargs root=${root} console=${console} " \
  219. "mem=${dram} mtdparts=${mtd} mmci.fmax=190000 " \
  220. "devtmpfs.mount=0 vmalloc=256M\0" \
  221. "bootflash=run flashargs; " \
  222. "cp ${ramdisk_addr} ${ramdisk_addr_r} ${maxramdisk}; " \
  223. "bootm ${kernel_addr} ${ramdisk_addr_r}\0"
  224. /* FLASH and environment organization */
  225. #define PHYS_FLASH_SIZE 0x04000000 /* 64MB */
  226. #define CONFIG_SYS_FLASH_CFI 1
  227. #define CONFIG_FLASH_CFI_DRIVER 1
  228. #define CONFIG_SYS_FLASH_SIZE 0x04000000
  229. #define CONFIG_SYS_MAX_FLASH_BANKS 2
  230. #define CONFIG_SYS_FLASH_BASE0 V2M_NOR0
  231. #define CONFIG_SYS_FLASH_BASE1 V2M_NOR1
  232. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE0
  233. /* Timeout values in ticks */
  234. #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
  235. #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
  236. /* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */
  237. #define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */
  238. #define FLASH_MAX_SECTOR_SIZE 0x00040000 /* 256 KB sectors */
  239. /* Room required on the stack for the environment data */
  240. #define CONFIG_ENV_SIZE FLASH_MAX_SECTOR_SIZE
  241. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
  242. /*
  243. * Amount of flash used for environment:
  244. * We don't know which end has the small erase blocks so we use the penultimate
  245. * sector location for the environment
  246. */
  247. #define CONFIG_ENV_SECT_SIZE FLASH_MAX_SECTOR_SIZE
  248. #define CONFIG_ENV_OVERWRITE 1
  249. /* Store environment at top of flash */
  250. #define CONFIG_ENV_IS_IN_FLASH 1
  251. #define CONFIG_ENV_OFFSET (PHYS_FLASH_SIZE - \
  252. (2 * CONFIG_ENV_SECT_SIZE))
  253. #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE1 + \
  254. CONFIG_ENV_OFFSET)
  255. #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
  256. #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
  257. #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE0, \
  258. CONFIG_SYS_FLASH_BASE1 }
  259. /* Monitor Command Prompt */
  260. #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  261. #define CONFIG_SYS_PROMPT "VExpress# "
  262. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  263. sizeof(CONFIG_SYS_PROMPT) + 16)
  264. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
  265. #define CONFIG_CMD_SOURCE
  266. #define CONFIG_SYS_LONGHELP
  267. #define CONFIG_CMDLINE_EDITING 1
  268. #define CONFIG_SYS_MAXARGS 16 /* max command args */
  269. #endif /* VEXPRESS_COMMON_H */