cmd_ide.c 50 KB

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  1. /*
  2. * (C) Copyright 2000-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * IDE support
  26. */
  27. #include <common.h>
  28. #include <config.h>
  29. #include <watchdog.h>
  30. #include <command.h>
  31. #include <image.h>
  32. #include <asm/byteorder.h>
  33. #include <asm/io.h>
  34. #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
  35. # include <pcmcia.h>
  36. #endif
  37. #ifdef CONFIG_8xx
  38. # include <mpc8xx.h>
  39. #endif
  40. #ifdef CONFIG_MPC5xxx
  41. #include <mpc5xxx.h>
  42. #endif
  43. #include <ide.h>
  44. #include <ata.h>
  45. #ifdef CONFIG_STATUS_LED
  46. # include <status_led.h>
  47. #endif
  48. #ifdef CONFIG_IDE_8xx_DIRECT
  49. DECLARE_GLOBAL_DATA_PTR;
  50. #endif
  51. #ifdef __PPC__
  52. # define EIEIO __asm__ volatile ("eieio")
  53. # define SYNC __asm__ volatile ("sync")
  54. #else
  55. # define EIEIO /* nothing */
  56. # define SYNC /* nothing */
  57. #endif
  58. #ifdef CONFIG_IDE_8xx_DIRECT
  59. /* Timings for IDE Interface
  60. *
  61. * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
  62. * 70 165 30 PIO-Mode 0, [ns]
  63. * 4 9 2 [Cycles]
  64. * 50 125 20 PIO-Mode 1, [ns]
  65. * 3 7 2 [Cycles]
  66. * 30 100 15 PIO-Mode 2, [ns]
  67. * 2 6 1 [Cycles]
  68. * 30 80 10 PIO-Mode 3, [ns]
  69. * 2 5 1 [Cycles]
  70. * 25 70 10 PIO-Mode 4, [ns]
  71. * 2 4 1 [Cycles]
  72. */
  73. const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
  74. {
  75. /* Setup Length Hold */
  76. { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
  77. { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
  78. { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
  79. { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
  80. { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
  81. };
  82. static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
  83. #ifndef CONFIG_SYS_PIO_MODE
  84. #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
  85. #endif
  86. static int pio_mode = CONFIG_SYS_PIO_MODE;
  87. /* Make clock cycles and always round up */
  88. #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
  89. #endif /* CONFIG_IDE_8xx_DIRECT */
  90. /* ------------------------------------------------------------------------- */
  91. /* Current I/O Device */
  92. static int curr_device = -1;
  93. /* Current offset for IDE0 / IDE1 bus access */
  94. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  95. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  96. CONFIG_SYS_ATA_IDE0_OFFSET,
  97. #endif
  98. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  99. CONFIG_SYS_ATA_IDE1_OFFSET,
  100. #endif
  101. };
  102. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  103. block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  104. /* ------------------------------------------------------------------------- */
  105. #ifdef CONFIG_IDE_LED
  106. # if !defined(CONFIG_BMS2003) && \
  107. !defined(CONFIG_CPC45) && \
  108. !defined(CONFIG_KUP4K) && \
  109. !defined(CONFIG_KUP4X)
  110. static void ide_led (uchar led, uchar status);
  111. #else
  112. extern void ide_led (uchar led, uchar status);
  113. #endif
  114. #else
  115. #define ide_led(a,b) /* dummy */
  116. #endif
  117. #ifdef CONFIG_IDE_RESET
  118. static void ide_reset (void);
  119. #else
  120. #define ide_reset() /* dummy */
  121. #endif
  122. static void ide_ident (block_dev_desc_t *dev_desc);
  123. static uchar ide_wait (int dev, ulong t);
  124. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  125. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  126. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  127. static void input_data(int dev, ulong *sect_buf, int words);
  128. static void output_data(int dev, ulong *sect_buf, int words);
  129. static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
  130. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  131. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  132. #endif
  133. #ifdef CONFIG_ATAPI
  134. static void atapi_inquiry(block_dev_desc_t *dev_desc);
  135. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
  136. #endif
  137. #ifdef CONFIG_IDE_8xx_DIRECT
  138. static void set_pcmcia_timing (int pmode);
  139. #endif
  140. /* ------------------------------------------------------------------------- */
  141. int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  142. {
  143. int rcode = 0;
  144. switch (argc) {
  145. case 0:
  146. case 1:
  147. cmd_usage(cmdtp);
  148. return 1;
  149. case 2:
  150. if (strncmp(argv[1],"res",3) == 0) {
  151. puts ("\nReset IDE"
  152. #ifdef CONFIG_IDE_8xx_DIRECT
  153. " on PCMCIA " PCMCIA_SLOT_MSG
  154. #endif
  155. ": ");
  156. ide_init ();
  157. return 0;
  158. } else if (strncmp(argv[1],"inf",3) == 0) {
  159. int i;
  160. putc ('\n');
  161. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  162. if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
  163. continue; /* list only known devices */
  164. printf ("IDE device %d: ", i);
  165. dev_print(&ide_dev_desc[i]);
  166. }
  167. return 0;
  168. } else if (strncmp(argv[1],"dev",3) == 0) {
  169. if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
  170. puts ("\nno IDE devices available\n");
  171. return 1;
  172. }
  173. printf ("\nIDE device %d: ", curr_device);
  174. dev_print(&ide_dev_desc[curr_device]);
  175. return 0;
  176. } else if (strncmp(argv[1],"part",4) == 0) {
  177. int dev, ok;
  178. for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
  179. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  180. ++ok;
  181. if (dev)
  182. putc ('\n');
  183. print_part(&ide_dev_desc[dev]);
  184. }
  185. }
  186. if (!ok) {
  187. puts ("\nno IDE devices available\n");
  188. rcode ++;
  189. }
  190. return rcode;
  191. }
  192. cmd_usage(cmdtp);
  193. return 1;
  194. case 3:
  195. if (strncmp(argv[1],"dev",3) == 0) {
  196. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  197. printf ("\nIDE device %d: ", dev);
  198. if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
  199. puts ("unknown device\n");
  200. return 1;
  201. }
  202. dev_print(&ide_dev_desc[dev]);
  203. /*ide_print (dev);*/
  204. if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
  205. return 1;
  206. }
  207. curr_device = dev;
  208. puts ("... is now current device\n");
  209. return 0;
  210. } else if (strncmp(argv[1],"part",4) == 0) {
  211. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  212. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  213. print_part(&ide_dev_desc[dev]);
  214. } else {
  215. printf ("\nIDE device %d not available\n", dev);
  216. rcode = 1;
  217. }
  218. return rcode;
  219. #if 0
  220. } else if (strncmp(argv[1],"pio",4) == 0) {
  221. int mode = (int)simple_strtoul(argv[2], NULL, 10);
  222. if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
  223. puts ("\nSetting ");
  224. pio_mode = mode;
  225. ide_init ();
  226. } else {
  227. printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
  228. mode, IDE_MAX_PIO_MODE);
  229. }
  230. return;
  231. #endif
  232. }
  233. cmd_usage(cmdtp);
  234. return 1;
  235. default:
  236. /* at least 4 args */
  237. if (strcmp(argv[1],"read") == 0) {
  238. ulong addr = simple_strtoul(argv[2], NULL, 16);
  239. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  240. ulong n;
  241. #ifdef CONFIG_SYS_64BIT_LBA
  242. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  243. printf ("\nIDE read: device %d block # %Ld, count %ld ... ",
  244. curr_device, blk, cnt);
  245. #else
  246. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  247. printf ("\nIDE read: device %d block # %ld, count %ld ... ",
  248. curr_device, blk, cnt);
  249. #endif
  250. n = ide_dev_desc[curr_device].block_read (curr_device,
  251. blk, cnt,
  252. (ulong *)addr);
  253. /* flush cache after read */
  254. flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
  255. printf ("%ld blocks read: %s\n",
  256. n, (n==cnt) ? "OK" : "ERROR");
  257. if (n==cnt) {
  258. return 0;
  259. } else {
  260. return 1;
  261. }
  262. } else if (strcmp(argv[1],"write") == 0) {
  263. ulong addr = simple_strtoul(argv[2], NULL, 16);
  264. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  265. ulong n;
  266. #ifdef CONFIG_SYS_64BIT_LBA
  267. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  268. printf ("\nIDE write: device %d block # %Ld, count %ld ... ",
  269. curr_device, blk, cnt);
  270. #else
  271. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  272. printf ("\nIDE write: device %d block # %ld, count %ld ... ",
  273. curr_device, blk, cnt);
  274. #endif
  275. n = ide_write (curr_device, blk, cnt, (ulong *)addr);
  276. printf ("%ld blocks written: %s\n",
  277. n, (n==cnt) ? "OK" : "ERROR");
  278. if (n==cnt) {
  279. return 0;
  280. } else {
  281. return 1;
  282. }
  283. } else {
  284. cmd_usage(cmdtp);
  285. rcode = 1;
  286. }
  287. return rcode;
  288. }
  289. }
  290. int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  291. {
  292. char *boot_device = NULL;
  293. char *ep;
  294. int dev, part = 0;
  295. ulong addr, cnt;
  296. disk_partition_t info;
  297. image_header_t *hdr;
  298. int rcode = 0;
  299. #if defined(CONFIG_FIT)
  300. const void *fit_hdr = NULL;
  301. #endif
  302. show_boot_progress (41);
  303. switch (argc) {
  304. case 1:
  305. addr = CONFIG_SYS_LOAD_ADDR;
  306. boot_device = getenv ("bootdevice");
  307. break;
  308. case 2:
  309. addr = simple_strtoul(argv[1], NULL, 16);
  310. boot_device = getenv ("bootdevice");
  311. break;
  312. case 3:
  313. addr = simple_strtoul(argv[1], NULL, 16);
  314. boot_device = argv[2];
  315. break;
  316. default:
  317. cmd_usage(cmdtp);
  318. show_boot_progress (-42);
  319. return 1;
  320. }
  321. show_boot_progress (42);
  322. if (!boot_device) {
  323. puts ("\n** No boot device **\n");
  324. show_boot_progress (-43);
  325. return 1;
  326. }
  327. show_boot_progress (43);
  328. dev = simple_strtoul(boot_device, &ep, 16);
  329. if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
  330. printf ("\n** Device %d not available\n", dev);
  331. show_boot_progress (-44);
  332. return 1;
  333. }
  334. show_boot_progress (44);
  335. if (*ep) {
  336. if (*ep != ':') {
  337. puts ("\n** Invalid boot device, use `dev[:part]' **\n");
  338. show_boot_progress (-45);
  339. return 1;
  340. }
  341. part = simple_strtoul(++ep, NULL, 16);
  342. }
  343. show_boot_progress (45);
  344. if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
  345. show_boot_progress (-46);
  346. return 1;
  347. }
  348. show_boot_progress (46);
  349. if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
  350. (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
  351. printf ("\n** Invalid partition type \"%.32s\""
  352. " (expect \"" BOOT_PART_TYPE "\")\n",
  353. info.type);
  354. show_boot_progress (-47);
  355. return 1;
  356. }
  357. show_boot_progress (47);
  358. printf ("\nLoading from IDE device %d, partition %d: "
  359. "Name: %.32s Type: %.32s\n",
  360. dev, part, info.name, info.type);
  361. debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
  362. info.start, info.size, info.blksz);
  363. if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
  364. printf ("** Read error on %d:%d\n", dev, part);
  365. show_boot_progress (-48);
  366. return 1;
  367. }
  368. show_boot_progress (48);
  369. switch (genimg_get_format ((void *)addr)) {
  370. case IMAGE_FORMAT_LEGACY:
  371. hdr = (image_header_t *)addr;
  372. show_boot_progress (49);
  373. if (!image_check_hcrc (hdr)) {
  374. puts ("\n** Bad Header Checksum **\n");
  375. show_boot_progress (-50);
  376. return 1;
  377. }
  378. show_boot_progress (50);
  379. image_print_contents (hdr);
  380. cnt = image_get_image_size (hdr);
  381. break;
  382. #if defined(CONFIG_FIT)
  383. case IMAGE_FORMAT_FIT:
  384. fit_hdr = (const void *)addr;
  385. puts ("Fit image detected...\n");
  386. cnt = fit_get_size (fit_hdr);
  387. break;
  388. #endif
  389. default:
  390. show_boot_progress (-49);
  391. puts ("** Unknown image type\n");
  392. return 1;
  393. }
  394. cnt += info.blksz - 1;
  395. cnt /= info.blksz;
  396. cnt -= 1;
  397. if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
  398. (ulong *)(addr+info.blksz)) != cnt) {
  399. printf ("** Read error on %d:%d\n", dev, part);
  400. show_boot_progress (-51);
  401. return 1;
  402. }
  403. show_boot_progress (51);
  404. #if defined(CONFIG_FIT)
  405. /* This cannot be done earlier, we need complete FIT image in RAM first */
  406. if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
  407. if (!fit_check_format (fit_hdr)) {
  408. show_boot_progress (-140);
  409. puts ("** Bad FIT image format\n");
  410. return 1;
  411. }
  412. show_boot_progress (141);
  413. fit_print_contents (fit_hdr);
  414. }
  415. #endif
  416. /* Loading ok, update default load address */
  417. load_addr = addr;
  418. /* Check if we should attempt an auto-start */
  419. if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
  420. char *local_args[2];
  421. extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
  422. local_args[0] = argv[0];
  423. local_args[1] = NULL;
  424. printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
  425. do_bootm (cmdtp, 0, 1, local_args);
  426. rcode = 1;
  427. }
  428. return rcode;
  429. }
  430. /* ------------------------------------------------------------------------- */
  431. void inline
  432. __ide_outb(int dev, int port, unsigned char val)
  433. {
  434. debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  435. dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  436. outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  437. }
  438. void ide_outb (int dev, int port, unsigned char val)
  439. __attribute__((weak, alias("__ide_outb")));
  440. unsigned char inline
  441. __ide_inb(int dev, int port)
  442. {
  443. uchar val;
  444. val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  445. debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  446. dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  447. return val;
  448. }
  449. unsigned char ide_inb(int dev, int port)
  450. __attribute__((weak, alias("__ide_inb")));
  451. #ifdef CONFIG_TUNE_PIO
  452. int inline
  453. __ide_set_piomode(int pio_mode)
  454. {
  455. return 0;
  456. }
  457. int inline ide_set_piomode(int pio_mode)
  458. __attribute__((weak, alias("__ide_set_piomode")));
  459. #endif
  460. void ide_init (void)
  461. {
  462. #ifdef CONFIG_IDE_8xx_DIRECT
  463. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  464. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  465. #endif
  466. unsigned char c;
  467. int i, bus;
  468. #if defined(CONFIG_SC3)
  469. unsigned int ata_reset_time = ATA_RESET_TIME;
  470. #endif
  471. #ifdef CONFIG_IDE_8xx_PCCARD
  472. extern int pcmcia_on (void);
  473. extern int ide_devices_found; /* Initialized in check_ide_device() */
  474. #endif /* CONFIG_IDE_8xx_PCCARD */
  475. #ifdef CONFIG_IDE_PREINIT
  476. extern int ide_preinit (void);
  477. WATCHDOG_RESET();
  478. if (ide_preinit ()) {
  479. puts ("ide_preinit failed\n");
  480. return;
  481. }
  482. #endif /* CONFIG_IDE_PREINIT */
  483. #ifdef CONFIG_IDE_8xx_PCCARD
  484. extern int pcmcia_on (void);
  485. extern int ide_devices_found; /* Initialized in check_ide_device() */
  486. WATCHDOG_RESET();
  487. ide_devices_found = 0;
  488. /* initialize the PCMCIA IDE adapter card */
  489. pcmcia_on();
  490. if (!ide_devices_found)
  491. return;
  492. udelay (1000000); /* 1 s */
  493. #endif /* CONFIG_IDE_8xx_PCCARD */
  494. WATCHDOG_RESET();
  495. #ifdef CONFIG_IDE_8xx_DIRECT
  496. /* Initialize PIO timing tables */
  497. for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
  498. pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
  499. gd->bus_clk);
  500. pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
  501. gd->bus_clk);
  502. pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
  503. gd->bus_clk);
  504. debug ( "PIO Mode %d: setup=%2d ns/%d clk"
  505. " len=%3d ns/%d clk"
  506. " hold=%2d ns/%d clk\n",
  507. i,
  508. pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
  509. pio_config_ns[i].t_length, pio_config_clk[i].t_length,
  510. pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
  511. }
  512. #endif /* CONFIG_IDE_8xx_DIRECT */
  513. /* Reset the IDE just to be sure.
  514. * Light LED's to show
  515. */
  516. ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
  517. ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
  518. #ifdef CONFIG_IDE_8xx_DIRECT
  519. /* PCMCIA / IDE initialization for common mem space */
  520. pcmp->pcmc_pgcrb = 0;
  521. /* start in PIO mode 0 - most relaxed timings */
  522. pio_mode = 0;
  523. set_pcmcia_timing (pio_mode);
  524. #endif /* CONFIG_IDE_8xx_DIRECT */
  525. /*
  526. * Wait for IDE to get ready.
  527. * According to spec, this can take up to 31 seconds!
  528. */
  529. for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
  530. int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
  531. #ifdef CONFIG_IDE_8xx_PCCARD
  532. /* Skip non-ide devices from probing */
  533. if ((ide_devices_found & (1 << bus)) == 0) {
  534. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  535. continue;
  536. }
  537. #endif
  538. printf ("Bus %d: ", bus);
  539. ide_bus_ok[bus] = 0;
  540. /* Select device
  541. */
  542. udelay (100000); /* 100 ms */
  543. ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  544. udelay (100000); /* 100 ms */
  545. i = 0;
  546. do {
  547. udelay (10000); /* 10 ms */
  548. c = ide_inb (dev, ATA_STATUS);
  549. i++;
  550. #if defined(CONFIG_SC3)
  551. if (i > (ata_reset_time * 100)) {
  552. #else
  553. if (i > (ATA_RESET_TIME * 100)) {
  554. #endif
  555. puts ("** Timeout **\n");
  556. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  557. return;
  558. }
  559. if ((i >= 100) && ((i%100)==0)) {
  560. putc ('.');
  561. }
  562. } while (c & ATA_STAT_BUSY);
  563. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  564. puts ("not available ");
  565. debug ("Status = 0x%02X ", c);
  566. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  567. } else if ((c & ATA_STAT_READY) == 0) {
  568. puts ("not available ");
  569. debug ("Status = 0x%02X ", c);
  570. #endif
  571. } else {
  572. puts ("OK ");
  573. ide_bus_ok[bus] = 1;
  574. }
  575. WATCHDOG_RESET();
  576. }
  577. putc ('\n');
  578. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  579. curr_device = -1;
  580. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  581. #ifdef CONFIG_IDE_LED
  582. int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
  583. #endif
  584. ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
  585. ide_dev_desc[i].if_type=IF_TYPE_IDE;
  586. ide_dev_desc[i].dev=i;
  587. ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
  588. ide_dev_desc[i].blksz=0;
  589. ide_dev_desc[i].lba=0;
  590. ide_dev_desc[i].block_read=ide_read;
  591. if (!ide_bus_ok[IDE_BUS(i)])
  592. continue;
  593. ide_led (led, 1); /* LED on */
  594. ide_ident(&ide_dev_desc[i]);
  595. ide_led (led, 0); /* LED off */
  596. dev_print(&ide_dev_desc[i]);
  597. /* ide_print (i); */
  598. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  599. init_part (&ide_dev_desc[i]); /* initialize partition type */
  600. if (curr_device < 0)
  601. curr_device = i;
  602. }
  603. }
  604. WATCHDOG_RESET();
  605. }
  606. /* ------------------------------------------------------------------------- */
  607. block_dev_desc_t * ide_get_dev(int dev)
  608. {
  609. return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
  610. }
  611. #ifdef CONFIG_IDE_8xx_DIRECT
  612. static void
  613. set_pcmcia_timing (int pmode)
  614. {
  615. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  616. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  617. ulong timings;
  618. debug ("Set timing for PIO Mode %d\n", pmode);
  619. timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
  620. | PCMCIA_SST(pio_config_clk[pmode].t_setup)
  621. | PCMCIA_SL (pio_config_clk[pmode].t_length)
  622. ;
  623. /* IDE 0
  624. */
  625. pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
  626. pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
  627. #if (CONFIG_SYS_PCMCIA_POR0 != 0)
  628. | timings
  629. #endif
  630. ;
  631. debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
  632. pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
  633. pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
  634. #if (CONFIG_SYS_PCMCIA_POR1 != 0)
  635. | timings
  636. #endif
  637. ;
  638. debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
  639. pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
  640. pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
  641. #if (CONFIG_SYS_PCMCIA_POR2 != 0)
  642. | timings
  643. #endif
  644. ;
  645. debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
  646. pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
  647. pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
  648. #if (CONFIG_SYS_PCMCIA_POR3 != 0)
  649. | timings
  650. #endif
  651. ;
  652. debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
  653. /* IDE 1
  654. */
  655. pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
  656. pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
  657. #if (CONFIG_SYS_PCMCIA_POR4 != 0)
  658. | timings
  659. #endif
  660. ;
  661. debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
  662. pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
  663. pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
  664. #if (CONFIG_SYS_PCMCIA_POR5 != 0)
  665. | timings
  666. #endif
  667. ;
  668. debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
  669. pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
  670. pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
  671. #if (CONFIG_SYS_PCMCIA_POR6 != 0)
  672. | timings
  673. #endif
  674. ;
  675. debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
  676. pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
  677. pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
  678. #if (CONFIG_SYS_PCMCIA_POR7 != 0)
  679. | timings
  680. #endif
  681. ;
  682. debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
  683. }
  684. #endif /* CONFIG_IDE_8xx_DIRECT */
  685. /* ------------------------------------------------------------------------- */
  686. /* We only need to swap data if we are running on a big endian cpu. */
  687. /* But Au1x00 cpu:s already swaps data in big endian mode! */
  688. #if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
  689. #define input_swap_data(x,y,z) input_data(x,y,z)
  690. #else
  691. static void
  692. input_swap_data(int dev, ulong *sect_buf, int words)
  693. {
  694. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  695. uchar i;
  696. volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  697. volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  698. ushort *dbuf = (ushort *)sect_buf;
  699. while (words--) {
  700. for (i=0; i<2; i++) {
  701. *(((uchar *)(dbuf)) + 1) = *pbuf_even;
  702. *(uchar *)dbuf = *pbuf_odd;
  703. dbuf+=1;
  704. }
  705. }
  706. #else
  707. volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  708. ushort *dbuf = (ushort *)sect_buf;
  709. debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
  710. while (words--) {
  711. #ifdef __MIPS__
  712. *dbuf++ = swab16p((u16*)pbuf);
  713. *dbuf++ = swab16p((u16*)pbuf);
  714. #elif defined(CONFIG_PCS440EP)
  715. *dbuf++ = *pbuf;
  716. *dbuf++ = *pbuf;
  717. #else
  718. *dbuf++ = ld_le16(pbuf);
  719. *dbuf++ = ld_le16(pbuf);
  720. #endif /* !MIPS */
  721. }
  722. #endif
  723. }
  724. #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
  725. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
  726. static void
  727. output_data(int dev, ulong *sect_buf, int words)
  728. {
  729. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  730. uchar *dbuf;
  731. volatile uchar *pbuf_even;
  732. volatile uchar *pbuf_odd;
  733. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  734. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  735. dbuf = (uchar *)sect_buf;
  736. while (words--) {
  737. EIEIO;
  738. *pbuf_even = *dbuf++;
  739. EIEIO;
  740. *pbuf_odd = *dbuf++;
  741. EIEIO;
  742. *pbuf_even = *dbuf++;
  743. EIEIO;
  744. *pbuf_odd = *dbuf++;
  745. }
  746. #else
  747. ushort *dbuf;
  748. volatile ushort *pbuf;
  749. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  750. dbuf = (ushort *)sect_buf;
  751. while (words--) {
  752. #if defined(CONFIG_PCS440EP)
  753. /* not tested, because CF was write protected */
  754. EIEIO;
  755. *pbuf = ld_le16(dbuf++);
  756. EIEIO;
  757. *pbuf = ld_le16(dbuf++);
  758. #else
  759. EIEIO;
  760. *pbuf = *dbuf++;
  761. EIEIO;
  762. *pbuf = *dbuf++;
  763. #endif
  764. }
  765. #endif
  766. }
  767. #else /* ! __PPC__ */
  768. static void
  769. output_data(int dev, ulong *sect_buf, int words)
  770. {
  771. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
  772. }
  773. #endif /* __PPC__ */
  774. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
  775. static void
  776. input_data(int dev, ulong *sect_buf, int words)
  777. {
  778. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  779. uchar *dbuf;
  780. volatile uchar *pbuf_even;
  781. volatile uchar *pbuf_odd;
  782. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  783. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  784. dbuf = (uchar *)sect_buf;
  785. while (words--) {
  786. *dbuf++ = *pbuf_even;
  787. EIEIO;
  788. SYNC;
  789. *dbuf++ = *pbuf_odd;
  790. EIEIO;
  791. SYNC;
  792. *dbuf++ = *pbuf_even;
  793. EIEIO;
  794. SYNC;
  795. *dbuf++ = *pbuf_odd;
  796. EIEIO;
  797. SYNC;
  798. }
  799. #else
  800. ushort *dbuf;
  801. volatile ushort *pbuf;
  802. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  803. dbuf = (ushort *)sect_buf;
  804. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  805. while (words--) {
  806. #if defined(CONFIG_PCS440EP)
  807. EIEIO;
  808. *dbuf++ = ld_le16(pbuf);
  809. EIEIO;
  810. *dbuf++ = ld_le16(pbuf);
  811. #else
  812. EIEIO;
  813. *dbuf++ = *pbuf;
  814. EIEIO;
  815. *dbuf++ = *pbuf;
  816. #endif
  817. }
  818. #endif
  819. }
  820. #else /* ! __PPC__ */
  821. static void
  822. input_data(int dev, ulong *sect_buf, int words)
  823. {
  824. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
  825. }
  826. #endif /* __PPC__ */
  827. /* -------------------------------------------------------------------------
  828. */
  829. static void ide_ident (block_dev_desc_t *dev_desc)
  830. {
  831. ulong iobuf[ATA_SECTORWORDS];
  832. unsigned char c;
  833. hd_driveid_t *iop = (hd_driveid_t *)iobuf;
  834. #ifdef CONFIG_ATAPI
  835. int retries = 0;
  836. int do_retry = 0;
  837. #endif
  838. #ifdef CONFIG_TUNE_PIO
  839. int pio_mode;
  840. #endif
  841. #if 0
  842. int mode, cycle_time;
  843. #endif
  844. int device;
  845. device=dev_desc->dev;
  846. printf (" Device %d: ", device);
  847. ide_led (DEVICE_LED(device), 1); /* LED on */
  848. /* Select device
  849. */
  850. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  851. dev_desc->if_type=IF_TYPE_IDE;
  852. #ifdef CONFIG_ATAPI
  853. do_retry = 0;
  854. retries = 0;
  855. /* Warning: This will be tricky to read */
  856. while (retries <= 1) {
  857. /* check signature */
  858. if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
  859. (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
  860. (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
  861. (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
  862. /* ATAPI Signature found */
  863. dev_desc->if_type=IF_TYPE_ATAPI;
  864. /* Start Ident Command
  865. */
  866. ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
  867. /*
  868. * Wait for completion - ATAPI devices need more time
  869. * to become ready
  870. */
  871. c = ide_wait (device, ATAPI_TIME_OUT);
  872. } else
  873. #endif
  874. {
  875. /* Start Ident Command
  876. */
  877. ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
  878. /* Wait for completion
  879. */
  880. c = ide_wait (device, IDE_TIME_OUT);
  881. }
  882. ide_led (DEVICE_LED(device), 0); /* LED off */
  883. if (((c & ATA_STAT_DRQ) == 0) ||
  884. ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
  885. #ifdef CONFIG_ATAPI
  886. {
  887. /* Need to soft reset the device in case it's an ATAPI... */
  888. debug ("Retrying...\n");
  889. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  890. udelay(100000);
  891. ide_outb (device, ATA_COMMAND, 0x08);
  892. udelay (500000); /* 500 ms */
  893. }
  894. /* Select device
  895. */
  896. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  897. retries++;
  898. #else
  899. return;
  900. #endif
  901. }
  902. #ifdef CONFIG_ATAPI
  903. else
  904. break;
  905. } /* see above - ugly to read */
  906. if (retries == 2) /* Not found */
  907. return;
  908. #endif
  909. input_swap_data (device, iobuf, ATA_SECTORWORDS);
  910. ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
  911. ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
  912. ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
  913. #ifdef __LITTLE_ENDIAN
  914. /*
  915. * firmware revision, model, and serial number have Big Endian Byte
  916. * order in Word. Convert all three to little endian.
  917. *
  918. * See CF+ and CompactFlash Specification Revision 2.0:
  919. * 6.2.1.6: Identify Drive, Table 39 for more details
  920. */
  921. strswab (dev_desc->revision);
  922. strswab (dev_desc->vendor);
  923. strswab (dev_desc->product);
  924. #endif /* __LITTLE_ENDIAN */
  925. if ((iop->config & 0x0080)==0x0080)
  926. dev_desc->removable = 1;
  927. else
  928. dev_desc->removable = 0;
  929. #ifdef CONFIG_TUNE_PIO
  930. /* Mode 0 - 2 only, are directly determined by word 51. */
  931. pio_mode = iop->tPIO;
  932. if (pio_mode > 2) {
  933. printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
  934. pio_mode = 0; /* Force it to dead slow, and hope for the best... */
  935. }
  936. /* Any CompactFlash Storage Card that supports PIO mode 3 or above
  937. * shall set bit 1 of word 53 to one and support the fields contained
  938. * in words 64 through 70.
  939. */
  940. if (iop->field_valid & 0x02) {
  941. /* Mode 3 and above are possible. Check in order from slow
  942. * to fast, so we wind up with the highest mode allowed.
  943. */
  944. if (iop->eide_pio_modes & 0x01)
  945. pio_mode = 3;
  946. if (iop->eide_pio_modes & 0x02)
  947. pio_mode = 4;
  948. if (ata_id_is_cfa((u16 *)iop)) {
  949. if ((iop->cf_advanced_caps & 0x07) == 0x01)
  950. pio_mode = 5;
  951. if ((iop->cf_advanced_caps & 0x07) == 0x02)
  952. pio_mode = 6;
  953. }
  954. }
  955. /* System-specific, depends on bus speeds, etc. */
  956. ide_set_piomode(pio_mode);
  957. #endif /* CONFIG_TUNE_PIO */
  958. #if 0
  959. /*
  960. * Drive PIO mode autoselection
  961. */
  962. mode = iop->tPIO;
  963. printf ("tPIO = 0x%02x = %d\n",mode, mode);
  964. if (mode > 2) { /* 2 is maximum allowed tPIO value */
  965. mode = 2;
  966. debug ("Override tPIO -> 2\n");
  967. }
  968. if (iop->field_valid & 2) { /* drive implements ATA2? */
  969. debug ("Drive implements ATA2\n");
  970. if (iop->capability & 8) { /* drive supports use_iordy? */
  971. cycle_time = iop->eide_pio_iordy;
  972. } else {
  973. cycle_time = iop->eide_pio;
  974. }
  975. debug ("cycle time = %d\n", cycle_time);
  976. mode = 4;
  977. if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
  978. if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
  979. if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
  980. if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
  981. }
  982. printf ("PIO mode to use: PIO %d\n", mode);
  983. #endif /* 0 */
  984. #ifdef CONFIG_ATAPI
  985. if (dev_desc->if_type==IF_TYPE_ATAPI) {
  986. atapi_inquiry(dev_desc);
  987. return;
  988. }
  989. #endif /* CONFIG_ATAPI */
  990. #ifdef __BIG_ENDIAN
  991. /* swap shorts */
  992. dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
  993. #else /* ! __BIG_ENDIAN */
  994. /*
  995. * do not swap shorts on little endian
  996. *
  997. * See CF+ and CompactFlash Specification Revision 2.0:
  998. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  999. */
  1000. dev_desc->lba = iop->lba_capacity;
  1001. #endif /* __BIG_ENDIAN */
  1002. #ifdef CONFIG_LBA48
  1003. if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
  1004. dev_desc->lba48 = 1;
  1005. dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
  1006. ((unsigned long long)iop->lba48_capacity[1] << 16) |
  1007. ((unsigned long long)iop->lba48_capacity[2] << 32) |
  1008. ((unsigned long long)iop->lba48_capacity[3] << 48);
  1009. } else {
  1010. dev_desc->lba48 = 0;
  1011. }
  1012. #endif /* CONFIG_LBA48 */
  1013. /* assuming HD */
  1014. dev_desc->type=DEV_TYPE_HARDDISK;
  1015. dev_desc->blksz=ATA_BLOCKSIZE;
  1016. dev_desc->lun=0; /* just to fill something in... */
  1017. #if 0 /* only used to test the powersaving mode,
  1018. * if enabled, the drive goes after 5 sec
  1019. * in standby mode */
  1020. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1021. c = ide_wait (device, IDE_TIME_OUT);
  1022. ide_outb (device, ATA_SECT_CNT, 1);
  1023. ide_outb (device, ATA_LBA_LOW, 0);
  1024. ide_outb (device, ATA_LBA_MID, 0);
  1025. ide_outb (device, ATA_LBA_HIGH, 0);
  1026. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1027. ide_outb (device, ATA_COMMAND, 0xe3);
  1028. udelay (50);
  1029. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1030. #endif
  1031. }
  1032. /* ------------------------------------------------------------------------- */
  1033. ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1034. {
  1035. ulong n = 0;
  1036. unsigned char c;
  1037. unsigned char pwrsave=0; /* power save */
  1038. #ifdef CONFIG_LBA48
  1039. unsigned char lba48 = 0;
  1040. if (blknr & 0x0000fffff0000000ULL) {
  1041. /* more than 28 bits used, use 48bit mode */
  1042. lba48 = 1;
  1043. }
  1044. #endif
  1045. debug ("ide_read dev %d start %LX, blocks %lX buffer at %lX\n",
  1046. device, blknr, blkcnt, (ulong)buffer);
  1047. ide_led (DEVICE_LED(device), 1); /* LED on */
  1048. /* Select device
  1049. */
  1050. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1051. c = ide_wait (device, IDE_TIME_OUT);
  1052. if (c & ATA_STAT_BUSY) {
  1053. printf ("IDE read: device %d not ready\n", device);
  1054. goto IDE_READ_E;
  1055. }
  1056. /* first check if the drive is in Powersaving mode, if yes,
  1057. * increase the timeout value */
  1058. ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  1059. udelay (50);
  1060. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1061. if (c & ATA_STAT_BUSY) {
  1062. printf ("IDE read: device %d not ready\n", device);
  1063. goto IDE_READ_E;
  1064. }
  1065. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1066. printf ("No Powersaving mode %X\n", c);
  1067. } else {
  1068. c = ide_inb(device,ATA_SECT_CNT);
  1069. debug ("Powersaving %02X\n",c);
  1070. if(c==0)
  1071. pwrsave=1;
  1072. }
  1073. while (blkcnt-- > 0) {
  1074. c = ide_wait (device, IDE_TIME_OUT);
  1075. if (c & ATA_STAT_BUSY) {
  1076. printf ("IDE read: device %d not ready\n", device);
  1077. break;
  1078. }
  1079. #ifdef CONFIG_LBA48
  1080. if (lba48) {
  1081. /* write high bits */
  1082. ide_outb (device, ATA_SECT_CNT, 0);
  1083. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1084. #ifdef CONFIG_SYS_64BIT_LBA
  1085. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1086. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1087. #else
  1088. ide_outb (device, ATA_LBA_MID, 0);
  1089. ide_outb (device, ATA_LBA_HIGH, 0);
  1090. #endif
  1091. }
  1092. #endif
  1093. ide_outb (device, ATA_SECT_CNT, 1);
  1094. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1095. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1096. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1097. #ifdef CONFIG_LBA48
  1098. if (lba48) {
  1099. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1100. ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
  1101. } else
  1102. #endif
  1103. {
  1104. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1105. ATA_DEVICE(device) |
  1106. ((blknr >> 24) & 0xF) );
  1107. ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
  1108. }
  1109. udelay (50);
  1110. if(pwrsave) {
  1111. c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
  1112. pwrsave=0;
  1113. } else {
  1114. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1115. }
  1116. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1117. #if defined(CONFIG_SYS_64BIT_LBA)
  1118. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1119. device, blknr, c);
  1120. #else
  1121. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1122. device, (ulong)blknr, c);
  1123. #endif
  1124. break;
  1125. }
  1126. input_data (device, buffer, ATA_SECTORWORDS);
  1127. (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
  1128. ++n;
  1129. ++blknr;
  1130. buffer += ATA_BLOCKSIZE;
  1131. }
  1132. IDE_READ_E:
  1133. ide_led (DEVICE_LED(device), 0); /* LED off */
  1134. return (n);
  1135. }
  1136. /* ------------------------------------------------------------------------- */
  1137. ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1138. {
  1139. ulong n = 0;
  1140. unsigned char c;
  1141. #ifdef CONFIG_LBA48
  1142. unsigned char lba48 = 0;
  1143. if (blknr & 0x0000fffff0000000ULL) {
  1144. /* more than 28 bits used, use 48bit mode */
  1145. lba48 = 1;
  1146. }
  1147. #endif
  1148. ide_led (DEVICE_LED(device), 1); /* LED on */
  1149. /* Select device
  1150. */
  1151. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1152. while (blkcnt-- > 0) {
  1153. c = ide_wait (device, IDE_TIME_OUT);
  1154. if (c & ATA_STAT_BUSY) {
  1155. printf ("IDE read: device %d not ready\n", device);
  1156. goto WR_OUT;
  1157. }
  1158. #ifdef CONFIG_LBA48
  1159. if (lba48) {
  1160. /* write high bits */
  1161. ide_outb (device, ATA_SECT_CNT, 0);
  1162. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1163. #ifdef CONFIG_SYS_64BIT_LBA
  1164. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1165. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1166. #else
  1167. ide_outb (device, ATA_LBA_MID, 0);
  1168. ide_outb (device, ATA_LBA_HIGH, 0);
  1169. #endif
  1170. }
  1171. #endif
  1172. ide_outb (device, ATA_SECT_CNT, 1);
  1173. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1174. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1175. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1176. #ifdef CONFIG_LBA48
  1177. if (lba48) {
  1178. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1179. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  1180. } else
  1181. #endif
  1182. {
  1183. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1184. ATA_DEVICE(device) |
  1185. ((blknr >> 24) & 0xF) );
  1186. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
  1187. }
  1188. udelay (50);
  1189. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1190. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1191. #if defined(CONFIG_SYS_64BIT_LBA)
  1192. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1193. device, blknr, c);
  1194. #else
  1195. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1196. device, (ulong)blknr, c);
  1197. #endif
  1198. goto WR_OUT;
  1199. }
  1200. output_data (device, buffer, ATA_SECTORWORDS);
  1201. c = ide_inb (device, ATA_STATUS); /* clear IRQ */
  1202. ++n;
  1203. ++blknr;
  1204. buffer += ATA_BLOCKSIZE;
  1205. }
  1206. WR_OUT:
  1207. ide_led (DEVICE_LED(device), 0); /* LED off */
  1208. return (n);
  1209. }
  1210. /* ------------------------------------------------------------------------- */
  1211. /*
  1212. * copy src to dest, skipping leading and trailing blanks and null
  1213. * terminate the string
  1214. * "len" is the size of available memory including the terminating '\0'
  1215. */
  1216. static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
  1217. {
  1218. unsigned char *end, *last;
  1219. last = dst;
  1220. end = src + len - 1;
  1221. /* reserve space for '\0' */
  1222. if (len < 2)
  1223. goto OUT;
  1224. /* skip leading white space */
  1225. while ((*src) && (src<end) && (*src==' '))
  1226. ++src;
  1227. /* copy string, omitting trailing white space */
  1228. while ((*src) && (src<end)) {
  1229. *dst++ = *src;
  1230. if (*src++ != ' ')
  1231. last = dst;
  1232. }
  1233. OUT:
  1234. *last = '\0';
  1235. }
  1236. /* ------------------------------------------------------------------------- */
  1237. /*
  1238. * Wait until Busy bit is off, or timeout (in ms)
  1239. * Return last status
  1240. */
  1241. static uchar ide_wait (int dev, ulong t)
  1242. {
  1243. ulong delay = 10 * t; /* poll every 100 us */
  1244. uchar c;
  1245. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  1246. udelay (100);
  1247. if (delay-- == 0) {
  1248. break;
  1249. }
  1250. }
  1251. return (c);
  1252. }
  1253. /* ------------------------------------------------------------------------- */
  1254. #ifdef CONFIG_IDE_RESET
  1255. extern void ide_set_reset(int idereset);
  1256. static void ide_reset (void)
  1257. {
  1258. #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
  1259. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  1260. #endif
  1261. int i;
  1262. curr_device = -1;
  1263. for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
  1264. ide_bus_ok[i] = 0;
  1265. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
  1266. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  1267. ide_set_reset (1); /* assert reset */
  1268. /* the reset signal shall be asserted for et least 25 us */
  1269. udelay(25);
  1270. WATCHDOG_RESET();
  1271. #ifdef CONFIG_SYS_PB_12V_ENABLE
  1272. immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */
  1273. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1274. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1275. immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
  1276. /* wait 500 ms for the voltage to stabilize
  1277. */
  1278. for (i=0; i<500; ++i) {
  1279. udelay (1000);
  1280. }
  1281. immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */
  1282. #endif /* CONFIG_SYS_PB_12V_ENABLE */
  1283. #ifdef CONFIG_SYS_PB_IDE_MOTOR
  1284. /* configure IDE Motor voltage monitor pin as input */
  1285. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1286. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1287. immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1288. /* wait up to 1 s for the motor voltage to stabilize
  1289. */
  1290. for (i=0; i<1000; ++i) {
  1291. if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
  1292. break;
  1293. }
  1294. udelay (1000);
  1295. }
  1296. if (i == 1000) { /* Timeout */
  1297. printf ("\nWarning: 5V for IDE Motor missing\n");
  1298. # ifdef CONFIG_STATUS_LED
  1299. # ifdef STATUS_LED_YELLOW
  1300. status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
  1301. # endif
  1302. # ifdef STATUS_LED_GREEN
  1303. status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
  1304. # endif
  1305. # endif /* CONFIG_STATUS_LED */
  1306. }
  1307. #endif /* CONFIG_SYS_PB_IDE_MOTOR */
  1308. WATCHDOG_RESET();
  1309. /* de-assert RESET signal */
  1310. ide_set_reset(0);
  1311. /* wait 250 ms */
  1312. for (i=0; i<250; ++i) {
  1313. udelay (1000);
  1314. }
  1315. }
  1316. #endif /* CONFIG_IDE_RESET */
  1317. /* ------------------------------------------------------------------------- */
  1318. #if defined(CONFIG_IDE_LED) && \
  1319. !defined(CONFIG_CPC45) && \
  1320. !defined(CONFIG_HMI10) && \
  1321. !defined(CONFIG_KUP4K) && \
  1322. !defined(CONFIG_KUP4X)
  1323. static uchar led_buffer = 0; /* Buffer for current LED status */
  1324. static void ide_led (uchar led, uchar status)
  1325. {
  1326. uchar *led_port = LED_PORT;
  1327. if (status) { /* switch LED on */
  1328. led_buffer |= led;
  1329. } else { /* switch LED off */
  1330. led_buffer &= ~led;
  1331. }
  1332. *led_port = led_buffer;
  1333. }
  1334. #endif /* CONFIG_IDE_LED */
  1335. #if defined(CONFIG_OF_IDE_FIXUP)
  1336. int ide_device_present(int dev)
  1337. {
  1338. if (dev >= CONFIG_SYS_IDE_MAXBUS)
  1339. return 0;
  1340. return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
  1341. }
  1342. #endif
  1343. /* ------------------------------------------------------------------------- */
  1344. #ifdef CONFIG_ATAPI
  1345. /****************************************************************************
  1346. * ATAPI Support
  1347. */
  1348. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
  1349. /* since ATAPI may use commands with not 4 bytes alligned length
  1350. * we have our own transfer functions, 2 bytes alligned */
  1351. static void
  1352. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1353. {
  1354. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1355. uchar *dbuf;
  1356. volatile uchar *pbuf_even;
  1357. volatile uchar *pbuf_odd;
  1358. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1359. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1360. while (shorts--) {
  1361. EIEIO;
  1362. *pbuf_even = *dbuf++;
  1363. EIEIO;
  1364. *pbuf_odd = *dbuf++;
  1365. }
  1366. #else
  1367. ushort *dbuf;
  1368. volatile ushort *pbuf;
  1369. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1370. dbuf = (ushort *)sect_buf;
  1371. debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
  1372. while (shorts--) {
  1373. EIEIO;
  1374. *pbuf = *dbuf++;
  1375. }
  1376. #endif
  1377. }
  1378. static void
  1379. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1380. {
  1381. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1382. uchar *dbuf;
  1383. volatile uchar *pbuf_even;
  1384. volatile uchar *pbuf_odd;
  1385. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1386. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1387. while (shorts--) {
  1388. EIEIO;
  1389. *dbuf++ = *pbuf_even;
  1390. EIEIO;
  1391. *dbuf++ = *pbuf_odd;
  1392. }
  1393. #else
  1394. ushort *dbuf;
  1395. volatile ushort *pbuf;
  1396. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1397. dbuf = (ushort *)sect_buf;
  1398. debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
  1399. while (shorts--) {
  1400. EIEIO;
  1401. *dbuf++ = *pbuf;
  1402. }
  1403. #endif
  1404. }
  1405. #else /* ! __PPC__ */
  1406. static void
  1407. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1408. {
  1409. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1410. }
  1411. static void
  1412. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1413. {
  1414. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1415. }
  1416. #endif /* __PPC__ */
  1417. /*
  1418. * Wait until (Status & mask) == res, or timeout (in ms)
  1419. * Return last status
  1420. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  1421. * and then they set their DRQ Bit
  1422. */
  1423. static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
  1424. {
  1425. ulong delay = 10 * t; /* poll every 100 us */
  1426. uchar c;
  1427. c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
  1428. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  1429. /* break if error occurs (doesn't make sense to wait more) */
  1430. if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
  1431. break;
  1432. udelay (100);
  1433. if (delay-- == 0) {
  1434. break;
  1435. }
  1436. }
  1437. return (c);
  1438. }
  1439. /*
  1440. * issue an atapi command
  1441. */
  1442. unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
  1443. {
  1444. unsigned char c,err,mask,res;
  1445. int n;
  1446. ide_led (DEVICE_LED(device), 1); /* LED on */
  1447. /* Select device
  1448. */
  1449. mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
  1450. res = 0;
  1451. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1452. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1453. if ((c & mask) != res) {
  1454. printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
  1455. err=0xFF;
  1456. goto AI_OUT;
  1457. }
  1458. /* write taskfile */
  1459. ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  1460. ide_outb (device, ATA_SECT_CNT, 0);
  1461. ide_outb (device, ATA_SECT_NUM, 0);
  1462. ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
  1463. ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
  1464. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1465. ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
  1466. udelay (50);
  1467. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1468. res = ATA_STAT_DRQ;
  1469. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1470. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  1471. printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
  1472. err=0xFF;
  1473. goto AI_OUT;
  1474. }
  1475. output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
  1476. /* ATAPI Command written wait for completition */
  1477. udelay (5000); /* device must set bsy */
  1478. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1479. /* if no data wait for DRQ = 0 BSY = 0
  1480. * if data wait for DRQ = 1 BSY = 0 */
  1481. res=0;
  1482. if(buflen)
  1483. res = ATA_STAT_DRQ;
  1484. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1485. if ((c & mask) != res ) {
  1486. if (c & ATA_STAT_ERR) {
  1487. err=(ide_inb(device,ATA_ERROR_REG))>>4;
  1488. debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
  1489. } else {
  1490. printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
  1491. err=0xFF;
  1492. }
  1493. goto AI_OUT;
  1494. }
  1495. n=ide_inb(device, ATA_CYL_HIGH);
  1496. n<<=8;
  1497. n+=ide_inb(device, ATA_CYL_LOW);
  1498. if(n>buflen) {
  1499. printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
  1500. err=0xff;
  1501. goto AI_OUT;
  1502. }
  1503. if((n==0)&&(buflen<0)) {
  1504. printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
  1505. err=0xff;
  1506. goto AI_OUT;
  1507. }
  1508. if(n!=buflen) {
  1509. debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
  1510. }
  1511. if(n!=0) { /* data transfer */
  1512. debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
  1513. /* we transfer shorts */
  1514. n>>=1;
  1515. /* ok now decide if it is an in or output */
  1516. if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
  1517. debug ("Write to device\n");
  1518. output_data_shorts(device,(unsigned short *)buffer,n);
  1519. } else {
  1520. debug ("Read from device @ %p shorts %d\n",buffer,n);
  1521. input_data_shorts(device,(unsigned short *)buffer,n);
  1522. }
  1523. }
  1524. udelay(5000); /* seems that some CD ROMs need this... */
  1525. mask = ATA_STAT_BUSY|ATA_STAT_ERR;
  1526. res=0;
  1527. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1528. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1529. err=(ide_inb(device,ATA_ERROR_REG) >> 4);
  1530. debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
  1531. } else {
  1532. err = 0;
  1533. }
  1534. AI_OUT:
  1535. ide_led (DEVICE_LED(device), 0); /* LED off */
  1536. return (err);
  1537. }
  1538. /*
  1539. * sending the command to atapi_issue. If an status other than good
  1540. * returns, an request_sense will be issued
  1541. */
  1542. #define ATAPI_DRIVE_NOT_READY 100
  1543. #define ATAPI_UNIT_ATTN 10
  1544. unsigned char atapi_issue_autoreq (int device,
  1545. unsigned char* ccb,
  1546. int ccblen,
  1547. unsigned char *buffer,
  1548. int buflen)
  1549. {
  1550. unsigned char sense_data[18],sense_ccb[12];
  1551. unsigned char res,key,asc,ascq;
  1552. int notready,unitattn;
  1553. unitattn=ATAPI_UNIT_ATTN;
  1554. notready=ATAPI_DRIVE_NOT_READY;
  1555. retry:
  1556. res= atapi_issue(device,ccb,ccblen,buffer,buflen);
  1557. if (res==0)
  1558. return (0); /* Ok */
  1559. if (res==0xFF)
  1560. return (0xFF); /* error */
  1561. debug ("(auto_req)atapi_issue returned sense key %X\n",res);
  1562. memset(sense_ccb,0,sizeof(sense_ccb));
  1563. memset(sense_data,0,sizeof(sense_data));
  1564. sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
  1565. sense_ccb[4]=18; /* allocation Length */
  1566. res=atapi_issue(device,sense_ccb,12,sense_data,18);
  1567. key=(sense_data[2]&0xF);
  1568. asc=(sense_data[12]);
  1569. ascq=(sense_data[13]);
  1570. debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
  1571. debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  1572. sense_data[0],
  1573. key,
  1574. asc,
  1575. ascq);
  1576. if((key==0))
  1577. return 0; /* ok device ready */
  1578. if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
  1579. if(unitattn-->0) {
  1580. udelay(200*1000);
  1581. goto retry;
  1582. }
  1583. printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
  1584. goto error;
  1585. }
  1586. if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
  1587. if (notready-->0) {
  1588. udelay(200*1000);
  1589. goto retry;
  1590. }
  1591. printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
  1592. goto error;
  1593. }
  1594. if(asc==0x3a) {
  1595. debug ("Media not present\n");
  1596. goto error;
  1597. }
  1598. printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1599. error:
  1600. debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1601. return (0xFF);
  1602. }
  1603. static void atapi_inquiry(block_dev_desc_t * dev_desc)
  1604. {
  1605. unsigned char ccb[12]; /* Command descriptor block */
  1606. unsigned char iobuf[64]; /* temp buf */
  1607. unsigned char c;
  1608. int device;
  1609. device=dev_desc->dev;
  1610. dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
  1611. dev_desc->block_read=atapi_read;
  1612. memset(ccb,0,sizeof(ccb));
  1613. memset(iobuf,0,sizeof(iobuf));
  1614. ccb[0]=ATAPI_CMD_INQUIRY;
  1615. ccb[4]=40; /* allocation Legnth */
  1616. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
  1617. debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
  1618. if (c!=0)
  1619. return;
  1620. /* copy device ident strings */
  1621. ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
  1622. ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
  1623. ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
  1624. dev_desc->lun=0;
  1625. dev_desc->lba=0;
  1626. dev_desc->blksz=0;
  1627. dev_desc->type=iobuf[0] & 0x1f;
  1628. if ((iobuf[1]&0x80)==0x80)
  1629. dev_desc->removable = 1;
  1630. else
  1631. dev_desc->removable = 0;
  1632. memset(ccb,0,sizeof(ccb));
  1633. memset(iobuf,0,sizeof(iobuf));
  1634. ccb[0]=ATAPI_CMD_START_STOP;
  1635. ccb[4]=0x03; /* start */
  1636. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1637. debug ("ATAPI_CMD_START_STOP returned %x\n",c);
  1638. if (c!=0)
  1639. return;
  1640. memset(ccb,0,sizeof(ccb));
  1641. memset(iobuf,0,sizeof(iobuf));
  1642. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1643. debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
  1644. if (c!=0)
  1645. return;
  1646. memset(ccb,0,sizeof(ccb));
  1647. memset(iobuf,0,sizeof(iobuf));
  1648. ccb[0]=ATAPI_CMD_READ_CAP;
  1649. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
  1650. debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
  1651. if (c!=0)
  1652. return;
  1653. debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  1654. iobuf[0],iobuf[1],iobuf[2],iobuf[3],
  1655. iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
  1656. dev_desc->lba =((unsigned long)iobuf[0]<<24) +
  1657. ((unsigned long)iobuf[1]<<16) +
  1658. ((unsigned long)iobuf[2]<< 8) +
  1659. ((unsigned long)iobuf[3]);
  1660. dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
  1661. ((unsigned long)iobuf[5]<<16) +
  1662. ((unsigned long)iobuf[6]<< 8) +
  1663. ((unsigned long)iobuf[7]);
  1664. #ifdef CONFIG_LBA48
  1665. dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  1666. #endif
  1667. return;
  1668. }
  1669. /*
  1670. * atapi_read:
  1671. * we transfer only one block per command, since the multiple DRQ per
  1672. * command is not yet implemented
  1673. */
  1674. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  1675. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  1676. #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
  1677. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1678. {
  1679. ulong n = 0;
  1680. unsigned char ccb[12]; /* Command descriptor block */
  1681. ulong cnt;
  1682. debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
  1683. device, blknr, blkcnt, (ulong)buffer);
  1684. do {
  1685. if (blkcnt>ATAPI_READ_MAX_BLOCK) {
  1686. cnt=ATAPI_READ_MAX_BLOCK;
  1687. } else {
  1688. cnt=blkcnt;
  1689. }
  1690. ccb[0]=ATAPI_CMD_READ_12;
  1691. ccb[1]=0; /* reserved */
  1692. ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
  1693. ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
  1694. ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
  1695. ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
  1696. ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
  1697. ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
  1698. ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
  1699. ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
  1700. ccb[10]=0; /* reserved */
  1701. ccb[11]=0; /* reserved */
  1702. if (atapi_issue_autoreq(device,ccb,12,
  1703. (unsigned char *)buffer,
  1704. cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
  1705. return (n);
  1706. }
  1707. n+=cnt;
  1708. blkcnt-=cnt;
  1709. blknr+=cnt;
  1710. buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
  1711. } while (blkcnt > 0);
  1712. return (n);
  1713. }
  1714. /* ------------------------------------------------------------------------- */
  1715. #endif /* CONFIG_ATAPI */
  1716. U_BOOT_CMD(
  1717. ide, 5, 1, do_ide,
  1718. "IDE sub-system",
  1719. "reset - reset IDE controller\n"
  1720. "ide info - show available IDE devices\n"
  1721. "ide device [dev] - show or set current device\n"
  1722. "ide part [dev] - print partition table of one or all IDE devices\n"
  1723. "ide read addr blk# cnt\n"
  1724. "ide write addr blk# cnt - read/write `cnt'"
  1725. " blocks starting at block `blk#'\n"
  1726. " to/from memory address `addr'"
  1727. );
  1728. U_BOOT_CMD(
  1729. diskboot, 3, 1, do_diskboot,
  1730. "boot from IDE device",
  1731. "loadAddr dev:part"
  1732. );