tegra2-seaboard.dts 1.1 KB

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  1. /dts-v1/;
  2. /memreserve/ 0x1c000000 0x04000000;
  3. /include/ ARCH_CPU_DTS
  4. / {
  5. model = "NVIDIA Seaboard";
  6. compatible = "nvidia,seaboard", "nvidia,tegra20";
  7. chosen {
  8. bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait";
  9. };
  10. memory {
  11. device_type = "memory";
  12. reg = < 0x00000000 0x40000000 >;
  13. };
  14. /* This is not used in U-Boot, but is expected to be in kernel .dts */
  15. i2c@7000d000 {
  16. pmic@34 {
  17. compatible = "ti,tps6586x";
  18. reg = <0x34>;
  19. clk_32k: clock {
  20. compatible = "fixed-clock";
  21. /*
  22. * leave out for now due to CPP:
  23. * #clock-cells = <0>;
  24. */
  25. clock-frequency = <32768>;
  26. };
  27. };
  28. };
  29. clocks {
  30. osc {
  31. clock-frequency = <12000000>;
  32. };
  33. };
  34. clock@60006000 {
  35. clocks = <&clk_32k &osc>;
  36. };
  37. serial@70006300 {
  38. clock-frequency = < 216000000 >;
  39. };
  40. sdhci@c8000400 {
  41. cd-gpios = <&gpio 69 0>; /* gpio PI5 */
  42. wp-gpios = <&gpio 57 0>; /* gpio PH1 */
  43. power-gpios = <&gpio 70 0>; /* gpio PI6 */
  44. };
  45. sdhci@c8000600 {
  46. support-8bit;
  47. };
  48. usb@c5000000 {
  49. nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
  50. };
  51. };