ds1306.c 14 KB

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  1. /*
  2. * (C) Copyright 2002 SIXNET, dge@sixnetio.com.
  3. *
  4. * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
  5. * Stephan Linz <linz@li-pro.net>
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. /*
  26. * Date & Time support for DS1306 RTC using SPI:
  27. *
  28. * - SXNI855T: it uses its own soft SPI here in this file
  29. * - all other: use the external spi_xfer() function
  30. * (see include/spi.h)
  31. */
  32. #include <common.h>
  33. #include <command.h>
  34. #include <rtc.h>
  35. #include <spi.h>
  36. #if defined(CONFIG_RTC_DS1306) && (CONFIG_COMMANDS & CFG_CMD_DATE)
  37. #define RTC_SECONDS 0x00
  38. #define RTC_MINUTES 0x01
  39. #define RTC_HOURS 0x02
  40. #define RTC_DAY_OF_WEEK 0x03
  41. #define RTC_DATE_OF_MONTH 0x04
  42. #define RTC_MONTH 0x05
  43. #define RTC_YEAR 0x06
  44. #define RTC_SECONDS_ALARM0 0x07
  45. #define RTC_MINUTES_ALARM0 0x08
  46. #define RTC_HOURS_ALARM0 0x09
  47. #define RTC_DAY_OF_WEEK_ALARM0 0x0a
  48. #define RTC_SECONDS_ALARM1 0x0b
  49. #define RTC_MINUTES_ALARM1 0x0c
  50. #define RTC_HOURS_ALARM1 0x0d
  51. #define RTC_DAY_OF_WEEK_ALARM1 0x0e
  52. #define RTC_CONTROL 0x0f
  53. #define RTC_STATUS 0x10
  54. #define RTC_TRICKLE_CHARGER 0x11
  55. #define RTC_USER_RAM_BASE 0x20
  56. /*
  57. * External table of chip select functions (see the appropriate board
  58. * support for the actual definition of the table).
  59. */
  60. extern spi_chipsel_type spi_chipsel[];
  61. extern int spi_chipsel_cnt;
  62. static unsigned int bin2bcd (unsigned int n);
  63. static unsigned char bcd2bin (unsigned char c);
  64. static unsigned char rtc_read (unsigned char reg);
  65. static void rtc_write (unsigned char reg, unsigned char val);
  66. /* ************************************************************************* */
  67. #ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */
  68. static void soft_spi_send (unsigned char n);
  69. static unsigned char soft_spi_read (void);
  70. static void init_spi (void);
  71. /*-----------------------------------------------------------------------
  72. * Definitions
  73. */
  74. #define PB_SPISCK 0x00000002 /* PB 30 */
  75. #define PB_SPIMOSI 0x00000004 /* PB 29 */
  76. #define PB_SPIMISO 0x00000008 /* PB 28 */
  77. #define PB_SPI_CE 0x00010000 /* PB 15 */
  78. /* ------------------------------------------------------------------------- */
  79. /* read clock time from DS1306 and return it in *tmp */
  80. void rtc_get (struct rtc_time *tmp)
  81. {
  82. volatile immap_t *immap = (immap_t *) CFG_IMMR;
  83. unsigned char spi_byte; /* Data Byte */
  84. init_spi (); /* set port B for software SPI */
  85. /* Now we can enable the DS1306 RTC */
  86. immap->im_cpm.cp_pbdat |= PB_SPI_CE;
  87. udelay (10);
  88. /* Shift out the address (0) of the time in the Clock Chip */
  89. soft_spi_send (0);
  90. /* Put the clock readings into the rtc_time structure */
  91. tmp->tm_sec = bcd2bin (soft_spi_read ()); /* Read seconds */
  92. tmp->tm_min = bcd2bin (soft_spi_read ()); /* Read minutes */
  93. /* Hours are trickier */
  94. spi_byte = soft_spi_read (); /* Read Hours into temporary value */
  95. if (spi_byte & 0x40) {
  96. /* 12 hour mode bit is set (time is in 1-12 format) */
  97. if (spi_byte & 0x20) {
  98. /* since PM we add 11 to get 0-23 for hours */
  99. tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11;
  100. } else {
  101. /* since AM we subtract 1 to get 0-23 for hours */
  102. tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1;
  103. }
  104. } else {
  105. /* Otherwise, 0-23 hour format */
  106. tmp->tm_hour = (bcd2bin (spi_byte & 0x3F));
  107. }
  108. soft_spi_read (); /* Read and discard Day of week */
  109. tmp->tm_mday = bcd2bin (soft_spi_read ()); /* Read Day of the Month */
  110. tmp->tm_mon = bcd2bin (soft_spi_read ()); /* Read Month */
  111. /* Read Year and convert to this century */
  112. tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000;
  113. /* Now we can disable the DS1306 RTC */
  114. immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
  115. udelay (10);
  116. GregorianDay (tmp); /* Determine the day of week */
  117. debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  118. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  119. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  120. }
  121. /* ------------------------------------------------------------------------- */
  122. /* set clock time in DS1306 RTC and in MPC8xx RTC */
  123. void rtc_set (struct rtc_time *tmp)
  124. {
  125. volatile immap_t *immap = (immap_t *) CFG_IMMR;
  126. init_spi (); /* set port B for software SPI */
  127. /* Now we can enable the DS1306 RTC */
  128. immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
  129. udelay (10);
  130. /* First disable write protect in the clock chip control register */
  131. soft_spi_send (0x8F); /* send address of the control register */
  132. soft_spi_send (0x00); /* send control register contents */
  133. /* Now disable the DS1306 to terminate the write */
  134. immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
  135. udelay (10);
  136. /* Now enable the DS1306 to initiate a new write */
  137. immap->im_cpm.cp_pbdat |= PB_SPI_CE;
  138. udelay (10);
  139. /* Next, send the address of the clock time write registers */
  140. soft_spi_send (0x80); /* send address of the first time register */
  141. /* Use Burst Mode to send all of the time data to the clock */
  142. bin2bcd (tmp->tm_sec);
  143. soft_spi_send (bin2bcd (tmp->tm_sec)); /* Send Seconds */
  144. soft_spi_send (bin2bcd (tmp->tm_min)); /* Send Minutes */
  145. soft_spi_send (bin2bcd (tmp->tm_hour)); /* Send Hour */
  146. soft_spi_send (bin2bcd (tmp->tm_wday)); /* Send Day of the Week */
  147. soft_spi_send (bin2bcd (tmp->tm_mday)); /* Send Day of Month */
  148. soft_spi_send (bin2bcd (tmp->tm_mon)); /* Send Month */
  149. soft_spi_send (bin2bcd (tmp->tm_year - 2000)); /* Send Year */
  150. /* Now we can disable the Clock chip to terminate the burst write */
  151. immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
  152. udelay (10);
  153. /* Now we can enable the Clock chip to initiate a new write */
  154. immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
  155. udelay (10);
  156. /* First we Enable write protect in the clock chip control register */
  157. soft_spi_send (0x8F); /* send address of the control register */
  158. soft_spi_send (0x40); /* send out Control Register contents */
  159. /* Now disable the DS1306 */
  160. immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
  161. udelay (10);
  162. /* Set standard MPC8xx clock to the same time so Linux will
  163. * see the time even if it doesn't have a DS1306 clock driver.
  164. * This helps with experimenting with standard kernels.
  165. */
  166. {
  167. ulong tim;
  168. tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
  169. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  170. immap->im_sitk.sitk_rtck = KAPWR_KEY;
  171. immap->im_sit.sit_rtc = tim;
  172. }
  173. debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  174. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  175. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  176. }
  177. /* ------------------------------------------------------------------------- */
  178. /* Initialize Port B for software SPI */
  179. static void init_spi (void)
  180. {
  181. volatile immap_t *immap = (immap_t *) CFG_IMMR;
  182. /* Force output pins to begin at logic 0 */
  183. immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK);
  184. /* Set these 3 signals as outputs */
  185. immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK);
  186. immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */
  187. udelay (10);
  188. }
  189. /* ------------------------------------------------------------------------- */
  190. /* NOTE: soft_spi_send() assumes that the I/O lines are configured already */
  191. static void soft_spi_send (unsigned char n)
  192. {
  193. volatile immap_t *immap = (immap_t *) CFG_IMMR;
  194. unsigned char bitpos; /* bit position to receive */
  195. unsigned char i; /* Loop Control */
  196. /* bit position to send, start with most significant bit */
  197. bitpos = 0x80;
  198. /* Send 8 bits to software SPI */
  199. for (i = 0; i < 8; i++) { /* Loop for 8 bits */
  200. immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
  201. if (n & bitpos)
  202. immap->im_cpm.cp_pbdat |= PB_SPIMOSI; /* Set MOSI to 1 */
  203. else
  204. immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */
  205. udelay (10);
  206. immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
  207. udelay (10);
  208. bitpos >>= 1; /* Shift for next bit position */
  209. }
  210. }
  211. /* ------------------------------------------------------------------------- */
  212. /* NOTE: soft_spi_read() assumes that the I/O lines are configured already */
  213. static unsigned char soft_spi_read (void)
  214. {
  215. volatile immap_t *immap = (immap_t *) CFG_IMMR;
  216. unsigned char spi_byte = 0; /* Return value, assume success */
  217. unsigned char bitpos; /* bit position to receive */
  218. unsigned char i; /* Loop Control */
  219. /* bit position to receive, start with most significant bit */
  220. bitpos = 0x80;
  221. /* Read 8 bits here */
  222. for (i = 0; i < 8; i++) { /* Do 8 bits in loop */
  223. immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
  224. udelay (10);
  225. if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */
  226. spi_byte |= bitpos; /* Set data accordingly */
  227. immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
  228. udelay (10);
  229. bitpos >>= 1; /* Shift for next bit position */
  230. }
  231. return spi_byte; /* Return the byte read */
  232. }
  233. /* ------------------------------------------------------------------------- */
  234. void rtc_reset (void)
  235. {
  236. return; /* nothing to do */
  237. }
  238. #else /* not CONFIG_SXNI855T */
  239. /* ************************************************************************* */
  240. /* read clock time from DS1306 and return it in *tmp */
  241. void rtc_get (struct rtc_time *tmp)
  242. {
  243. unsigned char sec, min, hour, mday, wday, mon, year;
  244. sec = rtc_read (RTC_SECONDS);
  245. min = rtc_read (RTC_MINUTES);
  246. hour = rtc_read (RTC_HOURS);
  247. mday = rtc_read (RTC_DATE_OF_MONTH);
  248. wday = rtc_read (RTC_DAY_OF_WEEK);
  249. mon = rtc_read (RTC_MONTH);
  250. year = rtc_read (RTC_YEAR);
  251. debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
  252. "hr: %02x min: %02x sec: %02x\n",
  253. year, mon, mday, wday, hour, min, sec);
  254. debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n",
  255. rtc_read (RTC_DAY_OF_WEEK_ALARM0),
  256. rtc_read (RTC_HOURS_ALARM0),
  257. rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0));
  258. debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n",
  259. rtc_read (RTC_DAY_OF_WEEK_ALARM1),
  260. rtc_read (RTC_HOURS_ALARM1),
  261. rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1));
  262. tmp->tm_sec = bcd2bin (sec & 0x7F); /* convert Seconds */
  263. tmp->tm_min = bcd2bin (min & 0x7F); /* convert Minutes */
  264. /* convert Hours */
  265. tmp->tm_hour = (hour & 0x40)
  266. ? ((hour & 0x20) /* 12 hour mode */
  267. ? bcd2bin (hour & 0x1F) + 11 /* PM */
  268. : bcd2bin (hour & 0x1F) - 1 /* AM */
  269. )
  270. : bcd2bin (hour & 0x3F); /* 24 hour mode */
  271. tmp->tm_mday = bcd2bin (mday & 0x3F); /* convert Day of the Month */
  272. tmp->tm_mon = bcd2bin (mon & 0x1F); /* convert Month */
  273. tmp->tm_year = bcd2bin (year) + 2000; /* convert Year */
  274. tmp->tm_wday = bcd2bin (wday & 0x07) - 1; /* convert Day of the Week */
  275. tmp->tm_yday = 0;
  276. tmp->tm_isdst = 0;
  277. debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  278. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  279. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  280. }
  281. /* ------------------------------------------------------------------------- */
  282. /* set clock time from *tmp in DS1306 RTC */
  283. void rtc_set (struct rtc_time *tmp)
  284. {
  285. debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  286. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  287. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  288. rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
  289. rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
  290. rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
  291. rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
  292. rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
  293. rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
  294. rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
  295. }
  296. /* ------------------------------------------------------------------------- */
  297. /* reset the DS1306 */
  298. void rtc_reset (void)
  299. {
  300. /* clear the control register */
  301. rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */
  302. rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */
  303. /* reset all alarms */
  304. rtc_write (RTC_SECONDS_ALARM0, 0x00);
  305. rtc_write (RTC_SECONDS_ALARM1, 0x00);
  306. rtc_write (RTC_MINUTES_ALARM0, 0x00);
  307. rtc_write (RTC_MINUTES_ALARM1, 0x00);
  308. rtc_write (RTC_HOURS_ALARM0, 0x00);
  309. rtc_write (RTC_HOURS_ALARM1, 0x00);
  310. rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
  311. rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);
  312. }
  313. /* ------------------------------------------------------------------------- */
  314. static unsigned char rtc_read (unsigned char reg)
  315. {
  316. unsigned char dout[2]; /* SPI Output Data Bytes */
  317. unsigned char din[2]; /* SPI Input Data Bytes */
  318. dout[0] = reg;
  319. if (spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din) != 0) {
  320. return 0;
  321. } else {
  322. return din[1];
  323. }
  324. }
  325. /* ------------------------------------------------------------------------- */
  326. static void rtc_write (unsigned char reg, unsigned char val)
  327. {
  328. unsigned char dout[2]; /* SPI Output Data Bytes */
  329. unsigned char din[2]; /* SPI Input Data Bytes */
  330. dout[0] = 0x80 | reg;
  331. dout[1] = val;
  332. spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din);
  333. }
  334. #endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */
  335. /* ------------------------------------------------------------------------- */
  336. static unsigned char bcd2bin (unsigned char n)
  337. {
  338. return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
  339. }
  340. /* ------------------------------------------------------------------------- */
  341. static unsigned int bin2bcd (unsigned int n)
  342. {
  343. return (((n / 10) << 4) | (n % 10));
  344. }
  345. /* ------------------------------------------------------------------------- */
  346. #endif