README.sbc8560 2.0 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253
  1. The port was tested on Wind River System Sbc8560 board <www.windriver.com>.
  2. U-Boot was installed on the flash memory of the CPU card (no the SODIMM).
  3. NOTE: Please configure uboot compile to the proper PCI frequency and
  4. setup the appropriate DIP switch settings.
  5. SBC8560 board:
  6. Make sure boards switches are set to their appropriate conditions.
  7. Refer to the Engineering Reference Guide ERG-00300-002. Of particular
  8. importance are: 1)Tthe settings for JP4 (JP4 1-3 and 2-4), which
  9. select the on-board FLASH device (Intel 28F128Jx); 2) The settings
  10. for the Clock SW9 (33 MHz or 66 MHz).
  11. Note: SW9 Settings: 66 MHz
  12. 4:1 ratio CCB clocks:SYSCLK
  13. 3:1 ration e500 Core:CCB
  14. pos1 - on, pos2 - on, pos3 - off, pos4 - on, pos5 - off, pos6 - on
  15. Note: SW9 Settings: 33 MHz
  16. 8:1 ratio CCB clocks:SYSCLK
  17. 3:1 ration e500 Core:CCB
  18. pos1 - on, pos2 - on, pos3 - on, pos4 - off, pos5 - off, pos6 - on
  19. Flashing the FLASH device with the "Wind River ICE":
  20. 1) Properly connect and configure the Wind River ICE to the
  21. target JTAG port. This includes running the SBC8560 register script.
  22. Make sure target memory can be read and written.
  23. 2) Build the u-boot image:
  24. make distclean
  25. make SBC8560_66_config or SBC8560_33_config
  26. make CROSS_COMPILE=.../ELDK3.0/ppc_8xx-/ all
  27. Note: reference is made to the ELDK3.0 compiler but any 85xx cross-compiler
  28. should suffice.
  29. 3) Convert the uboot (.elf) file to a uboot.bin file (using visionClick converter).
  30. The bin file should be converted from fffc0000 to ffffffff
  31. 4) Setup the Flash Utility (tools menu) for:
  32. Determine the clock speed of the PCI bus and set SW9 accordingly
  33. Note: the speed of the PCI bus defaults to the slowest PCI card
  34. PlayBack the "default" register file for the SBC8560
  35. Select the uboot.bin file with zero bias
  36. Select the initialize Target prior to programming
  37. Select the V28F640Jx (8192 x 8) 1 device FLASH Algorithm
  38. Select the erase base address from FFFC0000 to FFFFFFFF
  39. Select the start address from 0 with size of 4000
  40. 5) Erase and Program