i2c.c 8.0 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #ifdef CONFIG_HARD_I2C
  25. #include <mpc5xxx.h>
  26. #include <i2c.h>
  27. #if (CFG_I2C_MODULE == 2)
  28. #define I2C_BASE MPC5XXX_I2C2
  29. #elif (CFG_I2C_MODULE == 1)
  30. #define I2C_BASE MPC5XXX_I2C1
  31. #else
  32. #error CFG_I2C_MODULE is not properly configured
  33. #endif
  34. #define I2C_TIMEOUT 100
  35. #define I2C_RETRIES 3
  36. struct mpc5xxx_i2c_tap {
  37. int scl2tap;
  38. int tap2tap;
  39. };
  40. static int mpc_reg_in (volatile u32 *reg);
  41. static void mpc_reg_out (volatile u32 *reg, int val, int mask);
  42. static int wait_for_bb (void);
  43. static int wait_for_pin (int *status);
  44. static int do_address (uchar chip, char rdwr_flag);
  45. static int send_bytes (uchar chip, char *buf, int len);
  46. static int receive_bytes (uchar chip, char *buf, int len);
  47. static int mpc_get_fdr (int);
  48. static int mpc_reg_in(volatile u32 *reg)
  49. {
  50. int ret = *reg >> 24;
  51. __asm__ __volatile__ ("eieio");
  52. return ret;
  53. }
  54. static void mpc_reg_out(volatile u32 *reg, int val, int mask)
  55. {
  56. int tmp;
  57. if (!mask) {
  58. *reg = val << 24;
  59. } else {
  60. tmp = mpc_reg_in(reg);
  61. *reg = ((tmp & ~mask) | (val & mask)) << 24;
  62. }
  63. __asm__ __volatile__ ("eieio");
  64. return;
  65. }
  66. static int wait_for_bb(void)
  67. {
  68. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  69. int timeout = I2C_TIMEOUT;
  70. int status;
  71. status = mpc_reg_in(&regs->msr);
  72. while (timeout-- && (status & I2C_BB)) {
  73. #if 1
  74. volatile int temp;
  75. mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
  76. temp = mpc_reg_in(&regs->mdr);
  77. mpc_reg_out(&regs->mcr, 0, I2C_STA);
  78. mpc_reg_out(&regs->mcr, 0, 0);
  79. mpc_reg_out(&regs->mcr, I2C_EN, 0);
  80. #endif
  81. udelay(1000);
  82. status = mpc_reg_in(&regs->msr);
  83. }
  84. return (status & I2C_BB);
  85. }
  86. static int wait_for_pin(int *status)
  87. {
  88. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  89. int timeout = I2C_TIMEOUT;
  90. *status = mpc_reg_in(&regs->msr);
  91. while (timeout-- && !(*status & I2C_IF)) {
  92. udelay(1000);
  93. *status = mpc_reg_in(&regs->msr);
  94. }
  95. if (!(*status & I2C_IF)) {
  96. return -1;
  97. }
  98. mpc_reg_out(&regs->msr, 0, I2C_IF);
  99. return 0;
  100. }
  101. static int do_address(uchar chip, char rdwr_flag)
  102. {
  103. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  104. int status;
  105. chip <<= 1;
  106. if (rdwr_flag) {
  107. chip |= 1;
  108. }
  109. mpc_reg_out(&regs->mcr, I2C_TX, I2C_TX);
  110. mpc_reg_out(&regs->mdr, chip, 0);
  111. if (wait_for_pin(&status)) {
  112. return -2;
  113. }
  114. if (status & I2C_RXAK) {
  115. return -3;
  116. }
  117. return 0;
  118. }
  119. static int send_bytes(uchar chip, char *buf, int len)
  120. {
  121. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  122. int wrcount;
  123. int status;
  124. for (wrcount = 0; wrcount < len; ++wrcount) {
  125. mpc_reg_out(&regs->mdr, buf[wrcount], 0);
  126. if (wait_for_pin(&status)) {
  127. break;
  128. }
  129. if (status & I2C_RXAK) {
  130. break;
  131. }
  132. }
  133. return !(wrcount == len);
  134. }
  135. static int receive_bytes(uchar chip, char *buf, int len)
  136. {
  137. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  138. int dummy = 1;
  139. int rdcount = 0;
  140. int status;
  141. int i;
  142. mpc_reg_out(&regs->mcr, 0, I2C_TX);
  143. for (i = 0; i < len; ++i) {
  144. buf[rdcount] = mpc_reg_in(&regs->mdr);
  145. if (dummy) {
  146. dummy = 0;
  147. } else {
  148. rdcount++;
  149. }
  150. if (wait_for_pin(&status)) {
  151. return -4;
  152. }
  153. }
  154. mpc_reg_out(&regs->mcr, I2C_TXAK, I2C_TXAK);
  155. buf[rdcount++] = mpc_reg_in(&regs->mdr);
  156. if (wait_for_pin(&status)) {
  157. return -5;
  158. }
  159. mpc_reg_out(&regs->mcr, 0, I2C_TXAK);
  160. return 0;
  161. }
  162. /**************** I2C API ****************/
  163. void i2c_init(int speed, int saddr)
  164. {
  165. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  166. mpc_reg_out(&regs->mcr, 0, 0);
  167. mpc_reg_out(&regs->madr, saddr << 1, 0);
  168. /* Set clock
  169. */
  170. mpc_reg_out(&regs->mfdr, mpc_get_fdr(speed), 0);
  171. /* Enable module
  172. */
  173. mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
  174. mpc_reg_out(&regs->msr, 0, I2C_IF);
  175. return;
  176. }
  177. static int mpc_get_fdr(int speed)
  178. {
  179. DECLARE_GLOBAL_DATA_PTR;
  180. static int fdr = -1;
  181. if (fdr == -1) {
  182. ulong best_speed = 0;
  183. ulong divider;
  184. ulong ipb, scl;
  185. ulong bestmatch = 0xffffffffUL;
  186. int best_i = 0, best_j = 0, i, j;
  187. int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
  188. struct mpc5xxx_i2c_tap scltap[] = {
  189. {4, 1},
  190. {4, 2},
  191. {6, 4},
  192. {6, 8},
  193. {14, 16},
  194. {30, 32},
  195. {62, 64},
  196. {126, 128}
  197. };
  198. ipb = gd->ipb_clk;
  199. for (i = 7; i >= 0; i--) {
  200. for (j = 7; j >= 0; j--) {
  201. scl = 2 * (scltap[j].scl2tap +
  202. (SCL_Tap[i] - 1) * scltap[j].tap2tap + 2);
  203. if (ipb <= speed*scl) {
  204. if ((speed*scl - ipb) < bestmatch) {
  205. bestmatch = speed*scl - ipb;
  206. best_i = i;
  207. best_j = j;
  208. best_speed = ipb/scl;
  209. }
  210. }
  211. }
  212. }
  213. divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
  214. if (gd->flags & GD_FLG_RELOC) {
  215. fdr = divider;
  216. } else {
  217. printf("%ld kHz, ", best_speed / 1000);
  218. return divider;
  219. }
  220. }
  221. return fdr;
  222. }
  223. int i2c_probe(uchar chip)
  224. {
  225. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  226. int i;
  227. for (i = 0; i < I2C_RETRIES; i++) {
  228. mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
  229. if (! do_address(chip, 0)) {
  230. mpc_reg_out(&regs->mcr, 0, I2C_STA);
  231. udelay(500);
  232. break;
  233. }
  234. mpc_reg_out(&regs->mcr, 0, I2C_STA);
  235. udelay(500);
  236. }
  237. return (i == I2C_RETRIES);
  238. }
  239. int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
  240. {
  241. char xaddr[4];
  242. struct mpc5xxx_i2c * regs = (struct mpc5xxx_i2c *)I2C_BASE;
  243. int ret = -1;
  244. xaddr[0] = (addr >> 24) & 0xFF;
  245. xaddr[1] = (addr >> 16) & 0xFF;
  246. xaddr[2] = (addr >> 8) & 0xFF;
  247. xaddr[3] = addr & 0xFF;
  248. if (wait_for_bb()) {
  249. printf("i2c_read: bus is busy\n");
  250. goto Done;
  251. }
  252. mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
  253. if (do_address(chip, 0)) {
  254. printf("i2c_read: failed to address chip\n");
  255. goto Done;
  256. }
  257. if (send_bytes(chip, &xaddr[4-alen], alen)) {
  258. printf("i2c_read: send_bytes failed\n");
  259. goto Done;
  260. }
  261. mpc_reg_out(&regs->mcr, I2C_RSTA, I2C_RSTA);
  262. if (do_address(chip, 1)) {
  263. printf("i2c_read: failed to address chip\n");
  264. goto Done;
  265. }
  266. if (receive_bytes(chip, (char *)buf, len)) {
  267. printf("i2c_read: receive_bytes failed\n");
  268. goto Done;
  269. }
  270. ret = 0;
  271. Done:
  272. mpc_reg_out(&regs->mcr, 0, I2C_STA);
  273. return ret;
  274. }
  275. int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
  276. {
  277. char xaddr[4];
  278. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  279. int ret = -1;
  280. xaddr[0] = (addr >> 24) & 0xFF;
  281. xaddr[1] = (addr >> 16) & 0xFF;
  282. xaddr[2] = (addr >> 8) & 0xFF;
  283. xaddr[3] = addr & 0xFF;
  284. if (wait_for_bb()) {
  285. printf("i2c_write: bus is busy\n");
  286. goto Done;
  287. }
  288. mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
  289. if (do_address(chip, 0)) {
  290. printf("i2c_write: failed to address chip\n");
  291. goto Done;
  292. }
  293. if (send_bytes(chip, &xaddr[4-alen], alen)) {
  294. printf("i2c_write: send_bytes failed\n");
  295. goto Done;
  296. }
  297. if (send_bytes(chip, (char *)buf, len)) {
  298. printf("i2c_write: send_bytes failed\n");
  299. goto Done;
  300. }
  301. ret = 0;
  302. Done:
  303. mpc_reg_out(&regs->mcr, 0, I2C_STA);
  304. return ret;
  305. }
  306. uchar i2c_reg_read(uchar chip, uchar reg)
  307. {
  308. uchar buf;
  309. i2c_read(chip, reg, 1, &buf, 1);
  310. return buf;
  311. }
  312. void i2c_reg_write(uchar chip, uchar reg, uchar val)
  313. {
  314. i2c_write(chip, reg, 1, &val, 1);
  315. return;
  316. }
  317. #endif /* CONFIG_HARD_I2C */