interrupts.c 8.2 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Texas Instruments <www.ti.com>
  4. *
  5. * (C) Copyright 2002
  6. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  7. * Marius Groeger <mgroeger@sysgo.de>
  8. *
  9. * (C) Copyright 2002
  10. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  11. * Alex Zuepke <azu@sysgo.de>
  12. *
  13. * (C) Copyright 2002-2004
  14. * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  15. *
  16. * (C) Copyright 2004
  17. * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
  18. *
  19. * See file CREDITS for list of people who contributed to this
  20. * project.
  21. *
  22. * This program is free software; you can redistribute it and/or
  23. * modify it under the terms of the GNU General Public License as
  24. * published by the Free Software Foundation; either version 2 of
  25. * the License, or (at your option) any later version.
  26. *
  27. * This program is distributed in the hope that it will be useful,
  28. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  29. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  30. * GNU General Public License for more details.
  31. *
  32. * You should have received a copy of the GNU General Public License
  33. * along with this program; if not, write to the Free Software
  34. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  35. * MA 02111-1307 USA
  36. */
  37. #include <common.h>
  38. #include <arm926ejs.h>
  39. #include <asm/proc-armv/ptrace.h>
  40. #define TIMER_LOAD_VAL 0xffffffff
  41. /* macro to read the 32 bit timer */
  42. #ifdef CONFIG_OMAP
  43. #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+8))
  44. #endif
  45. #ifdef CONFIG_VERSATILE
  46. #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
  47. #endif
  48. #ifdef CONFIG_USE_IRQ
  49. /* enable IRQ interrupts */
  50. void enable_interrupts (void)
  51. {
  52. unsigned long temp;
  53. __asm__ __volatile__("mrs %0, cpsr\n"
  54. "bic %0, %0, #0x80\n"
  55. "msr cpsr_c, %0"
  56. : "=r" (temp)
  57. :
  58. : "memory");
  59. }
  60. /*
  61. * disable IRQ/FIQ interrupts
  62. * returns true if interrupts had been enabled before we disabled them
  63. */
  64. int disable_interrupts (void)
  65. {
  66. unsigned long old,temp;
  67. __asm__ __volatile__("mrs %0, cpsr\n"
  68. "orr %1, %0, #0xc0\n"
  69. "msr cpsr_c, %1"
  70. : "=r" (old), "=r" (temp)
  71. :
  72. : "memory");
  73. return (old & 0x80) == 0;
  74. }
  75. #else
  76. void enable_interrupts (void)
  77. {
  78. return;
  79. }
  80. int disable_interrupts (void)
  81. {
  82. return 0;
  83. }
  84. #endif
  85. void bad_mode (void)
  86. {
  87. panic ("Resetting CPU ...\n");
  88. reset_cpu (0);
  89. }
  90. void show_regs (struct pt_regs *regs)
  91. {
  92. unsigned long flags;
  93. const char *processor_modes[] = {
  94. "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
  95. "UK4_26", "UK5_26", "UK6_26", "UK7_26",
  96. "UK8_26", "UK9_26", "UK10_26", "UK11_26",
  97. "UK12_26", "UK13_26", "UK14_26", "UK15_26",
  98. "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
  99. "UK4_32", "UK5_32", "UK6_32", "ABT_32",
  100. "UK8_32", "UK9_32", "UK10_32", "UND_32",
  101. "UK12_32", "UK13_32", "UK14_32", "SYS_32",
  102. };
  103. flags = condition_codes (regs);
  104. printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
  105. "sp : %08lx ip : %08lx fp : %08lx\n",
  106. instruction_pointer (regs),
  107. regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
  108. printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
  109. regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
  110. printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
  111. regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
  112. printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
  113. regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
  114. printf ("Flags: %c%c%c%c",
  115. flags & CC_N_BIT ? 'N' : 'n',
  116. flags & CC_Z_BIT ? 'Z' : 'z',
  117. flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
  118. printf (" IRQs %s FIQs %s Mode %s%s\n",
  119. interrupts_enabled (regs) ? "on" : "off",
  120. fast_interrupts_enabled (regs) ? "on" : "off",
  121. processor_modes[processor_mode (regs)],
  122. thumb_mode (regs) ? " (T)" : "");
  123. }
  124. void do_undefined_instruction (struct pt_regs *pt_regs)
  125. {
  126. printf ("undefined instruction\n");
  127. show_regs (pt_regs);
  128. bad_mode ();
  129. }
  130. void do_software_interrupt (struct pt_regs *pt_regs)
  131. {
  132. printf ("software interrupt\n");
  133. show_regs (pt_regs);
  134. bad_mode ();
  135. }
  136. void do_prefetch_abort (struct pt_regs *pt_regs)
  137. {
  138. printf ("prefetch abort\n");
  139. show_regs (pt_regs);
  140. bad_mode ();
  141. }
  142. void do_data_abort (struct pt_regs *pt_regs)
  143. {
  144. printf ("data abort\n");
  145. show_regs (pt_regs);
  146. bad_mode ();
  147. }
  148. void do_not_used (struct pt_regs *pt_regs)
  149. {
  150. printf ("not used\n");
  151. show_regs (pt_regs);
  152. bad_mode ();
  153. }
  154. void do_fiq (struct pt_regs *pt_regs)
  155. {
  156. printf ("fast interrupt request\n");
  157. show_regs (pt_regs);
  158. bad_mode ();
  159. }
  160. void do_irq (struct pt_regs *pt_regs)
  161. {
  162. printf ("interrupt request\n");
  163. show_regs (pt_regs);
  164. bad_mode ();
  165. }
  166. #ifdef CONFIG_INTEGRATOR
  167. /* Timer functionality supplied by Integrator board (AP or CP) */
  168. #else
  169. static ulong timestamp;
  170. static ulong lastdec;
  171. /* nothing really to do with interrupts, just starts up a counter. */
  172. int interrupt_init (void)
  173. {
  174. #ifdef CONFIG_OMAP
  175. int32_t val;
  176. /* Start the decrementer ticking down from 0xffffffff */
  177. *((int32_t *) (CFG_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL;
  178. val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CFG_PVT << MPUTIM_PTV_BIT);
  179. *((int32_t *) (CFG_TIMERBASE + CNTL_TIMER)) = val;
  180. #endif /* CONFIG_OMAP */
  181. #ifdef CONFIG_VERSATILE
  182. *(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD; /* TimerLoad */
  183. *(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD; /* TimerValue */
  184. *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
  185. #endif /* CONFIG_VERSATILE */
  186. /* init the timestamp and lastdec value */
  187. reset_timer_masked();
  188. return (0);
  189. }
  190. /*
  191. * timer without interrupts
  192. */
  193. void reset_timer (void)
  194. {
  195. reset_timer_masked ();
  196. }
  197. ulong get_timer (ulong base)
  198. {
  199. return get_timer_masked () - base;
  200. }
  201. void set_timer (ulong t)
  202. {
  203. timestamp = t;
  204. }
  205. /* delay x useconds AND perserve advance timstamp value */
  206. void udelay (unsigned long usec)
  207. {
  208. ulong tmo, tmp;
  209. if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
  210. tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
  211. tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
  212. tmo /= 1000; /* finish normalize. */
  213. }else{ /* else small number, don't kill it prior to HZ multiply */
  214. tmo = usec * CFG_HZ;
  215. tmo /= (1000*1000);
  216. }
  217. tmp = get_timer (0); /* get current timestamp */
  218. if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll time stamp */
  219. reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */
  220. else
  221. tmo += tmp; /* else, set advancing stamp wake up time */
  222. while (get_timer_masked () < tmo)/* loop till event */
  223. /*NOP*/;
  224. }
  225. void reset_timer_masked (void)
  226. {
  227. /* reset time */
  228. lastdec = READ_TIMER; /* capure current decrementer value time */
  229. timestamp = 0; /* start "advancing" time stamp from 0 */
  230. }
  231. ulong get_timer_masked (void)
  232. {
  233. ulong now = READ_TIMER; /* current tick value */
  234. if (lastdec >= now) { /* normal mode (non roll) */
  235. /* normal mode */
  236. timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
  237. } else { /* we have overflow of the count down timer */
  238. /* nts = ts + ld + (TLV - now)
  239. * ts=old stamp, ld=time that passed before passing through -1
  240. * (TLV-now) amount of time after passing though -1
  241. * nts = new "advancing time stamp"...it could also roll and cause problems.
  242. */
  243. timestamp += lastdec + TIMER_LOAD_VAL - now;
  244. }
  245. lastdec = now;
  246. return timestamp;
  247. }
  248. /* waits specified delay value and resets timestamp */
  249. void udelay_masked (unsigned long usec)
  250. {
  251. ulong tmo;
  252. ulong endtime;
  253. signed long diff;
  254. if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
  255. tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
  256. tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
  257. tmo /= 1000; /* finish normalize. */
  258. } else { /* else small number, don't kill it prior to HZ multiply */
  259. tmo = usec * CFG_HZ;
  260. tmo /= (1000*1000);
  261. }
  262. endtime = get_timer_masked () + tmo;
  263. do {
  264. ulong now = get_timer_masked ();
  265. diff = endtime - now;
  266. } while (diff >= 0);
  267. }
  268. /*
  269. * This function is derived from PowerPC code (read timebase as long long).
  270. * On ARM it just returns the timer value.
  271. */
  272. unsigned long long get_ticks(void)
  273. {
  274. return get_timer(0);
  275. }
  276. /*
  277. * This function is derived from PowerPC code (timebase clock frequency).
  278. * On ARM it returns the number of timer ticks per second.
  279. */
  280. ulong get_tbclk (void)
  281. {
  282. ulong tbclk;
  283. tbclk = CFG_HZ;
  284. return tbclk;
  285. }
  286. #endif /* CONFIG_INTEGRATOR */