cpc45.c 3.3 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <mpc824x.h>
  25. #include <asm/processor.h>
  26. #include <pci.h>
  27. int sysControlDisplay(int digit, uchar ascii_code);
  28. extern void Plx9030Init(void);
  29. /* We have to clear the initial data area here. Couldn't have done it
  30. * earlier because DRAM had not been initialized.
  31. */
  32. int board_pre_init(void)
  33. {
  34. /* enable DUAL UART Mode on CPC45 */
  35. *(uchar*)DUART_DCR |= 0x1; /* set DCM bit */
  36. return 0;
  37. }
  38. int checkboard(void)
  39. {
  40. /*
  41. char revision = BOARD_REV;
  42. */
  43. ulong busfreq = get_bus_freq(0);
  44. char buf[32];
  45. printf("CPC45 ");
  46. /*
  47. printf("Revision %d ", revision);
  48. */
  49. printf("Local Bus at %s MHz\n", strmhz(buf, busfreq));
  50. return 0;
  51. }
  52. long int initdram(int board_type)
  53. {
  54. long size;
  55. long new_bank0_end;
  56. long mear1;
  57. long emear1;
  58. size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
  59. new_bank0_end = size - 1;
  60. mear1 = mpc824x_mpc107_getreg(MEAR1);
  61. emear1 = mpc824x_mpc107_getreg(EMEAR1);
  62. mear1 = (mear1 & 0xFFFFFF00) |
  63. ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
  64. emear1 = (emear1 & 0xFFFFFF00) |
  65. ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
  66. mpc824x_mpc107_setreg(MEAR1, mear1);
  67. mpc824x_mpc107_setreg(EMEAR1, emear1);
  68. return (size);
  69. }
  70. /*
  71. * Initialize PCI Devices, report devices found.
  72. */
  73. #ifndef CONFIG_PCI_PNP
  74. static struct pci_config_table pci_sandpoint_config_table[] = {
  75. { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
  76. pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
  77. PCI_ENET0_MEMADDR,
  78. PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
  79. { }
  80. };
  81. #endif
  82. struct pci_controller hose = {
  83. #ifndef CONFIG_PCI_PNP
  84. config_table: pci_sandpoint_config_table,
  85. #endif
  86. };
  87. void pci_init_board(void)
  88. {
  89. pci_mpc824x_init(&hose);
  90. /* init PCI_to_LOCAL Bus BRIDGE */
  91. Plx9030Init();
  92. sysControlDisplay(0,' ');
  93. sysControlDisplay(1,'C');
  94. sysControlDisplay(2,'P');
  95. sysControlDisplay(3,'C');
  96. sysControlDisplay(4,' ');
  97. sysControlDisplay(5,'4');
  98. sysControlDisplay(6,'5');
  99. sysControlDisplay(7,' ');
  100. }
  101. /**************************************************************************
  102. *
  103. * sysControlDisplay - controls one of the Alphanum. Display digits.
  104. *
  105. * This routine will write an ASCII character to the display digit requested.
  106. *
  107. * SEE ALSO:
  108. *
  109. * RETURNS: NA
  110. */
  111. int sysControlDisplay
  112. (
  113. int digit, /* number of digit 0..7 */
  114. uchar ascii_code /* ASCII code */
  115. )
  116. {
  117. if ((digit < 0) || (digit > 7))
  118. return (-1);
  119. *((volatile uchar*)(DISP_CHR_RAM + digit)) = ascii_code;
  120. return (0);
  121. }