board_init.S 2.2 KB

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  1. /*
  2. * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  3. *
  4. * Board-specific low level initialization code. Called at the very end
  5. * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
  6. * initialization required.
  7. *
  8. * For _OLDER_ Sonata boards sets up GPIO4 to control NAND WP line. Newer
  9. * Sonata boards, AFAIK, don't use this so it's just return by default. Ask
  10. * Visioneering if they reinvented the wheel once again to make sure :)
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #include <config.h>
  28. .globl dv_board_init
  29. dv_board_init:
  30. #ifdef SONATA_BOARD_GPIOWP
  31. /* Set PINMUX0 to enable GPIO4 */
  32. ldr r0, _PINMUX0
  33. ldr r1, GPIO4_EN_MASK
  34. ldr r2, [r0]
  35. and r2, r2, r1
  36. str r2, [r0]
  37. /* Enable GPIO LPSC module */
  38. ldr r0, PTSTAT
  39. gpio_ptstat_loop1:
  40. ldr r2, [r0]
  41. tst r2, $0x00000001
  42. bne gpio_ptstat_loop1
  43. ldr r1, MDCTL_GPIO
  44. ldr r2, [r1]
  45. and r2, r2, $0xfffffff8
  46. orr r2, r2, $0x00000003
  47. str r2, [r1]
  48. orr r2, r2, $0x00000200
  49. str r2, [r1]
  50. ldr r1, PTCMD
  51. mov r2, $0x00000001
  52. str r2, [r1]
  53. gpio_ptstat_loop2:
  54. ldr r2, [r0]
  55. tst r2, $0x00000001
  56. bne gpio_ptstat_loop2
  57. ldr r0, MDSTAT_GPIO
  58. gpio_mdstat_loop:
  59. ldr r2, [r0]
  60. and r2, r2, $0x0000001f
  61. teq r2, $0x00000003
  62. bne gpio_mdstat_loop
  63. /* GPIO4 -> output */
  64. ldr r0, GPIO_DIR01
  65. mov r1, $0x10
  66. ldr r2, [r0]
  67. bic r2, r2, r0
  68. str r2, [r0]
  69. /* Set it to 0 (Write Protect) */
  70. ldr r0, GPIO_CLR_DATA01
  71. str r1, [r0]
  72. #endif
  73. mov pc, lr
  74. #ifdef SONATA_BOARD_GPIOWP
  75. .ltorg
  76. GPIO4_EN_MASK:
  77. .word 0xf77fffff
  78. MDCTL_GPIO:
  79. .word 0x01c41a68
  80. MDSTAT_GPIO:
  81. .word 0x01c41868
  82. GPIO_DIR01:
  83. .word 0x01c67010
  84. GPIO_CLR_DATA01:
  85. .word 0x01c6701c
  86. #endif