serial.c 4.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190
  1. /*
  2. * Simple serial driver for Cogent motherboard serial ports
  3. * for use during boot
  4. */
  5. #include <common.h>
  6. #include <board/cogent/serial.h>
  7. #if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
  8. #if (defined(CONFIG_8xx) && defined(CONFIG_8xx_CONS_NONE)) || \
  9. (defined(CONFIG_8260) && defined(CONFIG_CONS_NONE))
  10. #if CONFIG_CONS_INDEX == 1
  11. #define CMA_MB_SERIAL_BASE CMA_MB_SERIALA_BASE
  12. #elif CONFIG_CONS_INDEX == 2
  13. #define CMA_MB_SERIAL_BASE CMA_MB_SERIALB_BASE
  14. #elif CONFIG_CONS_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
  15. #define CMA_MB_SERIAL_BASE CMA_MB_SER2A_BASE
  16. #elif CONFIG_CONS_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
  17. #define CMA_MB_SERIAL_BASE CMA_MB_SER2B_BASE
  18. #else
  19. #error CONFIG_CONS_INDEX must be configured for Cogent motherboard serial
  20. #endif
  21. int serial_init (void)
  22. {
  23. /* DECLARE_GLOBAL_DATA_PTR; */
  24. cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
  25. cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */
  26. serial_setbrg ();
  27. cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
  28. cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */
  29. cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
  30. return (0);
  31. }
  32. void
  33. serial_setbrg (void)
  34. {
  35. DECLARE_GLOBAL_DATA_PTR;
  36. cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
  37. unsigned int divisor;
  38. unsigned char lcr;
  39. if ((divisor = br_to_div(gd->baudrate)) == 0)
  40. divisor = DEFDIV;
  41. lcr = cma_mb_reg_read(&mbsp->ser_lcr);
  42. cma_mb_reg_write(&mbsp->ser_lcr, lcr|0x80);/* Access baud rate(set DLAB)*/
  43. cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff);
  44. cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff);
  45. cma_mb_reg_write(&mbsp->ser_lcr, lcr); /* unset DLAB */
  46. }
  47. void
  48. serial_putc(const char c)
  49. {
  50. cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
  51. if (c == '\n')
  52. serial_putc('\r');
  53. while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0)
  54. ;
  55. cma_mb_reg_write(&mbsp->ser_thr, c);
  56. }
  57. void
  58. serial_puts(const char *s)
  59. {
  60. while (*s != '\0')
  61. serial_putc(*s++);
  62. }
  63. int
  64. serial_getc(void)
  65. {
  66. cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
  67. while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0)
  68. ;
  69. return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f);
  70. }
  71. int
  72. serial_tstc(void)
  73. {
  74. cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
  75. return ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) != 0);
  76. }
  77. #endif /* CONS_NONE */
  78. #if (CONFIG_COMMANDS & CFG_CMD_KGDB) && \
  79. defined(CONFIG_KGDB_NONE)
  80. #if CONFIG_KGDB_INDEX == CONFIG_CONS_INDEX
  81. #error Console and kgdb are on the same serial port - this is not supported
  82. #endif
  83. #if CONFIG_KGDB_INDEX == 1
  84. #define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALA_BASE
  85. #elif CONFIG_KGDB_INDEX == 2
  86. #define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALB_BASE
  87. #elif CONFIG_KGDB_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
  88. #define CMA_MB_KGDB_SER_BASE CMA_MB_SER2A_BASE
  89. #elif CONFIG_KGDB_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
  90. #define CMA_MB_KGDB_SER_BASE CMA_MB_SER2B_BASE
  91. #else
  92. #error CONFIG_KGDB_INDEX must be configured for Cogent motherboard serial
  93. #endif
  94. void
  95. kgdb_serial_init(void)
  96. {
  97. cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
  98. unsigned int divisor;
  99. if ((divisor = br_to_div(CONFIG_KGDB_BAUDRATE)) == 0)
  100. divisor = DEFDIV;
  101. cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */
  102. cma_mb_reg_write(&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB)*/
  103. cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff);
  104. cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff);
  105. cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
  106. cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */
  107. cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
  108. printf("[on cma10x serial port B] ");
  109. }
  110. void
  111. putDebugChar(int c)
  112. {
  113. cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
  114. while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0)
  115. ;
  116. cma_mb_reg_write(&mbsp->ser_thr, c & 0xff);
  117. }
  118. void
  119. putDebugStr(const char *str)
  120. {
  121. while (*str != '\0') {
  122. if (*str == '\n')
  123. putDebugChar('\r');
  124. putDebugChar(*str++);
  125. }
  126. }
  127. int
  128. getDebugChar(void)
  129. {
  130. cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
  131. while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0)
  132. ;
  133. return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f);
  134. }
  135. void
  136. kgdb_interruptible(int yes)
  137. {
  138. cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
  139. if (yes == 1) {
  140. printf("kgdb: turning serial ints on\n");
  141. cma_mb_reg_write(&mbsp->ser_ier, 0xf);
  142. }
  143. else {
  144. printf("kgdb: turning serial ints off\n");
  145. cma_mb_reg_write(&mbsp->ser_ier, 0x0);
  146. }
  147. }
  148. #endif /* KGDB && KGDB_NONE */
  149. #endif /* CAPS & SERPAR */