config.h 1.9 KB

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  1. /*
  2. * Copyright 2009 Freescale Semiconductor, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of
  7. * the License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17. * MA 02111-1307 USA
  18. *
  19. */
  20. #ifndef _ASM_CONFIG_H_
  21. #define _ASM_CONFIG_H_
  22. #ifndef CONFIG_MAX_MEM_MAPPED
  23. #if defined(CONFIG_4xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  24. #define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30)
  25. #else
  26. #define CONFIG_MAX_MEM_MAPPED (256 << 20)
  27. #endif
  28. #endif
  29. /* Check if boards need to enable FSL DMA engine for SDRAM init */
  30. #if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC)
  31. #if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \
  32. ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
  33. !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
  34. #define CONFIG_FSL_DMA
  35. #endif
  36. #endif
  37. #if defined(CONFIG_MPC8572) || defined(CONFIG_P1020) || \
  38. defined(CONFIG_P2020) || defined(CONFIG_MPC8641)
  39. #define CONFIG_MAX_CPUS 2
  40. #elif defined(CONFIG_PPC_P4080)
  41. #define CONFIG_MAX_CPUS 8
  42. #else
  43. #define CONFIG_MAX_CPUS 1
  44. #endif
  45. /*
  46. * Provide a default boot page translation virtual address that lines up with
  47. * Freescale's default e500 reset page.
  48. */
  49. #if (defined(CONFIG_E500) && defined(CONFIG_MP))
  50. #ifndef CONFIG_BPTR_VIRT_ADDR
  51. #define CONFIG_BPTR_VIRT_ADDR 0xfffff000
  52. #endif
  53. #endif
  54. /* Relocation to SDRAM works on all PPC boards */
  55. #define CONFIG_RELOC_FIXUP_WORKS
  56. #endif /* _ASM_CONFIG_H_ */