tlb.c 4.7 KB

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  1. /*
  2. * Copyright 2008-2009 Freescale Semiconductor, Inc.
  3. *
  4. * (C) Copyright 2000
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #include <common.h>
  26. #include <asm/processor.h>
  27. #include <asm/mmu.h>
  28. #ifdef CONFIG_ADDR_MAP
  29. #include <addr_map.h>
  30. #endif
  31. DECLARE_GLOBAL_DATA_PTR;
  32. void invalidate_tlb(u8 tlb)
  33. {
  34. if (tlb == 0)
  35. mtspr(MMUCSR0, 0x4);
  36. if (tlb == 1)
  37. mtspr(MMUCSR0, 0x2);
  38. }
  39. void init_tlbs(void)
  40. {
  41. int i;
  42. for (i = 0; i < num_tlb_entries; i++) {
  43. write_tlb(tlb_table[i].mas0,
  44. tlb_table[i].mas1,
  45. tlb_table[i].mas2,
  46. tlb_table[i].mas3,
  47. tlb_table[i].mas7);
  48. }
  49. return ;
  50. }
  51. #ifndef CONFIG_NAND_SPL
  52. void set_tlb(u8 tlb, u32 epn, u64 rpn,
  53. u8 perms, u8 wimge,
  54. u8 ts, u8 esel, u8 tsize, u8 iprot)
  55. {
  56. u32 _mas0, _mas1, _mas2, _mas3, _mas7;
  57. _mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
  58. _mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
  59. _mas2 = FSL_BOOKE_MAS2(epn, wimge);
  60. _mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
  61. _mas7 = FSL_BOOKE_MAS7(rpn);
  62. write_tlb(_mas0, _mas1, _mas2, _mas3, _mas7);
  63. #ifdef CONFIG_ADDR_MAP
  64. if ((tlb == 1) && (gd->flags & GD_FLG_RELOC))
  65. addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), esel);
  66. #endif
  67. }
  68. void disable_tlb(u8 esel)
  69. {
  70. u32 _mas0, _mas1, _mas2, _mas3, _mas7;
  71. _mas0 = FSL_BOOKE_MAS0(1, esel, 0);
  72. _mas1 = 0;
  73. _mas2 = 0;
  74. _mas3 = 0;
  75. _mas7 = 0;
  76. mtspr(MAS0, _mas0);
  77. mtspr(MAS1, _mas1);
  78. mtspr(MAS2, _mas2);
  79. mtspr(MAS3, _mas3);
  80. #ifdef CONFIG_ENABLE_36BIT_PHYS
  81. mtspr(MAS7, _mas7);
  82. #endif
  83. asm volatile("isync;msync;tlbwe;isync");
  84. #ifdef CONFIG_ADDR_MAP
  85. if (gd->flags & GD_FLG_RELOC)
  86. addrmap_set_entry(0, 0, 0, esel);
  87. #endif
  88. }
  89. static void tlbsx (const volatile unsigned *addr)
  90. {
  91. __asm__ __volatile__ ("tlbsx 0,%0" : : "r" (addr), "m" (*addr));
  92. }
  93. /* return -1 if we didn't find anything */
  94. int find_tlb_idx(void *addr, u8 tlbsel)
  95. {
  96. u32 _mas0, _mas1;
  97. /* zero out Search PID, AS */
  98. mtspr(MAS6, 0);
  99. tlbsx(addr);
  100. _mas0 = mfspr(MAS0);
  101. _mas1 = mfspr(MAS1);
  102. /* we found something, and its in the TLB we expect */
  103. if ((MAS1_VALID & _mas1) &&
  104. (MAS0_TLBSEL(tlbsel) == (_mas0 & MAS0_TLBSEL_MSK))) {
  105. return ((_mas0 & MAS0_ESEL_MSK) >> 16);
  106. }
  107. return -1;
  108. }
  109. #ifdef CONFIG_ADDR_MAP
  110. void init_addr_map(void)
  111. {
  112. int i;
  113. unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
  114. /* walk all the entries */
  115. for (i = 0; i < max_cam; i++) {
  116. unsigned long epn;
  117. u32 tsize, _mas1;
  118. phys_addr_t rpn;
  119. mtspr(MAS0, FSL_BOOKE_MAS0(1, i, 0));
  120. asm volatile("tlbre;isync");
  121. _mas1 = mfspr(MAS1);
  122. /* if the entry isn't valid skip it */
  123. if (!(_mas1 & MAS1_VALID))
  124. continue;
  125. tsize = (_mas1 >> 8) & 0xf;
  126. epn = mfspr(MAS2) & MAS2_EPN;
  127. rpn = mfspr(MAS3) & MAS3_RPN;
  128. #ifdef CONFIG_ENABLE_36BIT_PHYS
  129. rpn |= ((phys_addr_t)mfspr(MAS7)) << 32;
  130. #endif
  131. addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), i);
  132. }
  133. return ;
  134. }
  135. #endif
  136. #ifndef CONFIG_SYS_DDR_TLB_START
  137. #define CONFIG_SYS_DDR_TLB_START 8
  138. #endif
  139. unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)
  140. {
  141. unsigned int tlb_size;
  142. unsigned int ram_tlb_index = CONFIG_SYS_DDR_TLB_START;
  143. unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
  144. unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;
  145. u64 size, memsize = (u64)memsize_in_meg << 20;
  146. size = min(memsize, CONFIG_MAX_MEM_MAPPED);
  147. /* Convert (4^max) kB to (2^max) bytes */
  148. max_cam = max_cam * 2 + 10;
  149. for (; size && ram_tlb_index < 16; ram_tlb_index++) {
  150. u32 camsize = __ilog2_u64(size) & ~1U;
  151. u32 align = __ilog2(ram_tlb_address) & ~1U;
  152. if (align == -2) align = max_cam;
  153. if (camsize > align)
  154. camsize = align;
  155. if (camsize > max_cam)
  156. camsize = max_cam;
  157. tlb_size = (camsize - 10) / 2;
  158. set_tlb(1, ram_tlb_address, ram_tlb_address,
  159. MAS3_SX|MAS3_SW|MAS3_SR, 0,
  160. 0, ram_tlb_index, tlb_size, 1);
  161. size -= 1ULL << camsize;
  162. memsize -= 1ULL << camsize;
  163. ram_tlb_address += 1UL << camsize;
  164. }
  165. if (memsize)
  166. print_size(memsize, " left unmapped\n");
  167. /*
  168. * Confirm that the requested amount of memory was mapped.
  169. */
  170. return memsize_in_meg;
  171. }
  172. #endif /* !CONFIG_NAND_SPL */