ddr.c 1.2 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * Version 2 as published by the Free Software Foundation.
  7. */
  8. #include <common.h>
  9. #include <asm/fsl_ddr_sdram.h>
  10. #include <asm/fsl_ddr_dimm_params.h>
  11. void fsl_ddr_board_options(memctl_options_t *popts,
  12. dimm_params_t *pdimm,
  13. unsigned int ctrl_num)
  14. {
  15. /*
  16. * Factors to consider for clock adjust:
  17. * - number of chips on bus
  18. * - position of slot
  19. * - DDR1 vs. DDR2?
  20. * - ???
  21. *
  22. * This needs to be determined on a board-by-board basis.
  23. * 0110 3/4 cycle late
  24. * 0111 7/8 cycle late
  25. */
  26. popts->clk_adjust = 7;
  27. /*
  28. * Factors to consider for CPO:
  29. * - frequency
  30. * - ddr1 vs. ddr2
  31. */
  32. popts->cpo_override = 10;
  33. /*
  34. * Factors to consider for write data delay:
  35. * - number of DIMMs
  36. *
  37. * 1 = 1/4 clock delay
  38. * 2 = 1/2 clock delay
  39. * 3 = 3/4 clock delay
  40. * 4 = 1 clock delay
  41. * 5 = 5/4 clock delay
  42. * 6 = 3/2 clock delay
  43. */
  44. popts->write_data_delay = 3;
  45. /*
  46. * Factors to consider for half-strength driver enable:
  47. * - number of DIMMs installed
  48. */
  49. popts->half_strength_driver_enable = 0;
  50. }