top5200.c 6.4 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2003
  6. * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <common.h>
  27. #include <mpc5xxx.h>
  28. #include <pci.h>
  29. /*****************************************************************************
  30. * initialize SDRAM/DDRAM controller.
  31. * TBD: get data from I2C EEPROM
  32. *****************************************************************************/
  33. long int initdram (int board_type)
  34. {
  35. ulong dramsize = 0;
  36. #ifndef CFG_RAMBOOT
  37. ulong t;
  38. ulong tap_del;
  39. #define MODE_EN 0x80000000
  40. #define SOFT_PRE 2
  41. #define SOFT_REF 4
  42. /* configure SDRAM start/end */
  43. *(vu_long *)MPC5XXX_SDRAM_CS0CFG = (CFG_SDRAM_BASE & 0xFFF00000) | CFG_DRAM_RAM_SIZE;
  44. *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
  45. /* setup config registers */
  46. *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = CFG_DRAM_CONFIG1;
  47. *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = CFG_DRAM_CONFIG2;
  48. /* unlock mode register */
  49. *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN;
  50. /* precharge all banks */
  51. *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_PRE;
  52. #if CFG_DRAM_DDR
  53. /* set extended mode register */
  54. *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_EMODE;
  55. #endif
  56. /* set mode register */
  57. *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_MODE | 0x0400;
  58. /* precharge all banks */
  59. *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_PRE;
  60. /* auto refresh */
  61. *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_REF;
  62. /* set mode register */
  63. *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_MODE;
  64. /* normal operation */
  65. *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL;
  66. /* write default TAP delay */
  67. *(vu_long *)MPC5XXX_CDM_PORCFG = CFG_DRAM_TAP_DEL << 24;
  68. #if 0
  69. for (tap_del = 0; tap_del < 32; tap_del++) {
  70. *(vu_long *)MPC5XXX_CDM_PORCFG = tap_del << 24;
  71. printf ("\nTAP Delay:%x Filling DRAM...", *(vu_long *)MPC5XXX_CDM_PORCFG);
  72. for (t = 0; t < 0x04000000; t+=4)
  73. *(vu_long *) t = t;
  74. printf ("Checking DRAM...\n");
  75. for (t = 0; t < 0x04000000; t+=4) {
  76. ulong rval = *(vu_long *) t;
  77. if (rval != t) {
  78. printf ("mismatch at %x: ", t);
  79. printf (" 1.read %x", rval);
  80. printf (" 2.read %x", *(vu_long *) t);
  81. printf (" 3.read %x", *(vu_long *) t);
  82. break;
  83. }
  84. }
  85. }
  86. #endif
  87. #endif /* CFG_RAMBOOT */
  88. dramsize = ((1 << (*(vu_long *)MPC5XXX_SDRAM_CS0CFG - 0x13)) << 20);
  89. /* return total ram size */
  90. return dramsize;
  91. }
  92. /*****************************************************************************
  93. * print board identification
  94. *****************************************************************************/
  95. int checkboard (void)
  96. {
  97. #if defined (CONFIG_EVAL5200)
  98. puts ("Board: EMK TOP5200 on EVAL5200\n");
  99. #else
  100. #if defined (CONFIG_MINI5200)
  101. puts ("Board: EMK TOP5200 on MINI5200\n");
  102. #else
  103. puts ("Board: EMK TOP5200\n");
  104. #endif
  105. #endif
  106. return 0;
  107. }
  108. /*****************************************************************************
  109. * prepare for FLASH detection
  110. *****************************************************************************/
  111. void flash_preinit(void)
  112. {
  113. /*
  114. * Now, when we are in RAM, enable flash write
  115. * access for detection process.
  116. * Note that CS_BOOT cannot be cleared when
  117. * executing in flash.
  118. */
  119. *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
  120. }
  121. /*****************************************************************************
  122. * finalize FLASH setup
  123. *****************************************************************************/
  124. void flash_afterinit(uint bank, ulong start, ulong size)
  125. {
  126. if (bank == 0) { /* adjust mapping */
  127. *(vu_long *)MPC5XXX_BOOTCS_START =
  128. *(vu_long *)MPC5XXX_CS0_START = START_REG(start);
  129. *(vu_long *)MPC5XXX_BOOTCS_STOP =
  130. *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(start, size);
  131. }
  132. }
  133. /*****************************************************************************
  134. * otherinits after RAM is there and we are relocated to RAM
  135. * note: though this is an int function, nobody cares for the result!
  136. *****************************************************************************/
  137. int misc_init_r (void)
  138. {
  139. /* read 'factory' part of EEPROM */
  140. uchar buf[81];
  141. uchar *p;
  142. uint length;
  143. uint addr;
  144. uint len;
  145. /* get length first */
  146. addr = CFG_FACT_OFFSET;
  147. if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, 2)) {
  148. bailout:
  149. printf ("cannot read factory configuration\n");
  150. printf ("be sure to set ethaddr yourself!\n");
  151. return 0;
  152. }
  153. length = buf[0] + (buf[1] << 8);
  154. addr += 2;
  155. /* sanity check */
  156. if (length < 20 || length > CFG_FACT_SIZE - 2)
  157. goto bailout;
  158. /* read lines */
  159. while (length > 0) {
  160. /* read one line */
  161. len = length > 80 ? 80 : length;
  162. if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, len))
  163. goto bailout;
  164. /* mark end of buffer */
  165. buf[len] = 0;
  166. /* search end of line */
  167. for (p = buf; *p && *p != 0x0a; p++);
  168. if (!*p)
  169. goto bailout;
  170. *p++ = 0;
  171. /* advance to next line start */
  172. length -= p - buf;
  173. addr += p - buf;
  174. /*printf ("%s\n", buf); */
  175. /* search for our specific entry */
  176. if (!strncmp ((char *) buf, "[RLA/lan/Ethernet] ", 19)) {
  177. setenv ("ethaddr", buf + 19);
  178. } else if (!strncmp ((char *) buf, "[BOARD/SERIAL] ", 15)) {
  179. setenv ("serial#", buf + 15);
  180. } else if (!strncmp ((char *) buf, "[BOARD/TYPE] ", 13)) {
  181. setenv ("board_id", buf + 13);
  182. }
  183. }
  184. return (0);
  185. }
  186. /*****************************************************************************
  187. * initialize the PCI system
  188. *****************************************************************************/
  189. #ifdef CONFIG_PCI
  190. static struct pci_controller hose;
  191. extern void pci_mpc5xxx_init(struct pci_controller *);
  192. void pci_init_board(void)
  193. {
  194. pci_mpc5xxx_init(&hose);
  195. }
  196. #endif