flash.c 12 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
  25. typedef unsigned char FLASH_PORT_WIDTH;
  26. typedef volatile unsigned char FLASH_PORT_WIDTHV;
  27. #define FLASH_ID_MASK 0xFF
  28. #define FPW FLASH_PORT_WIDTH
  29. #define FPWV FLASH_PORT_WIDTHV
  30. #define FLASH_CYCLE1 0x0aaa
  31. #define FLASH_CYCLE2 0x0555
  32. /*-----------------------------------------------------------------------
  33. * Functions
  34. */
  35. static ulong flash_get_size(FPWV *addr, flash_info_t *info);
  36. static void flash_reset(flash_info_t *info);
  37. static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
  38. static flash_info_t *flash_get_info(ulong base);
  39. /*-----------------------------------------------------------------------
  40. * flash_init()
  41. *
  42. * sets up flash_info and returns size of FLASH (bytes)
  43. */
  44. unsigned long flash_init (void)
  45. {
  46. unsigned long size = 0;
  47. int i;
  48. extern void flash_preinit(void);
  49. extern void flash_afterinit(uint, ulong, ulong);
  50. ulong flashbase = CFG_FLASH_BASE;
  51. flash_preinit();
  52. /* There is only ONE FLASH device */
  53. memset(&flash_info[0], 0, sizeof(flash_info_t));
  54. flash_info[0].size =
  55. flash_get_size((FPW *)flashbase, &flash_info[0]);
  56. size += flash_info[0].size;
  57. #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
  58. /* monitor protection ON by default */
  59. flash_protect(FLAG_PROTECT_SET,
  60. CFG_MONITOR_BASE,
  61. CFG_MONITOR_BASE+monitor_flash_len-1,
  62. flash_get_info(CFG_MONITOR_BASE));
  63. #endif
  64. #ifdef CFG_ENV_IS_IN_FLASH
  65. /* ENV protection ON by default */
  66. flash_protect(FLAG_PROTECT_SET,
  67. CFG_ENV_ADDR,
  68. CFG_ENV_ADDR+CFG_ENV_SIZE-1,
  69. flash_get_info(CFG_ENV_ADDR));
  70. #endif
  71. flash_afterinit(0, flash_info[0].start[0], flash_info[0].size);
  72. return size ? size : 1;
  73. }
  74. /*-----------------------------------------------------------------------
  75. */
  76. static void flash_reset(flash_info_t *info)
  77. {
  78. FPWV *base = (FPWV *)(info->start[0]);
  79. /* Put FLASH back in read mode */
  80. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
  81. *base = (FPW)0x00FF00FF; /* Intel Read Mode */
  82. else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
  83. *base = (FPW)0x00F000F0; /* AMD Read Mode */
  84. }
  85. /*-----------------------------------------------------------------------
  86. */
  87. static flash_info_t *flash_get_info(ulong base)
  88. {
  89. int i;
  90. flash_info_t * info;
  91. for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
  92. info = & flash_info[i];
  93. if (info->size &&
  94. info->start[0] <= base && base <= info->start[0] + info->size - 1)
  95. break;
  96. }
  97. return i == CFG_MAX_FLASH_BANKS ? 0 : info;
  98. }
  99. /*-----------------------------------------------------------------------
  100. */
  101. void flash_print_info (flash_info_t *info)
  102. {
  103. int i;
  104. uchar *boottype;
  105. uchar *bootletter;
  106. uchar *fmt;
  107. uchar botbootletter[] = "B";
  108. uchar topbootletter[] = "T";
  109. uchar botboottype[] = "bottom boot sector";
  110. uchar topboottype[] = "top boot sector";
  111. if (info->flash_id == FLASH_UNKNOWN) {
  112. printf ("missing or unknown FLASH type\n");
  113. return;
  114. }
  115. switch (info->flash_id & FLASH_VENDMASK) {
  116. case FLASH_MAN_AMD: printf ("AMD "); break;
  117. #if 0
  118. case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
  119. case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
  120. case FLASH_MAN_SST: printf ("SST "); break;
  121. case FLASH_MAN_STM: printf ("STM "); break;
  122. case FLASH_MAN_INTEL: printf ("INTEL "); break;
  123. #endif
  124. default: printf ("Unknown Vendor "); break;
  125. }
  126. /* check for top or bottom boot, if it applies */
  127. if (info->flash_id & FLASH_BTYPE) {
  128. boottype = botboottype;
  129. bootletter = botbootletter;
  130. } else {
  131. boottype = topboottype;
  132. bootletter = topbootletter;
  133. }
  134. switch (info->flash_id & FLASH_TYPEMASK) {
  135. case FLASH_AM160T:
  136. case FLASH_AM160B:
  137. fmt = "29LV160%s (16 Mbit, %s)\n";
  138. break;
  139. case FLASH_AMDLV065D:
  140. fmt = "29LV065 (64 Mbit, uniform sectors)\n";
  141. break;
  142. default:
  143. fmt = "Unknown Chip Type\n";
  144. break;
  145. }
  146. printf (fmt, bootletter, boottype);
  147. printf (" Size: %ld MB in %d Sectors\n",
  148. info->size >> 20,
  149. info->sector_count);
  150. printf (" Sector Start Addresses:");
  151. for (i=0; i<info->sector_count; ++i) {
  152. if ((i % 5) == 0) {
  153. printf ("\n ");
  154. }
  155. printf (" %08lX%s", info->start[i],
  156. info->protect[i] ? " (RO)" : " ");
  157. }
  158. printf ("\n");
  159. }
  160. /*-----------------------------------------------------------------------
  161. */
  162. /*
  163. * The following code cannot be run from FLASH!
  164. */
  165. ulong flash_get_size (FPWV *addr, flash_info_t *info)
  166. {
  167. int i;
  168. ulong offset;
  169. /* Write auto select command: read Manufacturer ID */
  170. /* Write auto select command sequence and test FLASH answer */
  171. addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
  172. addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
  173. addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
  174. /* The manufacturer codes are only 1 byte, so just use 1 byte.
  175. * This works for any bus width and any FLASH device width.
  176. */
  177. udelay(100);
  178. switch (addr[0] & 0xff) {
  179. case (uchar)AMD_MANUFACT:
  180. info->flash_id = FLASH_MAN_AMD;
  181. break;
  182. #if 0
  183. case (uchar)INTEL_MANUFACT:
  184. info->flash_id = FLASH_MAN_INTEL;
  185. break;
  186. #endif
  187. default:
  188. printf ("unknown vendor=%x ", addr[0] & 0xff);
  189. info->flash_id = FLASH_UNKNOWN;
  190. info->sector_count = 0;
  191. info->size = 0;
  192. break;
  193. }
  194. /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
  195. if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[2]) {
  196. case (FPW)AMD_ID_LV160B:
  197. info->flash_id += FLASH_AM160B;
  198. info->sector_count = 35;
  199. info->size = 0x00200000;
  200. offset = 0x00e00000;
  201. info->start[0] = (ulong)addr + offset;
  202. info->start[1] = (ulong)addr + offset + 0x4000;
  203. info->start[2] = (ulong)addr + offset + 0x6000;
  204. info->start[3] = (ulong)addr + offset + 0x8000;
  205. for (i = 4; i < info->sector_count; i++) {
  206. info->start[i] = (ulong)addr + offset + 0x10000 * (i-3);
  207. }
  208. break;
  209. case (FPW)AMD_ID_LV065D:
  210. info->flash_id += FLASH_AMDLV065D;
  211. info->sector_count = 128;
  212. info->size = 0x00800000;
  213. offset = 0x00800000;
  214. for (i = 0; i < info->sector_count; i++)
  215. info->start[i] = (ulong)addr + offset + (i * 0x10000);
  216. break; /* => 8 or 16 MB */
  217. default:
  218. printf ("unknown AMD device=%x ", (FPW)addr[2]);
  219. info->flash_id = FLASH_UNKNOWN;
  220. info->sector_count = 0;
  221. info->size = 0;
  222. return (0); /* => no or unknown flash */
  223. }
  224. /* Put FLASH back in read mode */
  225. flash_reset(info);
  226. return (info->size);
  227. }
  228. /*-----------------------------------------------------------------------
  229. */
  230. int flash_erase (flash_info_t *info, int s_first, int s_last)
  231. {
  232. FPWV *addr;
  233. int flag, prot, sect;
  234. int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
  235. ulong start, now, last;
  236. int rcode = 0;
  237. if ((s_first < 0) || (s_first > s_last)) {
  238. if (info->flash_id == FLASH_UNKNOWN) {
  239. printf ("- missing\n");
  240. } else {
  241. printf ("- no sectors to erase\n");
  242. }
  243. return 1;
  244. }
  245. switch (info->flash_id & FLASH_TYPEMASK) {
  246. case FLASH_AMDLV065D:
  247. break;
  248. case FLASH_UNKNOWN:
  249. default:
  250. printf ("Can't erase unknown flash type %08lx - aborted\n",
  251. info->flash_id);
  252. return 1;
  253. }
  254. prot = 0;
  255. for (sect=s_first; sect<=s_last; ++sect) {
  256. if (info->protect[sect]) {
  257. prot++;
  258. }
  259. }
  260. if (prot) {
  261. printf ("- Warning: %d protected sectors will not be erased!\n",
  262. prot);
  263. } else {
  264. printf ("\n");
  265. }
  266. last = get_timer(0);
  267. /* Start erase on unprotected sectors */
  268. for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
  269. if (info->protect[sect] != 0) /* protected, skip it */
  270. continue;
  271. /* Disable interrupts which might cause a timeout here */
  272. flag = disable_interrupts();
  273. addr = (FPWV *)(info->start[sect]);
  274. if (intel) {
  275. *addr = (FPW)0x00500050; /* clear status register */
  276. *addr = (FPW)0x00200020; /* erase setup */
  277. *addr = (FPW)0x00D000D0; /* erase confirm */
  278. }
  279. else {
  280. /* must be AMD style if not Intel */
  281. FPWV *base; /* first address in bank */
  282. base = (FPWV *)(info->start[0]);
  283. base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
  284. base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
  285. base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */
  286. base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
  287. base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
  288. *addr = (FPW)0x00300030; /* erase sector */
  289. }
  290. /* re-enable interrupts if necessary */
  291. if (flag)
  292. enable_interrupts();
  293. start = get_timer(0);
  294. /* wait at least 50us for AMD, 80us for Intel.
  295. * Let's wait 1 ms.
  296. */
  297. udelay (1000);
  298. while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
  299. if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
  300. printf ("Timeout\n");
  301. if (intel) {
  302. /* suspend erase */
  303. *addr = (FPW)0x00B000B0;
  304. }
  305. flash_reset(info); /* reset to read mode */
  306. rcode = 1; /* failed */
  307. break;
  308. }
  309. /* show that we're waiting */
  310. if ((get_timer(last)) > CFG_HZ) {/* every second */
  311. putc ('.');
  312. last = get_timer(0);
  313. }
  314. }
  315. /* show that we're waiting */
  316. if ((get_timer(last)) > CFG_HZ) { /* every second */
  317. putc ('.');
  318. last = get_timer(0);
  319. }
  320. flash_reset(info); /* reset to read mode */
  321. }
  322. printf (" done\n");
  323. return rcode;
  324. }
  325. /*-----------------------------------------------------------------------
  326. * Copy memory to flash, returns:
  327. * 0 - OK
  328. * 1 - write timeout
  329. * 2 - Flash not erased
  330. */
  331. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  332. {
  333. FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
  334. int bytes; /* number of bytes to program in current word */
  335. int left; /* number of bytes left to program */
  336. int i, res;
  337. for (left = cnt, res = 0;
  338. left > 0 && res == 0;
  339. addr += sizeof(data), left -= sizeof(data) - bytes) {
  340. bytes = addr & (sizeof(data) - 1);
  341. addr &= ~(sizeof(data) - 1);
  342. /* combine source and destination data so can program
  343. * an entire word of 16 or 32 bits
  344. */
  345. for (i = 0; i < sizeof(data); i++) {
  346. data <<= 8;
  347. if (i < bytes || i - bytes >= left )
  348. data += *((uchar *)addr + i);
  349. else
  350. data += *src++;
  351. }
  352. /* write one word to the flash */
  353. switch (info->flash_id & FLASH_VENDMASK) {
  354. case FLASH_MAN_AMD:
  355. res = write_word_amd(info, (FPWV *)addr, data);
  356. break;
  357. default:
  358. /* unknown flash type, error! */
  359. printf ("missing or unknown FLASH type\n");
  360. res = 1; /* not really a timeout, but gives error */
  361. break;
  362. }
  363. }
  364. return (res);
  365. }
  366. /*-----------------------------------------------------------------------
  367. * Write a word to Flash for AMD FLASH
  368. * A word is 16 or 32 bits, whichever the bus width of the flash bank
  369. * (not an individual chip) is.
  370. *
  371. * returns:
  372. * 0 - OK
  373. * 1 - write timeout
  374. * 2 - Flash not erased
  375. */
  376. static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
  377. {
  378. ulong start;
  379. int flag;
  380. int res = 0; /* result, assume success */
  381. FPWV *base; /* first address in flash bank */
  382. /* Check if Flash is (sufficiently) erased */
  383. if ((*dest & data) != data) {
  384. return (2);
  385. }
  386. base = (FPWV *)(info->start[0]);
  387. /* Disable interrupts which might cause a timeout here */
  388. flag = disable_interrupts();
  389. base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
  390. base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
  391. base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
  392. *dest = data; /* start programming the data */
  393. /* re-enable interrupts if necessary */
  394. if (flag)
  395. enable_interrupts();
  396. start = get_timer (0);
  397. /* data polling for D7 */
  398. while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
  399. if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
  400. *dest = (FPW)0x00F000F0; /* reset bank */
  401. res = 1;
  402. }
  403. }
  404. return (res);
  405. }