vl_ma2sc.c 14 KB

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  1. /*
  2. * (C) Copyright 2009-2012
  3. * Jens Scharsig <esw@bus-elekronik.de>
  4. * BuS Elektronik GmbH & Co. KG
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <config.h>
  25. #include <common.h>
  26. #include <asm/sizes.h>
  27. #include <asm/io.h>
  28. #include <asm/arch/hardware.h>
  29. #include <asm/arch/clk.h>
  30. #include <asm/arch/at91_matrix.h>
  31. #include <asm/arch/at91sam9_smc.h>
  32. #include <asm/arch/at91_pmc.h>
  33. #include <asm/arch/at91_pio.h>
  34. #include <asm/arch/at91_rstc.h>
  35. #include <asm/arch/at91sam9263.h>
  36. #include <asm/arch/gpio.h>
  37. #include <asm/arch/at91_common.h>
  38. #include <lcd.h>
  39. #include <i2c.h>
  40. #include <atmel_lcdc.h>
  41. #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
  42. #include <net.h>
  43. #endif
  44. #include <netdev.h>
  45. DECLARE_GLOBAL_DATA_PTR;
  46. #ifdef CONFIG_CMD_NAND
  47. static void vl_ma2sc_nand_hw_init(void)
  48. {
  49. unsigned long csa;
  50. at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC0;
  51. at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
  52. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  53. at91_set_pio_output(AT91_PIO_PORTA, 13, 1); /* CAN_TX -> H */
  54. at91_set_pio_output(AT91_PIO_PORTA, 12, 1); /* CAN_STB -> H */
  55. at91_set_pio_output(AT91_PIO_PORTA, 11, 1); /* CAN_EN -> H */
  56. /* Enable CS3 */
  57. csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
  58. writel(csa, &matrix->csa[0]);
  59. /* Configure SMC CS3 for NAND/SmartMedia */
  60. writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
  61. AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
  62. &smc->cs[3].setup);
  63. writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
  64. AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
  65. &smc->cs[3].pulse);
  66. writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
  67. &smc->cs[3].cycle);
  68. writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  69. AT91_SMC_MODE_DBW_8 |
  70. AT91_SMC_MODE_TDF_CYCLE(2),
  71. &smc->cs[3].mode);
  72. writel((1 << ATMEL_ID_PIOB) | (1 << ATMEL_ID_PIOCDE),
  73. &pmc->pcer);
  74. /* Configure RDY/BSY */
  75. #ifdef CONFIG_SYS_NAND_READY_PIN
  76. at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  77. #endif
  78. /* Enable NandFlash */
  79. at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  80. }
  81. #endif
  82. #ifdef CONFIG_MACB
  83. static void vl_ma2sc_macb_hw_init(void)
  84. {
  85. unsigned long erstl;
  86. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  87. at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC;
  88. /* Enable clock */
  89. writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
  90. erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
  91. /* Need to reset PHY -> 500ms reset */
  92. writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) |
  93. AT91_RSTC_MR_URSTEN, &rstc->mr);
  94. writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
  95. /* Wait for end hardware reset */
  96. while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
  97. ;
  98. /* Restore NRST value */
  99. writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
  100. at91_macb_hw_init();
  101. }
  102. #endif
  103. #ifdef CONFIG_LCD
  104. vidinfo_t panel_info = {
  105. .vl_col = 320,
  106. .vl_row = 240,
  107. .vl_clk = 6500000,
  108. .vl_sync = ATMEL_LCDC_INVDVAL_INVERTED |
  109. ATMEL_LCDC_INVLINE_INVERTED |
  110. ATMEL_LCDC_INVVD_INVERTED |
  111. ATMEL_LCDC_INVFRAME_INVERTED,
  112. .vl_bpix = (ATMEL_LCDC_PIXELSIZE_8 >> 5),
  113. .vl_tft = 1,
  114. .vl_hsync_len = 5, /* Horiz Sync Pulse Width */
  115. .vl_left_margin = 68, /* horiz back porch */
  116. .vl_right_margin = 20, /* horiz front porch */
  117. .vl_vsync_len = 2, /* vert Sync Pulse Width */
  118. .vl_upper_margin = 18, /* vert back porch */
  119. .vl_lower_margin = 4, /* vert front porch */
  120. .mmio = ATMEL_BASE_LCDC,
  121. };
  122. void lcd_enable(void)
  123. {
  124. }
  125. void lcd_disable(void)
  126. {
  127. }
  128. static void vl_ma2sc_lcd_hw_init(void)
  129. {
  130. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  131. at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDVSYNC */
  132. at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */
  133. at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDDOTCK */
  134. at91_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDDEN */
  135. at91_set_b_periph(AT91_PIO_PORTB, 9, 0); /* LCDCC */
  136. at91_set_a_periph(AT91_PIO_PORTC, 4, 0); /* LCDD0 */
  137. at91_set_a_periph(AT91_PIO_PORTC, 5, 0); /* LCDD1 */
  138. at91_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD2 */
  139. at91_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD3 */
  140. at91_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD4 */
  141. at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD5 */
  142. at91_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD6 */
  143. at91_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD7 */
  144. at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* LCDD9 */
  145. at91_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD10 */
  146. at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD11 */
  147. at91_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD12 */
  148. at91_set_b_periph(AT91_PIO_PORTC, 12, 0); /* LCDD13 */
  149. at91_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD14 */
  150. at91_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD15 */
  151. at91_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDD26 */
  152. at91_set_a_periph(AT91_PIO_PORTC, 21, 0); /* LCDD17 */
  153. at91_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD18 */
  154. at91_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD19 */
  155. at91_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDD20 */
  156. at91_set_b_periph(AT91_PIO_PORTC, 17, 0); /* LCDD21 */
  157. at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */
  158. at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */
  159. at91_set_pio_output(AT91_PIO_PORTE, 0, 0); /* LCD QXH */
  160. at91_set_pio_output(AT91_PIO_PORTE, 2, 0); /* LCD SHUT */
  161. at91_set_pio_output(AT91_PIO_PORTE, 3, 1); /* LCD TopBottom */
  162. at91_set_pio_output(AT91_PIO_PORTE, 4, 0); /* LCD REV */
  163. at91_set_pio_output(AT91_PIO_PORTE, 5, 1); /* LCD RightLeft */
  164. at91_set_pio_output(AT91_PIO_PORTE, 6, 0); /* LCD Color Mode CM */
  165. at91_set_pio_output(AT91_PIO_PORTE, 7, 0); /* LCD BGR */
  166. at91_set_pio_output(AT91_PIO_PORTB, 9, 0); /* LCD CC */
  167. writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
  168. gd->fb_base = ATMEL_BASE_SRAM0;
  169. }
  170. #endif /* Config LCD */
  171. #ifdef CONFIG_BOARD_EARLY_INIT_F
  172. int board_early_init_f(void)
  173. {
  174. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  175. /* Enable clocks for all PIOs */
  176. writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
  177. (1 << ATMEL_ID_PIOCDE),
  178. &pmc->pcer);
  179. at91_seriald_hw_init();
  180. return 0;
  181. }
  182. #endif
  183. int board_init(void)
  184. {
  185. at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC0;
  186. at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
  187. u32 pin;
  188. pin = 0x1F000001;
  189. writel(pin, &pio->pioa.idr);
  190. writel(pin, &pio->pioa.pudr);
  191. writel(pin, &pio->pioa.per);
  192. writel(pin, &pio->pioa.oer);
  193. writel(pin, &pio->pioa.sodr);
  194. writel((1 << 25), &pio->pioa.codr);
  195. pin = 0x1F000100;
  196. writel(pin, &pio->piob.idr);
  197. writel(pin, &pio->piob.pudr);
  198. writel(pin, &pio->piob.per);
  199. writel(pin, &pio->piob.oer);
  200. writel(pin, &pio->piob.codr);
  201. writel((1 << 24), &pio->piob.sodr);
  202. pin = 0x40000000; /* Pullup DRxD enbable */
  203. writel(pin, &pio->pioc.puer);
  204. pin = 0x0000000F; /* HWversion als Input */
  205. writel(pin, &pio->piod.idr);
  206. writel(pin, &pio->piod.puer);
  207. writel(pin, &pio->piod.per);
  208. writel(pin, &pio->piod.odr);
  209. writel(pin, &pio->piod.owdr);
  210. gd->bd->bi_arch_number = MACH_TYPE_VL_MA2SC;
  211. /* adress of boot parameters */
  212. gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  213. writel(CONFIG_SYS_SMC0_MODE0_VAL, &smc->cs[0].setup);
  214. writel(CONFIG_SYS_SMC0_CYCLE0_VAL, &smc->cs[0].cycle);
  215. writel(CONFIG_SYS_SMC0_PULSE0_VAL, &smc->cs[0].pulse);
  216. writel(CONFIG_SYS_SMC0_SETUP0_VAL, &smc->cs[0].setup);
  217. #ifdef CONFIG_CMD_NAND
  218. vl_ma2sc_nand_hw_init();
  219. #endif
  220. #ifdef CONFIG_MACB
  221. vl_ma2sc_macb_hw_init();
  222. #endif
  223. #ifdef CONFIG_USB_OHCI_NEW
  224. at91_uhp_hw_init();
  225. #endif
  226. #ifdef CONFIG_LCD
  227. vl_ma2sc_lcd_hw_init();
  228. #endif
  229. return 0;
  230. }
  231. #ifdef CONFIG_MISC_INIT_R
  232. int misc_init_r(void)
  233. {
  234. uchar buffer[8];
  235. at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
  236. u32 pin;
  237. buffer[0] = 0x04;
  238. buffer[1] = 0x00;
  239. if (i2c_write(0x68, 0x0E, 1, buffer, 2) != 0)
  240. puts("error reseting rtc clock\n\0");
  241. /* read hardware version */
  242. pin = (readl(&pio->piod.pdsr) & 0x0F) + 0x44;
  243. printf("Board: revision %c\n", pin);
  244. buffer[0] = pin;
  245. buffer[1] = 0;
  246. setenv("revision", (char *) buffer);
  247. pin = 0x40000000; /* Pullup DRxD enbable */
  248. writel(pin, &pio->pioc.puer);
  249. return 0;
  250. }
  251. #endif
  252. int dram_init(void)
  253. {
  254. gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE,
  255. CONFIG_SYS_SDRAM_SIZE);
  256. return 0;
  257. }
  258. #ifdef CONFIG_RESET_PHY_R
  259. void reset_phy(void)
  260. {
  261. #ifdef CONFIG_MACB
  262. /*
  263. * Initialize ethernet HW addr prior to starting Linux,
  264. * needed for nfsroot
  265. */
  266. eth_init(gd->bd);
  267. #endif
  268. }
  269. #endif
  270. int board_eth_init(bd_t *bis)
  271. {
  272. int rc = 0;
  273. #ifdef CONFIG_MACB
  274. rc = macb_eth_initialize(0, (void *) ATMEL_BASE_EMAC, 0x01);
  275. #endif
  276. return rc;
  277. }
  278. #ifdef CONFIG_SOFT_I2C
  279. void i2c_init_board(void)
  280. {
  281. u32 pin;
  282. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  283. at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
  284. u8 sda = (1<<4);
  285. u8 scl = (1<<5);
  286. writel(1 << ATMEL_ID_PIOB, &pmc->pcer);
  287. pin = sda | scl;
  288. writel(pin, &pio->piob.idr); /* Disable Interupt */
  289. writel(pin, &pio->piob.pudr);
  290. writel(pin, &pio->piob.per);
  291. writel(pin, &pio->piob.oer);
  292. writel(pin, &pio->piob.sodr);
  293. }
  294. #endif
  295. void watchdog_reset(void)
  296. {
  297. at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
  298. u32 pin = 0x1; /* PA0 */
  299. if ((readl(&pio->pioa.odsr) & pin) > 0)
  300. writel(pin, &pio->pioa.codr);
  301. else
  302. writel(pin, &pio->pioa.sodr);
  303. }
  304. void enable_caches(void)
  305. {
  306. #ifndef CONFIG_SYS_DCACHE_OFF
  307. dcache_enable();
  308. #endif
  309. }
  310. /*---------------------------------------------------------------------------*/
  311. int do_ledtest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  312. {
  313. int rcode = 1;
  314. int row;
  315. int col;
  316. u32 pinz;
  317. u32 pins;
  318. at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
  319. at91_set_pio_output(AT91_PIO_PORTB, 8, 0); /* LCD DIM */
  320. pins = 0x1F000000;
  321. writel(pins, &pio->pioa.idr);
  322. writel(pins, &pio->pioa.pudr);
  323. writel(pins, &pio->pioa.per);
  324. writel(pins, &pio->pioa.oer);
  325. writel(pins, &pio->pioa.sodr);
  326. pinz = 0x1F000000;
  327. writel(pinz, &pio->piob.idr);
  328. writel(pinz, &pio->piob.pudr);
  329. writel(pinz, &pio->piob.per);
  330. writel(pinz, &pio->piob.oer);
  331. writel(pinz, &pio->piob.sodr);
  332. for (row = 0; row < 5; row++) {
  333. for (col = 0; col < 5; col++) {
  334. writel((0x01000000 << col), &pio->piob.sodr);
  335. writel((0x01000000 << row), &pio->pioa.codr);
  336. printf("LED Test %d x %d\n", row, col);
  337. udelay(1000000);
  338. writel(pinz, &pio->piob.codr);
  339. writel(pins, &pio->pioa.sodr);
  340. }
  341. }
  342. return rcode;
  343. }
  344. void poweroff(void)
  345. {
  346. watchdog_reset();
  347. at91_set_pio_output(AT91_PIO_PORTA, 13, 1); /* CAN_TX -> H */
  348. udelay(100);
  349. at91_set_pio_output(AT91_PIO_PORTA, 12, 0); /* CAN_STB -> L */
  350. udelay(100);
  351. at91_set_pio_output(AT91_PIO_PORTA, 11, 0); /* CAN_EN -> L */
  352. udelay(100);
  353. while (1)
  354. watchdog_reset();
  355. }
  356. int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  357. {
  358. int rcode = 1;
  359. poweroff();
  360. return rcode;
  361. }
  362. int do_beep(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  363. {
  364. int i;
  365. u32 freq;
  366. u32 durate;
  367. int rcode = 1;
  368. freq = 1000;
  369. durate = 2;
  370. switch (argc) {
  371. case 3:
  372. durate = simple_strtoul(argv[2], NULL, 10);
  373. case 2:
  374. freq = simple_strtoul(argv[1], NULL, 10);
  375. case 1:
  376. break;
  377. default:
  378. cmd_usage(cmdtp);
  379. rcode = 1;
  380. break;
  381. }
  382. durate = durate * freq;
  383. freq = 500000 / freq;
  384. for (i = 0; i < durate; i++) {
  385. at91_set_pio_output(AT91_PIO_PORTB, 29, 1); /* Sound On*/
  386. udelay(freq);
  387. at91_set_pio_output(AT91_PIO_PORTB, 29, 0); /* Sound Off*/
  388. udelay(freq);
  389. }
  390. at91_set_pio_output(AT91_PIO_PORTB, 29, 0); /* Sound Off*/
  391. return rcode;
  392. }
  393. int do_keytest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  394. {
  395. int rcode = 1;
  396. int row;
  397. u32 col;
  398. u32 pinz;
  399. u32 pins;
  400. at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
  401. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  402. writel((1 << ATMEL_ID_PIOA), &pmc->pcer);
  403. pins = 0x001F0000;
  404. writel(pins, &pio->pioa.idr);
  405. writel(pins, &pio->pioa.pudr);
  406. writel(pins, &pio->pioa.per);
  407. writel(pins, &pio->pioa.odr);
  408. pinz = 0x000F0000;
  409. writel(pinz, &pio->piob.idr);
  410. writel(pinz, &pio->piob.pudr);
  411. writel(pinz, &pio->piob.per);
  412. writel(pinz, &pio->piob.oer);
  413. writel(pinz, &pio->piob.codr);
  414. while (1) {
  415. col = 0;
  416. for (row = 0; row < 4; row++) {
  417. writel((0x00010000 << row), &pio->piob.sodr);
  418. udelay(10000);
  419. col <<= 4;
  420. col |= ((readl(&pio->pioa.pdsr) >> 16) & 0xF) ^ 0xF ;
  421. writel(pinz, &pio->piob.codr);
  422. }
  423. printf("Matix: ");
  424. for (row = 0; row < 16; row++) {
  425. printf("%1.1d", col & 1);
  426. col >>= 1;
  427. }
  428. printf(" SP %d\r ",
  429. 1 ^ (1 & (readl(&pio->piob.pdsr) >> 20)));
  430. if ((1 & (readl(&pio->pioa.pdsr) >> 1)) == 0) {
  431. /* SHUTDOWN */
  432. row = 0;
  433. while (row < 1000) {
  434. if ((1 & (readl(&pio->pioa.pdsr) >> 1)) == 0)
  435. row++;
  436. udelay(100);
  437. }
  438. udelay(100000);
  439. row = 0;
  440. while (row < 1000) {
  441. if ((1 & (readl(&pio->pioa.pdsr) >> 1)) > 0) {
  442. row++;
  443. udelay(1000);
  444. }
  445. }
  446. poweroff();
  447. while (1)
  448. ;
  449. }
  450. }
  451. return rcode;
  452. }
  453. /*****************************************************************************/
  454. U_BOOT_CMD(
  455. ledtest, 1, 0, do_ledtest,
  456. "test ledmatrix",
  457. "\n"
  458. );
  459. U_BOOT_CMD(
  460. keytest, 1, 0, do_keytest,
  461. "test keymatix and special keys, poweroff on pressing ON key",
  462. "\n"
  463. );
  464. U_BOOT_CMD(
  465. poweroff, 1, 0, do_poweroff,
  466. "power off",
  467. "\n"
  468. );
  469. U_BOOT_CMD(
  470. beep, 3, 0, do_beep,
  471. "[freq [duration]]",
  472. "freq frequence of beep\nduration duration of beep\n"
  473. );
  474. /*****************************************************************************/