immap_5282.h 2.4 KB

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  1. /*
  2. * MCF5282 Internal Memory Map
  3. *
  4. * Copyright (c) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #ifndef __IMMAP_5282__
  25. #define __IMMAP_5282__
  26. /* Fast ethernet controller registers
  27. */
  28. typedef struct fec {
  29. uint fec_ecntrl; /* ethernet control register */
  30. uint fec_ievent; /* interrupt event register */
  31. uint fec_imask; /* interrupt mask register */
  32. uint fec_ivec; /* interrupt level and vector status */
  33. uint fec_r_des_active; /* Rx ring updated flag */
  34. uint fec_x_des_active; /* Tx ring updated flag */
  35. uint res3[10]; /* reserved */
  36. uint fec_mii_data; /* MII data register */
  37. uint fec_mii_speed; /* MII speed control register */
  38. uint res4[17]; /* reserved */
  39. uint fec_r_bound; /* end of RAM (read-only) */
  40. uint fec_r_fstart; /* Rx FIFO start address */
  41. uint res5[6]; /* reserved */
  42. uint fec_x_fstart; /* Tx FIFO start address */
  43. uint res7[21]; /* reserved */
  44. uint fec_r_cntrl; /* Rx control register */
  45. uint fec_r_hash; /* Rx hash register */
  46. uint res8[14]; /* reserved */
  47. uint fec_x_cntrl; /* Tx control register */
  48. uint res9[0x9e]; /* reserved */
  49. uint fec_addr_low; /* lower 32 bits of station address */
  50. uint fec_addr_high; /* upper 16 bits of station address */
  51. uint fec_hash_table_high; /* upper 32-bits of hash table */
  52. uint fec_hash_table_low; /* lower 32-bits of hash table */
  53. uint fec_r_des_start; /* beginning of Rx descriptor ring */
  54. uint fec_x_des_start; /* beginning of Tx descriptor ring */
  55. uint fec_r_buff_size; /* Rx buffer size */
  56. uint res2[9]; /* reserved */
  57. uchar fec_fifo[960]; /* fifo RAM */
  58. } fec_t;
  59. #endif /* __IMMAP_5282__ */