bab7xx.c 6.1 KB

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  1. /*
  2. * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  3. * Andreas Heppel <aheppel@sysgo.de>
  4. * (C) Copyright 2001 ELTEC Elektronik AG
  5. * Frank Gottschling <fgottschling@eltec.de>
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #include <common.h>
  26. #include <command.h>
  27. #include <mpc106.h>
  28. #include <mk48t59.h>
  29. #include <74xx_7xx.h>
  30. #include <ns87308.h>
  31. #include <video_fb.h>
  32. /*---------------------------------------------------------------------------*/
  33. /*
  34. * Get Bus clock frequency
  35. */
  36. ulong bab7xx_get_bus_freq (void)
  37. {
  38. /*
  39. * The GPIO Port 1 on BAB7xx reflects the bus speed.
  40. */
  41. volatile struct GPIO *gpio =
  42. (struct GPIO *) (CFG_ISA_IO + CFG_NS87308_GPIO_BASE);
  43. unsigned char data = gpio->dta1;
  44. if (data & 0x02)
  45. return 66666666;
  46. return 83333333;
  47. }
  48. /*---------------------------------------------------------------------------*/
  49. /*
  50. * Measure CPU clock speed (core clock GCLK1) (Approx. GCLK frequency in Hz)
  51. */
  52. ulong bab7xx_get_gclk_freq (void)
  53. {
  54. static const int pllratio_to_factor[] = {
  55. 00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35,
  56. 00,
  57. };
  58. return pllratio_to_factor[get_hid1 () >> 28] *
  59. (bab7xx_get_bus_freq () / 10);
  60. }
  61. /*----------------------------------------------------------------------------*/
  62. int checkcpu (void)
  63. {
  64. uint pvr = get_pvr ();
  65. printf ("MPC7xx V%d.%d", (pvr >> 8) & 0xFF, pvr & 0xFF);
  66. printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq () / 1000000,
  67. bab7xx_get_bus_freq () / 1000000);
  68. return (0);
  69. }
  70. /* ------------------------------------------------------------------------- */
  71. int checkboard (void)
  72. {
  73. #ifdef CFG_ADDRESS_MAP_A
  74. puts ("Board: ELTEC BAB7xx PReP\n");
  75. #else
  76. puts ("Board: ELTEC BAB7xx CHRP\n");
  77. #endif
  78. return (0);
  79. }
  80. /* ------------------------------------------------------------------------- */
  81. int checkflash (void)
  82. {
  83. /* TODO: XXX XXX XXX */
  84. printf ("2 MB ## Test not implemented yet ##\n");
  85. return (0);
  86. }
  87. /* ------------------------------------------------------------------------- */
  88. static unsigned int mpc106_read_cfg_dword (unsigned int reg)
  89. {
  90. unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
  91. out32r (MPC106_REG_ADDR, reg_addr);
  92. return (in32r (MPC106_REG_DATA | (reg & 0x3)));
  93. }
  94. /* ------------------------------------------------------------------------- */
  95. long int dram_size (int board_type)
  96. {
  97. /* No actual initialisation to do - done when setting up
  98. * PICRs MCCRs ME/SARs etc in ram_init.S.
  99. */
  100. register unsigned long i, msar1, mear1, memSize;
  101. #if defined(CFG_MEMTEST)
  102. register unsigned long reg;
  103. printf ("Testing DRAM\n");
  104. /* write each mem addr with it's address */
  105. for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4)
  106. *reg = reg;
  107. for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) {
  108. if (*reg != reg)
  109. return -1;
  110. }
  111. #endif
  112. /*
  113. * Since MPC106 memory controller chip has already been set to
  114. * control all memory, just read and interpret its memory boundery register.
  115. */
  116. memSize = 0;
  117. msar1 = mpc106_read_cfg_dword (MPC106_MSAR1);
  118. mear1 = mpc106_read_cfg_dword (MPC106_MEAR1);
  119. i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf;
  120. do {
  121. if (i & 0x01) /* is bank enabled ? */
  122. memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
  123. msar1 >>= 8;
  124. mear1 >>= 8;
  125. i >>= 1;
  126. } while (i);
  127. return (memSize * 0x100000);
  128. }
  129. /* ------------------------------------------------------------------------- */
  130. long int initdram (int board_type)
  131. {
  132. return dram_size (board_type);
  133. }
  134. /* ------------------------------------------------------------------------- */
  135. void after_reloc (ulong dest_addr)
  136. {
  137. DECLARE_GLOBAL_DATA_PTR;
  138. /*
  139. * Jump to the main U-Boot board init code
  140. */
  141. board_init_r ((gd_t *) gd, dest_addr);
  142. }
  143. /* ------------------------------------------------------------------------- */
  144. /*
  145. * do_reset is done here because in this case it is board specific, since the
  146. * 7xx CPUs can only be reset by external HW (the RTC in this case).
  147. */
  148. void do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
  149. {
  150. #if defined(CONFIG_RTC_MK48T59)
  151. /* trigger watchdog immediately */
  152. rtc_set_watchdog (1, RTC_WD_RB_16TH);
  153. #else
  154. #error "You must define the macro CONFIG_RTC_MK48T59."
  155. #endif
  156. }
  157. /* ------------------------------------------------------------------------- */
  158. #if defined(CONFIG_WATCHDOG)
  159. /*
  160. * Since the 7xx CPUs don't have an internal watchdog, this function is
  161. * board specific. We use the RTC here.
  162. */
  163. void watchdog_reset (void)
  164. {
  165. #if defined(CONFIG_RTC_MK48T59)
  166. /* we use a 32 sec watchdog timer */
  167. rtc_set_watchdog (8, RTC_WD_RB_4);
  168. #else
  169. #error "You must define the macro CONFIG_RTC_MK48T59."
  170. #endif
  171. }
  172. #endif /* CONFIG_WATCHDOG */
  173. /* ------------------------------------------------------------------------- */
  174. #ifdef CONFIG_CONSOLE_EXTRA_INFO
  175. extern GraphicDevice smi;
  176. void video_get_info_str (int line_number, char *info)
  177. {
  178. /* init video info strings for graphic console */
  179. switch (line_number) {
  180. case 1:
  181. sprintf (info, " MPC7xx V%d.%d at %ld / %ld MHz",
  182. (get_pvr () >> 8) & 0xFF,
  183. get_pvr () & 0xFF,
  184. bab7xx_get_gclk_freq () / 1000000,
  185. bab7xx_get_bus_freq () / 1000000);
  186. return;
  187. case 2:
  188. sprintf (info,
  189. " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH",
  190. dram_size (0) / 0x100000, flash_init () / 0x100000);
  191. return;
  192. case 3:
  193. sprintf (info, " %s", smi.modeIdent);
  194. return;
  195. }
  196. /* no more info lines */
  197. *info = 0;
  198. return;
  199. }
  200. #endif
  201. /*---------------------------------------------------------------------------*/