versatile.h 6.3 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Texas Instruments.
  4. * Kshitij Gupta <kshitij@ti.com>
  5. * Configuation settings for the TI OMAP Innovator board.
  6. *
  7. * (C) Copyright 2004
  8. * ARM Ltd.
  9. * Philippe Robin, <philippe.robin@arm.com>
  10. * Configuration for Versatile PB.
  11. *
  12. * See file CREDITS for list of people who contributed to this
  13. * project.
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License as
  17. * published by the Free Software Foundation; either version 2 of
  18. * the License, or (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  28. * MA 02111-1307 USA
  29. */
  30. #ifndef __CONFIG_H
  31. #define __CONFIG_H
  32. /*
  33. * High Level Configuration Options
  34. * (easy to change)
  35. */
  36. #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
  37. #define CONFIG_VERSATILE 1 /* in Versatile Platform Board */
  38. #define CONFIG_ARCH_VERSATILE 1 /* Specifically, a Versatile */
  39. #define CONFIG_SYS_MEMTEST_START 0x100000
  40. #define CONFIG_SYS_MEMTEST_END 0x10000000
  41. #define CONFIG_SYS_HZ (1000000 / 256)
  42. #define CONFIG_SYS_TIMERBASE 0x101E2000 /* Timer 0 and 1 base */
  43. #define CONFIG_SYS_TIMER_INTERVAL 10000
  44. #define CONFIG_SYS_TIMER_RELOAD (CONFIG_SYS_TIMER_INTERVAL >> 4) /* Divide by 16 */
  45. #define CONFIG_SYS_TIMER_CTRL 0x84 /* Enable, Clock / 16 */
  46. /*
  47. * control registers
  48. */
  49. #define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */
  50. /*
  51. * System controller bit assignment
  52. */
  53. #define VERSATILE_REFCLK 0
  54. #define VERSATILE_TIMCLK 1
  55. #define VERSATILE_TIMER1_EnSel 15
  56. #define VERSATILE_TIMER2_EnSel 17
  57. #define VERSATILE_TIMER3_EnSel 19
  58. #define VERSATILE_TIMER4_EnSel 21
  59. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  60. #define CONFIG_SETUP_MEMORY_TAGS 1
  61. #define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */
  62. /*
  63. * Size of malloc() pool
  64. */
  65. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
  66. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  67. /*
  68. * Hardware drivers
  69. */
  70. #define CONFIG_DRIVER_SMC91111
  71. #define CONFIG_SMC_USE_32_BIT
  72. #define CONFIG_SMC91111_BASE 0x10010000
  73. #undef CONFIG_SMC91111_EXT_PHY
  74. /*
  75. * NS16550 Configuration
  76. */
  77. #define CONFIG_PL011_SERIAL
  78. #define CONFIG_PL011_CLOCK 24000000
  79. #define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, (void *)CONFIG_SYS_SERIAL1 }
  80. #define CONFIG_CONS_INDEX 0
  81. #define CONFIG_BAUDRATE 38400
  82. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  83. #define CONFIG_SYS_SERIAL0 0x101F1000
  84. #define CONFIG_SYS_SERIAL1 0x101F2000
  85. /*
  86. * Command line configuration.
  87. */
  88. #define CONFIG_CMD_DHCP
  89. #define CONFIG_CMD_IMI
  90. #define CONFIG_CMD_NET
  91. #define CONFIG_CMD_PING
  92. #define CONFIG_CMD_BDI
  93. #define CONFIG_CMD_MEMORY
  94. #define CONFIG_CMD_FLASH
  95. #define CONFIG_CMD_SAVEENV
  96. /*
  97. * BOOTP options
  98. */
  99. #define CONFIG_BOOTP_SUBNETMASK
  100. #define CONFIG_BOOTP_GATEWAY
  101. #define CONFIG_BOOTP_HOSTNAME
  102. #define CONFIG_BOOTP_BOOTPATH
  103. #define CONFIG_BOOTDELAY 2
  104. #define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp netdev=25,0,0xf1010000,0xf1010010,eth0"
  105. /*#define CONFIG_BOOTCOMMAND "bootp ; bootm" */
  106. /*
  107. * Static configuration when assigning fixed address
  108. */
  109. /*#define CONFIG_NETMASK 255.255.255.0 /--* talk on MY local net */
  110. /*#define CONFIG_IPADDR xx.xx.xx.xx /--* static IP I currently own */
  111. /*#define CONFIG_SERVERIP xx.xx.xx.xx /--* current IP of my dev pc */
  112. #define CONFIG_BOOTFILE "/tftpboot/uImage" /* file to load */
  113. /*
  114. * Miscellaneous configurable options
  115. */
  116. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  117. #define CONFIG_SYS_PROMPT "Versatile # " /* Monitor Command Prompt */
  118. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  119. /* Print Buffer Size */
  120. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
  121. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  122. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  123. #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
  124. #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
  125. /*-----------------------------------------------------------------------
  126. * Stack sizes
  127. *
  128. * The stack sizes are set up in start.S using the settings below
  129. */
  130. #define CONFIG_STACKSIZE (128*1024) /* regular stack */
  131. #ifdef CONFIG_USE_IRQ
  132. #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
  133. #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
  134. #endif
  135. /*-----------------------------------------------------------------------
  136. * Physical Memory Map
  137. */
  138. #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
  139. #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
  140. #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
  141. #define CONFIG_SYS_FLASH_BASE 0x34000000
  142. /*-----------------------------------------------------------------------
  143. * FLASH and environment organization
  144. */
  145. #define VERSATILE_SYS_BASE 0x10000000
  146. #define VERSATILE_SYS_FLASH_OFFSET 0x4C
  147. #define VERSATILE_FLASHCTRL (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
  148. #define VERSATILE_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
  149. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
  150. #define PHYS_FLASH_SIZE 0x34000000 /* 64MB */
  151. /* timeout values are in ticks */
  152. #define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
  153. #define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
  154. #define CONFIG_SYS_MAX_FLASH_SECT (256)
  155. #define PHYS_FLASH_1 (CONFIG_SYS_FLASH_BASE)
  156. #define CONFIG_ENV_IS_IN_FLASH 1 /* env in flash instead of CONFIG_ENV_IS_NOWHERE */
  157. #define CONFIG_ENV_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
  158. #define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
  159. #define CONFIG_ENV_OFFSET 0x01f00000 /* environment starts here */
  160. #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
  161. #endif /* __CONFIG_H */