top9000.c 6.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289
  1. /*
  2. * (C) Copyright 2007-2008
  3. * Stelian Pop <stelian@popies.net>
  4. * Lead Tech Design <www.leadtechdesign.com>
  5. *
  6. * (C) Copyright 2010
  7. * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #include <common.h>
  28. #include <net.h>
  29. #include <netdev.h>
  30. #include <mmc.h>
  31. #include <atmel_mci.h>
  32. #include <i2c.h>
  33. #include <spi.h>
  34. #include <asm/io.h>
  35. #include <asm/arch/hardware.h>
  36. #include <asm/arch/at91sam9260_matrix.h>
  37. #include <asm/arch/at91sam9_smc.h>
  38. #include <asm/arch/at91_common.h>
  39. #include <asm/arch/at91_pmc.h>
  40. #include <asm/arch/at91_rstc.h>
  41. #include <asm/arch/at91_shdwn.h>
  42. #include <asm/arch/gpio.h>
  43. DECLARE_GLOBAL_DATA_PTR;
  44. #ifdef CONFIG_CMD_NAND
  45. static void nand_hw_init(void)
  46. {
  47. struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
  48. struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  49. unsigned long csa;
  50. /* Assign CS3 to NAND/SmartMedia Interface */
  51. csa = readl(&matrix->ebicsa);
  52. csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
  53. writel(csa, &matrix->ebicsa);
  54. /* Configure SMC CS3 for NAND/SmartMedia */
  55. writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
  56. AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
  57. &smc->cs[3].setup);
  58. writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
  59. AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
  60. &smc->cs[3].pulse);
  61. writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
  62. &smc->cs[3].cycle);
  63. writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  64. AT91_SMC_MODE_EXNW_DISABLE |
  65. AT91_SMC_MODE_DBW_8 |
  66. AT91_SMC_MODE_TDF_CYCLE(2),
  67. &smc->cs[3].mode);
  68. /* Configure RDY/BSY */
  69. at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  70. /* Enable NandFlash */
  71. at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  72. }
  73. #endif
  74. #ifdef CONFIG_MACB
  75. static void macb_hw_init(void)
  76. {
  77. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  78. /* Enable EMAC clock */
  79. writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
  80. /* Initialize EMAC=MACB hardware */
  81. at91_macb_hw_init();
  82. }
  83. #endif
  84. #ifdef CONFIG_GENERIC_ATMEL_MCI
  85. /* this is a weak define that we are overriding */
  86. int board_mmc_init(bd_t *bd)
  87. {
  88. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  89. /* Enable MCI clock */
  90. writel(1 << ATMEL_ID_MCI, &pmc->pcer);
  91. /* Initialize MCI hardware */
  92. at91_mci_hw_init();
  93. /* This calls the atmel_mmc_init in gen_atmel_mci.c */
  94. return atmel_mci_init((void *)ATMEL_BASE_MCI);
  95. }
  96. /* this is a weak define that we are overriding */
  97. int board_mmc_getcd(struct mmc *mmc)
  98. {
  99. return !at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN);
  100. }
  101. #endif
  102. int board_early_init_f(void)
  103. {
  104. struct at91_shdwn *shdwn = (struct at91_shdwn *)ATMEL_BASE_SHDWN;
  105. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  106. /*
  107. * make sure the board can be powered on by
  108. * any transition on WKUP
  109. */
  110. writel(AT91_SHDW_MR_WKMODE0H2L | AT91_SHDW_MR_WKMODE0L2H,
  111. &shdwn->mr);
  112. /* Enable clocks for all PIOs */
  113. writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
  114. (1 << ATMEL_ID_PIOC),
  115. &pmc->pcer);
  116. /* set SCL0 and SDA0 to open drain */
  117. at91_set_pio_output(I2C0_PORT, SCL0_PIN, 1);
  118. at91_set_pio_multi_drive(I2C0_PORT, SCL0_PIN, 1);
  119. at91_set_pio_pullup(I2C0_PORT, SCL0_PIN, 1);
  120. at91_set_pio_output(I2C0_PORT, SDA0_PIN, 1);
  121. at91_set_pio_multi_drive(I2C0_PORT, SDA0_PIN, 1);
  122. at91_set_pio_pullup(I2C0_PORT, SDA0_PIN, 1);
  123. /* set SCL1 and SDA1 to open drain */
  124. at91_set_pio_output(I2C1_PORT, SCL1_PIN, 1);
  125. at91_set_pio_multi_drive(I2C1_PORT, SCL1_PIN, 1);
  126. at91_set_pio_pullup(I2C1_PORT, SCL1_PIN, 1);
  127. at91_set_pio_output(I2C1_PORT, SDA1_PIN, 1);
  128. at91_set_pio_multi_drive(I2C1_PORT, SDA1_PIN, 1);
  129. at91_set_pio_pullup(I2C1_PORT, SDA1_PIN, 1);
  130. return 0;
  131. }
  132. int board_init(void)
  133. {
  134. /* arch number of TOP9000 Board */
  135. gd->bd->bi_arch_number = MACH_TYPE_TOP9000;
  136. /* adress of boot parameters */
  137. gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  138. at91_seriald_hw_init();
  139. #ifdef CONFIG_CMD_NAND
  140. nand_hw_init();
  141. #endif
  142. #ifdef CONFIG_MACB
  143. macb_hw_init();
  144. #endif
  145. #ifdef CONFIG_ATMEL_SPI0
  146. /* (n+4) denotes to use nSPISEL(0) in GPIO mode! */
  147. at91_spi0_hw_init(1 << (FRAM_CS_NUM + 4));
  148. #endif
  149. #ifdef CONFIG_ATMEL_SPI1
  150. at91_spi1_hw_init(1 << (ENC_CS_NUM + 4));
  151. #endif
  152. return 0;
  153. }
  154. #ifdef CONFIG_MISC_INIT_R
  155. int misc_init_r(void)
  156. {
  157. /* read 'factory' part of EEPROM */
  158. read_factory_r();
  159. return 0;
  160. }
  161. #endif
  162. int dram_init(void)
  163. {
  164. gd->ram_size = get_ram_size(
  165. (void *)CONFIG_SYS_SDRAM_BASE,
  166. CONFIG_SYS_SDRAM_SIZE);
  167. return 0;
  168. }
  169. #ifdef CONFIG_RESET_PHY_R
  170. void reset_phy(void)
  171. {
  172. /*
  173. * Initialize ethernet HW addresses prior to starting Linux,
  174. * needed for nfsroot.
  175. * TODO: We need to investigate if that is really necessary.
  176. */
  177. eth_init(gd->bd);
  178. }
  179. #endif
  180. int board_eth_init(bd_t *bis)
  181. {
  182. int rc = 0;
  183. int num = 0;
  184. #ifdef CONFIG_MACB
  185. rc = macb_eth_initialize(0,
  186. (void *)ATMEL_BASE_EMAC0,
  187. CONFIG_SYS_PHY_ID);
  188. if (!rc)
  189. num++;
  190. #endif
  191. #ifdef CONFIG_ENC28J60
  192. rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM,
  193. ENC_SPI_CLOCK, SPI_MODE_0);
  194. if (!rc)
  195. num++;
  196. # ifdef CONFIG_ENC28J60_2
  197. rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+1,
  198. ENC_SPI_CLOCK, SPI_MODE_0);
  199. if (!rc)
  200. num++;
  201. # ifdef CONFIG_ENC28J60_3
  202. rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+2,
  203. ENC_SPI_CLOCK, SPI_MODE_0);
  204. if (!rc)
  205. num++;
  206. # endif
  207. # endif
  208. #endif
  209. return num;
  210. }
  211. /*
  212. * I2C access functions
  213. *
  214. * Note:
  215. * We need to access Bus 0 before relocation to access the
  216. * environment settings.
  217. * However i2c_get_bus_num() cannot be called before
  218. * relocation.
  219. */
  220. #ifdef CONFIG_SOFT_I2C
  221. void iic_init(void)
  222. {
  223. /* ports are now initialized in board_early_init_f() */
  224. }
  225. int iic_read(void)
  226. {
  227. switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
  228. case 0:
  229. return at91_get_pio_value(I2C0_PORT, SDA0_PIN);
  230. case 1:
  231. return at91_get_pio_value(I2C1_PORT, SDA1_PIN);
  232. }
  233. return 1;
  234. }
  235. void iic_sda(int bit)
  236. {
  237. switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
  238. case 0:
  239. at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit);
  240. break;
  241. case 1:
  242. at91_set_pio_value(I2C1_PORT, SDA1_PIN, bit);
  243. break;
  244. }
  245. }
  246. void iic_scl(int bit)
  247. {
  248. switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
  249. case 0:
  250. at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit);
  251. break;
  252. case 1:
  253. at91_set_pio_value(I2C1_PORT, SCL1_PIN, bit);
  254. break;
  255. }
  256. }
  257. #endif