dmc.h 6.4 KB

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  1. #ifndef __DMC_H__
  2. #define __DMC_H__
  3. #ifndef __ASSEMBLY__
  4. struct exynos4_dmc {
  5. unsigned int concontrol;
  6. unsigned int memcontrol;
  7. unsigned int memconfig0;
  8. unsigned int memconfig1;
  9. unsigned int directcmd;
  10. unsigned int prechconfig;
  11. unsigned int phycontrol0;
  12. unsigned int phycontrol1;
  13. unsigned int phycontrol2;
  14. unsigned int phycontrol3;
  15. unsigned int pwrdnconfig;
  16. unsigned char res1[0x4];
  17. unsigned int timingref;
  18. unsigned int timingrow;
  19. unsigned int timingdata;
  20. unsigned int timingpower;
  21. unsigned int phystatus;
  22. unsigned int phyzqcontrol;
  23. unsigned int chip0status;
  24. unsigned int chip1status;
  25. unsigned int arefstatus;
  26. unsigned int mrstatus;
  27. unsigned int phytest0;
  28. unsigned int phytest1;
  29. unsigned int qoscontrol0;
  30. unsigned int qosconfig0;
  31. unsigned int qoscontrol1;
  32. unsigned int qosconfig1;
  33. unsigned int qoscontrol2;
  34. unsigned int qosconfig2;
  35. unsigned int qoscontrol3;
  36. unsigned int qosconfig3;
  37. unsigned int qoscontrol4;
  38. unsigned int qosconfig4;
  39. unsigned int qoscontrol5;
  40. unsigned int qosconfig5;
  41. unsigned int qoscontrol6;
  42. unsigned int qosconfig6;
  43. unsigned int qoscontrol7;
  44. unsigned int qosconfig7;
  45. unsigned int qoscontrol8;
  46. unsigned int qosconfig8;
  47. unsigned int qoscontrol9;
  48. unsigned int qosconfig9;
  49. unsigned int qoscontrol10;
  50. unsigned int qosconfig10;
  51. unsigned int qoscontrol11;
  52. unsigned int qosconfig11;
  53. unsigned int qoscontrol12;
  54. unsigned int qosconfig12;
  55. unsigned int qoscontrol13;
  56. unsigned int qosconfig13;
  57. unsigned int qoscontrol14;
  58. unsigned int qosconfig14;
  59. unsigned int qoscontrol15;
  60. unsigned int qosconfig15;
  61. unsigned int qostimeout0;
  62. unsigned int qostimeout1;
  63. unsigned char res2[0x8];
  64. unsigned int ivcontrol;
  65. unsigned char res3[0x8];
  66. unsigned int perevconfig;
  67. unsigned char res4[0xDF00];
  68. unsigned int pmnc_ppc_a;
  69. unsigned char res5[0xC];
  70. unsigned int cntens_ppc_a;
  71. unsigned char res6[0xC];
  72. unsigned int cntenc_ppc_a;
  73. unsigned char res7[0xC];
  74. unsigned int intens_ppc_a;
  75. unsigned char res8[0xC];
  76. unsigned int intenc_ppc_a;
  77. unsigned char res9[0xC];
  78. unsigned int flag_ppc_a;
  79. unsigned char res10[0xAC];
  80. unsigned int ccnt_ppc_a;
  81. unsigned char res11[0xC];
  82. unsigned int pmcnt0_ppc_a;
  83. unsigned char res12[0xC];
  84. unsigned int pmcnt1_ppc_a;
  85. unsigned char res13[0xC];
  86. unsigned int pmcnt2_ppc_a;
  87. unsigned char res14[0xC];
  88. unsigned int pmcnt3_ppc_a;
  89. unsigned char res15[0xEBC];
  90. unsigned int pmnc_ppc_m;
  91. unsigned char res16[0xC];
  92. unsigned int cntens_ppc_m;
  93. unsigned char res17[0xC];
  94. unsigned int cntenc_ppc_m;
  95. unsigned char res18[0xC];
  96. unsigned int intens_ppc_m;
  97. unsigned char res19[0xC];
  98. unsigned int intenc_ppc_m;
  99. unsigned char res20[0xC];
  100. unsigned int flag_ppc_m;
  101. unsigned char res21[0xAC];
  102. unsigned int ccnt_ppc_m;
  103. unsigned char res22[0xC];
  104. unsigned int pmcnt0_ppc_m;
  105. unsigned char res23[0xC];
  106. unsigned int pmcnt1_ppc_m;
  107. unsigned char res24[0xC];
  108. unsigned int pmcnt2_ppc_m;
  109. unsigned char res25[0xC];
  110. unsigned int pmcnt3_ppc_m;
  111. };
  112. struct exynos5_dmc {
  113. unsigned int concontrol;
  114. unsigned int memcontrol;
  115. unsigned int memconfig0;
  116. unsigned int memconfig1;
  117. unsigned int directcmd;
  118. unsigned int prechconfig;
  119. unsigned int phycontrol0;
  120. unsigned char res1[0xc];
  121. unsigned int pwrdnconfig;
  122. unsigned int timingpzq;
  123. unsigned int timingref;
  124. unsigned int timingrow;
  125. unsigned int timingdata;
  126. unsigned int timingpower;
  127. unsigned int phystatus;
  128. unsigned char res2[0x4];
  129. unsigned int chipstatus_ch0;
  130. unsigned int chipstatus_ch1;
  131. unsigned char res3[0x4];
  132. unsigned int mrstatus;
  133. unsigned char res4[0x8];
  134. unsigned int qoscontrol0;
  135. unsigned char resr5[0x4];
  136. unsigned int qoscontrol1;
  137. unsigned char res6[0x4];
  138. unsigned int qoscontrol2;
  139. unsigned char res7[0x4];
  140. unsigned int qoscontrol3;
  141. unsigned char res8[0x4];
  142. unsigned int qoscontrol4;
  143. unsigned char res9[0x4];
  144. unsigned int qoscontrol5;
  145. unsigned char res10[0x4];
  146. unsigned int qoscontrol6;
  147. unsigned char res11[0x4];
  148. unsigned int qoscontrol7;
  149. unsigned char res12[0x4];
  150. unsigned int qoscontrol8;
  151. unsigned char res13[0x4];
  152. unsigned int qoscontrol9;
  153. unsigned char res14[0x4];
  154. unsigned int qoscontrol10;
  155. unsigned char res15[0x4];
  156. unsigned int qoscontrol11;
  157. unsigned char res16[0x4];
  158. unsigned int qoscontrol12;
  159. unsigned char res17[0x4];
  160. unsigned int qoscontrol13;
  161. unsigned char res18[0x4];
  162. unsigned int qoscontrol14;
  163. unsigned char res19[0x4];
  164. unsigned int qoscontrol15;
  165. unsigned char res20[0x14];
  166. unsigned int ivcontrol;
  167. unsigned int wrtra_config;
  168. unsigned int rdlvl_config;
  169. unsigned char res21[0x8];
  170. unsigned int brbrsvconfig;
  171. unsigned int brbqosconfig;
  172. unsigned int membaseconfig0;
  173. unsigned int membaseconfig1;
  174. unsigned char res22[0xc];
  175. unsigned int wrlvl_config;
  176. unsigned char res23[0xc];
  177. unsigned int perevcontrol;
  178. unsigned int perev0config;
  179. unsigned int perev1config;
  180. unsigned int perev2config;
  181. unsigned int perev3config;
  182. unsigned char res24[0xdebc];
  183. unsigned int pmnc_ppc_a;
  184. unsigned char res25[0xc];
  185. unsigned int cntens_ppc_a;
  186. unsigned char res26[0xc];
  187. unsigned int cntenc_ppc_a;
  188. unsigned char res27[0xc];
  189. unsigned int intens_ppc_a;
  190. unsigned char res28[0xc];
  191. unsigned int intenc_ppc_a;
  192. unsigned char res29[0xc];
  193. unsigned int flag_ppc_a;
  194. unsigned char res30[0xac];
  195. unsigned int ccnt_ppc_a;
  196. unsigned char res31[0xc];
  197. unsigned int pmcnt0_ppc_a;
  198. unsigned char res32[0xc];
  199. unsigned int pmcnt1_ppc_a;
  200. unsigned char res33[0xc];
  201. unsigned int pmcnt2_ppc_a;
  202. unsigned char res34[0xc];
  203. unsigned int pmcnt3_ppc_a;
  204. };
  205. struct exynos5_phy_control {
  206. unsigned int phy_con0;
  207. unsigned int phy_con1;
  208. unsigned int phy_con2;
  209. unsigned int phy_con3;
  210. unsigned int phy_con4;
  211. unsigned char res1[4];
  212. unsigned int phy_con6;
  213. unsigned char res2[4];
  214. unsigned int phy_con8;
  215. unsigned int phy_con9;
  216. unsigned int phy_con10;
  217. unsigned char res3[4];
  218. unsigned int phy_con12;
  219. unsigned int phy_con13;
  220. unsigned int phy_con14;
  221. unsigned int phy_con15;
  222. unsigned int phy_con16;
  223. unsigned char res4[4];
  224. unsigned int phy_con17;
  225. unsigned int phy_con18;
  226. unsigned int phy_con19;
  227. unsigned int phy_con20;
  228. unsigned int phy_con21;
  229. unsigned int phy_con22;
  230. unsigned int phy_con23;
  231. unsigned int phy_con24;
  232. unsigned int phy_con25;
  233. unsigned int phy_con26;
  234. unsigned int phy_con27;
  235. unsigned int phy_con28;
  236. unsigned int phy_con29;
  237. unsigned int phy_con30;
  238. unsigned int phy_con31;
  239. unsigned int phy_con32;
  240. unsigned int phy_con33;
  241. unsigned int phy_con34;
  242. unsigned int phy_con35;
  243. unsigned int phy_con36;
  244. unsigned int phy_con37;
  245. unsigned int phy_con38;
  246. unsigned int phy_con39;
  247. unsigned int phy_con40;
  248. unsigned int phy_con41;
  249. unsigned int phy_con42;
  250. };
  251. #endif
  252. #endif