IxEthMii.h 7.6 KB

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  1. /**
  2. * @file IxEthMii.h
  3. *
  4. * @brief this file contains the public API of @ref IxEthMii component
  5. *
  6. * Design notes :
  7. * The main intent of this API is to inplement MII high level fonctionalitoes
  8. * to support the codelets provided with the IXP400 software releases. It
  9. * superceedes previous interfaces provided with @ref IxEThAcc component.
  10. *
  11. * This API has been tested with the PHYs provided with the
  12. * IXP400 development platforms. It may not work for specific Ethernet PHYs
  13. * used on specific boards.
  14. *
  15. * This source code detects and interface the LXT972, LXT973 and KS6995
  16. * Ethernet PHYs.
  17. *
  18. * This source code should be considered as an example which may need
  19. * to be adapted for different hardware implementations.
  20. *
  21. * It is strongly recommended to use public domain and GPL utilities
  22. * like libmii, mii-diag for MII interface support.
  23. *
  24. *
  25. *
  26. * @par
  27. * IXP400 SW Release version 2.0
  28. *
  29. * -- Copyright Notice --
  30. *
  31. * @par
  32. * Copyright 2001-2005, Intel Corporation.
  33. * All rights reserved.
  34. *
  35. * @par
  36. * Redistribution and use in source and binary forms, with or without
  37. * modification, are permitted provided that the following conditions
  38. * are met:
  39. * 1. Redistributions of source code must retain the above copyright
  40. * notice, this list of conditions and the following disclaimer.
  41. * 2. Redistributions in binary form must reproduce the above copyright
  42. * notice, this list of conditions and the following disclaimer in the
  43. * documentation and/or other materials provided with the distribution.
  44. * 3. Neither the name of the Intel Corporation nor the names of its contributors
  45. * may be used to endorse or promote products derived from this software
  46. * without specific prior written permission.
  47. *
  48. * @par
  49. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
  50. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  51. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  52. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
  53. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  54. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  55. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  56. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  57. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  58. * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  59. * SUCH DAMAGE.
  60. *
  61. * @par
  62. * -- End of Copyright Notice --
  63. */
  64. #ifndef IxEthMii_H
  65. #define IxEthMii_H
  66. #include <IxTypes.h>
  67. /**
  68. * @defgroup IxEthMii IXP400 Ethernet Phy Access (IxEthMii) API
  69. *
  70. * @brief ethMii is a library that does provides access to the
  71. * Ethernet PHYs
  72. *
  73. *@{
  74. */
  75. /**
  76. * @ingroup IxEthMii
  77. *
  78. * @fn ixEthMiiPhyScan(BOOL phyPresent[], UINT32 maxPhyCount)
  79. *
  80. * @brief Scan the MDIO bus for PHYs
  81. * This function scans PHY addresses 0 through 31, and sets phyPresent[n] to
  82. * TRUE if a phy is discovered at address n.
  83. *
  84. * - Reentrant - no
  85. * - ISR Callable - no
  86. *
  87. * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
  88. *
  89. * @param phyPresent BOOL [in] - boolean array of IXP425_ETH_ACC_MII_MAX_ADDR entries
  90. * @param maxPhyCount UINT32 [in] - number of PHYs to search for (the scan will stop when
  91. * the indicated number of PHYs is found).
  92. *
  93. * @return IX_STATUS
  94. * - IX_ETH_ACC_SUCCESS
  95. * - IX_ETH_ACC_FAIL : invalid arguments.
  96. *
  97. * <hr>
  98. */
  99. PUBLIC IX_STATUS ixEthMiiPhyScan(BOOL phyPresent[], UINT32 maxPhyCount);
  100. /**
  101. * @ingroup IxEthMii
  102. *
  103. * @fn ixEthMiiPhyConfig(UINT32 phyAddr,
  104. BOOL speed100,
  105. BOOL fullDuplex,
  106. BOOL autonegotiate)
  107. *
  108. *
  109. * @brief Configure a PHY
  110. * Configure a PHY's speed, duplex and autonegotiation status
  111. *
  112. * - Reentrant - no
  113. * - ISR Callable - no
  114. *
  115. * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
  116. *
  117. * @param phyAddr UINT32 [in]
  118. * @param speed100 BOOL [in] - set to TRUE for 100Mbit/s operation, FALSE for 10Mbit/s
  119. * @param fullDuplex BOOL [in] - set to TRUE for Full Duplex, FALSE for Half Duplex
  120. * @param autonegotiate BOOL [in] - set to TRUE to enable autonegotiation
  121. *
  122. * @return IX_STATUS
  123. * - IX_SUCCESS
  124. * - IX_FAIL : invalid arguments.
  125. *
  126. * <hr>
  127. */
  128. PUBLIC IX_STATUS ixEthMiiPhyConfig(UINT32 phyAddr,
  129. BOOL speed100,
  130. BOOL fullDuplex,
  131. BOOL autonegotiate);
  132. /**
  133. * @ingroup IxEthMii
  134. *
  135. * @fn ixEthMiiPhyLoopbackEnable(UINT32 phyAddr)
  136. *
  137. *
  138. * @brief Enable PHY Loopback in a specific Eth MII port
  139. *
  140. * @note When PHY Loopback is enabled, frames sent out to the PHY from the
  141. * IXP400 will be looped back to the IXP400. They will not be transmitted out
  142. * on the wire.
  143. *
  144. * - Reentrant - no
  145. * - ISR Callable - no
  146. *
  147. * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
  148. *
  149. * @return IX_STATUS
  150. * - IX_SUCCESS
  151. * - IX_FAIL : invalid arguments.
  152. * <hr>
  153. */
  154. PUBLIC IX_STATUS
  155. ixEthMiiPhyLoopbackEnable (UINT32 phyAddr);
  156. /**
  157. * @ingroup IxEthMii
  158. *
  159. * @fn ixEthMiiPhyLoopbackDisable(UINT32 phyAddr)
  160. *
  161. *
  162. * @brief Disable PHY Loopback in a specific Eth MII port
  163. *
  164. * - Reentrant - no
  165. * - ISR Callable - no
  166. *
  167. * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
  168. *
  169. * @return IX_STATUS
  170. * - IX_SUCCESS
  171. * - IX_FAIL : invalid arguments.
  172. * <hr>
  173. */
  174. PUBLIC IX_STATUS
  175. ixEthMiiPhyLoopbackDisable (UINT32 phyAddr);
  176. /**
  177. * @ingroup IxEthMii
  178. *
  179. * @fn ixEthMiiPhyReset(UINT32 phyAddr)
  180. *
  181. * @brief Reset a PHY
  182. * Reset a PHY
  183. *
  184. * - Reentrant - no
  185. * - ISR Callable - no
  186. *
  187. * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
  188. *
  189. * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
  190. *
  191. * @return IX_STATUS
  192. * - IX_SUCCESS
  193. * - IX_FAIL : invalid arguments.
  194. *
  195. * <hr>
  196. */
  197. PUBLIC IX_STATUS ixEthMiiPhyReset(UINT32 phyAddr);
  198. /**
  199. * @ingroup IxEthMii
  200. *
  201. * @fn ixEthMiiLinkStatus(UINT32 phyAddr,
  202. BOOL *linkUp,
  203. BOOL *speed100,
  204. BOOL *fullDuplex,
  205. BOOL *autoneg)
  206. *
  207. * @brief Retrieve the current status of a PHY
  208. * Retrieve the link, speed, duplex and autonegotiation status of a PHY
  209. *
  210. * - Reentrant - no
  211. * - ISR Callable - no
  212. *
  213. * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
  214. *
  215. * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
  216. * @param linkUp BOOL [out] - set to TRUE if the link is up
  217. * @param speed100 BOOL [out] - set to TRUE indicates 100Mbit/s, FALSE indicates 10Mbit/s
  218. * @param fullDuplex BOOL [out] - set to TRUE indicates Full Duplex, FALSE indicates Half Duplex
  219. * @param autoneg BOOL [out] - set to TRUE indicates autonegotiation is enabled, FALSE indicates autonegotiation is disabled
  220. *
  221. * @return IX_STATUS
  222. * - IX_SUCCESS
  223. * - IX_FAIL : invalid arguments.
  224. *
  225. * <hr>
  226. */
  227. PUBLIC IX_STATUS ixEthMiiLinkStatus(UINT32 phyAddr,
  228. BOOL *linkUp,
  229. BOOL *speed100,
  230. BOOL *fullDuplex,
  231. BOOL *autoneg);
  232. /**
  233. * @ingroup IxEthMii
  234. *
  235. * @fn ixEthMiiPhyShow (UINT32 phyAddr)
  236. *
  237. *
  238. * @brief Display information on a specified PHY
  239. * Display link status, speed, duplex and Auto Negotiation status
  240. *
  241. * - Reentrant - no
  242. * - ISR Callable - no
  243. *
  244. * @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
  245. *
  246. * @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
  247. *
  248. * @return IX_STATUS
  249. * - IX_SUCCESS
  250. * - IX_FAIL : invalid arguments.
  251. *
  252. * <hr>
  253. */
  254. PUBLIC IX_STATUS ixEthMiiPhyShow (UINT32 phyAddr);
  255. #endif /* ndef IxEthMii_H */
  256. /**
  257. *@}
  258. */