IxEthAccQueueAssign_p.h 4.2 KB

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  1. /**
  2. * @file IxEthAccQueueAssign_p.h
  3. *
  4. * @author Intel Corporation
  5. * @date 06-Mar-2002
  6. *
  7. * @brief Mapping from QMgr Q's to internal assignment
  8. *
  9. * Design Notes:
  10. *
  11. *
  12. * @par
  13. * IXP400 SW Release version 2.0
  14. *
  15. * -- Copyright Notice --
  16. *
  17. * @par
  18. * Copyright 2001-2005, Intel Corporation.
  19. * All rights reserved.
  20. *
  21. * @par
  22. * Redistribution and use in source and binary forms, with or without
  23. * modification, are permitted provided that the following conditions
  24. * are met:
  25. * 1. Redistributions of source code must retain the above copyright
  26. * notice, this list of conditions and the following disclaimer.
  27. * 2. Redistributions in binary form must reproduce the above copyright
  28. * notice, this list of conditions and the following disclaimer in the
  29. * documentation and/or other materials provided with the distribution.
  30. * 3. Neither the name of the Intel Corporation nor the names of its contributors
  31. * may be used to endorse or promote products derived from this software
  32. * without specific prior written permission.
  33. *
  34. * @par
  35. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
  36. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  37. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  38. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
  39. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  40. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  41. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  42. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  43. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  44. * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  45. * SUCH DAMAGE.
  46. *
  47. * @par
  48. * -- End of Copyright Notice --
  49. */
  50. /**
  51. * @addtogroup IxEthAccPri
  52. *@{
  53. */
  54. /*
  55. * Os/System dependancies.
  56. */
  57. #include "IxOsal.h"
  58. /*
  59. * Intermodule dependancies
  60. */
  61. #include "IxQMgr.h"
  62. #include "IxQueueAssignments.h"
  63. /* Check range of Q's assigned to this component. */
  64. #if IX_ETH_ACC_RX_FRAME_ETH_Q >= (IX_QMGR_MIN_QUEUPP_QID ) | \
  65. IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
  66. IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
  67. IX_ETH_ACC_TX_FRAME_ENET0_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
  68. IX_ETH_ACC_TX_FRAME_ENET1_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \
  69. IX_ETH_ACC_TX_FRAME_DONE_ETH_Q >= (IX_QMGR_MIN_QUEUPP_QID)
  70. #error "Not all Ethernet Access Queues are betweem 1-31, requires full functionalty Q's unless otherwise validated "
  71. #endif
  72. /**
  73. *
  74. * @typedef IxEthAccQregInfo
  75. *
  76. * @brief
  77. *
  78. */
  79. typedef struct
  80. {
  81. IxQMgrQId qId;
  82. char *qName;
  83. IxQMgrCallback qCallback;
  84. IxQMgrCallbackId callbackTag;
  85. IxQMgrQSizeInWords qSize;
  86. IxQMgrQEntrySizeInWords qWords;
  87. BOOL qNotificationEnableAtStartup;
  88. IxQMgrSourceId qConditionSource;
  89. IxQMgrWMLevel AlmostEmptyThreshold;
  90. IxQMgrWMLevel AlmostFullThreshold;
  91. } IxEthAccQregInfo;
  92. /*
  93. * Prototypes for all QM callbacks.
  94. */
  95. /*
  96. * Rx Callbacks
  97. */
  98. IX_ETH_ACC_PUBLIC
  99. void ixEthRxFrameQMCallback(IxQMgrQId, IxQMgrCallbackId);
  100. IX_ETH_ACC_PUBLIC
  101. void ixEthRxMultiBufferQMCallback(IxQMgrQId, IxQMgrCallbackId);
  102. IX_ETH_ACC_PUBLIC
  103. void ixEthRxFreeQMCallback(IxQMgrQId, IxQMgrCallbackId);
  104. /*
  105. * Tx Callback.
  106. */
  107. IX_ETH_ACC_PUBLIC
  108. void ixEthTxFrameQMCallback(IxQMgrQId, IxQMgrCallbackId);
  109. IX_ETH_ACC_PUBLIC
  110. void ixEthTxFrameDoneQMCallback(IxQMgrQId, IxQMgrCallbackId );
  111. #define IX_ETH_ACC_QM_QUEUE_DISPATCH_PRIORITY (IX_QMGR_Q_PRIORITY_0) /* Highest priority */
  112. /*
  113. * Queue watermarks
  114. */
  115. #define IX_ETH_ACC_RX_FRAME_ETH_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_NOT_E )
  116. #define IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
  117. #define IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
  118. #define IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
  119. #define IX_ETH_ACC_TX_FRAME_ENET0_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
  120. #define IX_ETH_ACC_TX_FRAME_ENET1_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
  121. #define IX_ETH_ACC_TX_FRAME_ENET2_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E )
  122. #define IX_ETH_ACC_TX_FRAME_DONE_ETH_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_NOT_E )