pdnb3.c 5.5 KB

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  1. /*
  2. * (C) Copyright 2006
  3. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <command.h>
  25. #include <malloc.h>
  26. #include <asm/arch/ixp425.h>
  27. DECLARE_GLOBAL_DATA_PTR;
  28. /* Prototypes */
  29. int gunzip(void *, int, unsigned char *, unsigned long *);
  30. int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
  31. /* predefine these here for FPGA programming (before including fpga.c) */
  32. #define SET_FPGA(data) *IXP425_GPIO_GPOUTR = (data)
  33. #define FPGA_DONE_STATE (*IXP425_GPIO_GPINR & CFG_FPGA_DONE)
  34. #define FPGA_INIT_STATE (*IXP425_GPIO_GPINR & CFG_FPGA_INIT)
  35. #define OLD_VAL old_val
  36. static unsigned long old_val = 0;
  37. /*
  38. * include common fpga code (for prodrive boards)
  39. */
  40. #include "../common/fpga.c"
  41. /*
  42. * Miscelaneous platform dependent initialisations
  43. */
  44. int board_post_init(void)
  45. {
  46. return (0);
  47. }
  48. int board_init(void)
  49. {
  50. /* arch number of PDNB3 */
  51. gd->bd->bi_arch_number = MACH_TYPE_PDNB3;
  52. /* adress of boot parameters */
  53. gd->bd->bi_boot_params = 0x00000100;
  54. GPIO_OUTPUT_SET(CFG_GPIO_FPGA_RESET);
  55. GPIO_OUTPUT_ENABLE(CFG_GPIO_FPGA_RESET);
  56. GPIO_OUTPUT_SET(CFG_GPIO_SYS_RUNNING);
  57. GPIO_OUTPUT_ENABLE(CFG_GPIO_SYS_RUNNING);
  58. /*
  59. * Setup GPIO's for FPGA programming
  60. */
  61. GPIO_OUTPUT_CLEAR(CFG_GPIO_PRG);
  62. GPIO_OUTPUT_CLEAR(CFG_GPIO_CLK);
  63. GPIO_OUTPUT_CLEAR(CFG_GPIO_DATA);
  64. GPIO_OUTPUT_ENABLE(CFG_GPIO_PRG);
  65. GPIO_OUTPUT_ENABLE(CFG_GPIO_CLK);
  66. GPIO_OUTPUT_ENABLE(CFG_GPIO_DATA);
  67. GPIO_OUTPUT_DISABLE(CFG_GPIO_INIT);
  68. GPIO_OUTPUT_DISABLE(CFG_GPIO_DONE);
  69. /*
  70. * Setup GPIO's for interrupts
  71. */
  72. GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTA);
  73. GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTA);
  74. GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTB);
  75. GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTB);
  76. GPIO_OUTPUT_DISABLE(CFG_GPIO_RESTORE_INT);
  77. GPIO_INT_ACT_LOW_SET(CFG_GPIO_RESTORE_INT);
  78. GPIO_OUTPUT_DISABLE(CFG_GPIO_RESTART_INT);
  79. GPIO_INT_ACT_LOW_SET(CFG_GPIO_RESTART_INT);
  80. /*
  81. * Setup GPIO's for 33MHz clock output
  82. */
  83. *IXP425_GPIO_GPCLKR = 0x01FF0000;
  84. GPIO_OUTPUT_ENABLE(CFG_GPIO_CLK_33M);
  85. /*
  86. * Setup other chip select's
  87. */
  88. *IXP425_EXP_CS1 = CFG_EXP_CS1;
  89. return 0;
  90. }
  91. /*
  92. * Check Board Identity
  93. */
  94. int checkboard(void)
  95. {
  96. char *s = getenv("serial#");
  97. puts("Board: PDNB3");
  98. if (s != NULL) {
  99. puts(", serial# ");
  100. puts(s);
  101. }
  102. putc('\n');
  103. return (0);
  104. }
  105. int dram_init(void)
  106. {
  107. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  108. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  109. return (0);
  110. }
  111. int do_fpga_boot(unsigned char *fpgadata)
  112. {
  113. unsigned char *dst;
  114. int status;
  115. int index;
  116. int i;
  117. ulong len = CFG_MALLOC_LEN;
  118. /*
  119. * Setup GPIO's for FPGA programming
  120. */
  121. GPIO_OUTPUT_CLEAR(CFG_GPIO_PRG);
  122. GPIO_OUTPUT_CLEAR(CFG_GPIO_CLK);
  123. GPIO_OUTPUT_CLEAR(CFG_GPIO_DATA);
  124. /*
  125. * Save value so no readback is required upon programming
  126. */
  127. old_val = *IXP425_GPIO_GPOUTR;
  128. /*
  129. * First try to decompress fpga image (gzip compressed?)
  130. */
  131. dst = malloc(CFG_FPGA_MAX_SIZE);
  132. if (gunzip(dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
  133. printf("Error: Image has to be gzipp'ed!\n");
  134. return -1;
  135. }
  136. status = fpga_boot(dst, len);
  137. if (status != 0) {
  138. printf("\nFPGA: Booting failed ");
  139. switch (status) {
  140. case ERROR_FPGA_PRG_INIT_LOW:
  141. printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
  142. break;
  143. case ERROR_FPGA_PRG_INIT_HIGH:
  144. printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
  145. break;
  146. case ERROR_FPGA_PRG_DONE:
  147. printf("(Timeout: DONE not high after programming FPGA)\n ");
  148. break;
  149. }
  150. /* display infos on fpgaimage */
  151. index = 15;
  152. for (i=0; i<4; i++) {
  153. len = dst[index];
  154. printf("FPGA: %s\n", &(dst[index+1]));
  155. index += len+3;
  156. }
  157. putc ('\n');
  158. /* delayed reboot */
  159. for (i=5; i>0; i--) {
  160. printf("Rebooting in %2d seconds \r",i);
  161. for (index=0;index<1000;index++)
  162. udelay(1000);
  163. }
  164. putc('\n');
  165. do_reset(NULL, 0, 0, NULL);
  166. }
  167. puts("FPGA: ");
  168. /* display infos on fpgaimage */
  169. index = 15;
  170. for (i=0; i<4; i++) {
  171. len = dst[index];
  172. printf("%s ", &(dst[index+1]));
  173. index += len+3;
  174. }
  175. putc('\n');
  176. free(dst);
  177. /*
  178. * Reset FPGA
  179. */
  180. GPIO_OUTPUT_CLEAR(CFG_GPIO_FPGA_RESET);
  181. udelay(10);
  182. GPIO_OUTPUT_SET(CFG_GPIO_FPGA_RESET);
  183. return (0);
  184. }
  185. int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  186. {
  187. ulong addr;
  188. if (argc < 2) {
  189. printf ("Usage:\n%s\n", cmdtp->usage);
  190. return 1;
  191. }
  192. addr = simple_strtoul(argv[1], NULL, 16);
  193. return do_fpga_boot((unsigned char *)addr);
  194. }
  195. U_BOOT_CMD(
  196. fpga, 2, 0, do_fpga,
  197. "fpga - boot FPGA\n",
  198. "address size\n - boot FPGA with gzipped image at <address>\n"
  199. );
  200. #if (CONFIG_COMMANDS & CFG_CMD_PCI) || defined(CONFIG_PCI)
  201. extern struct pci_controller hose;
  202. extern void pci_ixp_init(struct pci_controller * hose);
  203. void pci_init_board(void)
  204. {
  205. extern void pci_ixp_init (struct pci_controller *hose);
  206. pci_ixp_init(&hose);
  207. }
  208. #endif