cmd_ide.c 50 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028
  1. /*
  2. * (C) Copyright 2000-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * IDE support
  26. */
  27. #include <common.h>
  28. #include <config.h>
  29. #include <watchdog.h>
  30. #include <command.h>
  31. #include <image.h>
  32. #include <asm/byteorder.h>
  33. #include <asm/io.h>
  34. #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
  35. # include <pcmcia.h>
  36. #endif
  37. #ifdef CONFIG_8xx
  38. # include <mpc8xx.h>
  39. #endif
  40. #ifdef CONFIG_MPC5xxx
  41. #include <mpc5xxx.h>
  42. #endif
  43. #ifdef CONFIG_ORION5X
  44. #include <asm/arch/orion5x.h>
  45. #elif defined CONFIG_KIRKWOOD
  46. #include <asm/arch/kirkwood.h>
  47. #endif
  48. #include <ide.h>
  49. #include <ata.h>
  50. #ifdef CONFIG_STATUS_LED
  51. # include <status_led.h>
  52. #endif
  53. #ifdef CONFIG_IDE_8xx_DIRECT
  54. DECLARE_GLOBAL_DATA_PTR;
  55. #endif
  56. #ifdef __PPC__
  57. # define EIEIO __asm__ volatile ("eieio")
  58. # define SYNC __asm__ volatile ("sync")
  59. #else
  60. # define EIEIO /* nothing */
  61. # define SYNC /* nothing */
  62. #endif
  63. #ifdef CONFIG_IDE_8xx_DIRECT
  64. /* Timings for IDE Interface
  65. *
  66. * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
  67. * 70 165 30 PIO-Mode 0, [ns]
  68. * 4 9 2 [Cycles]
  69. * 50 125 20 PIO-Mode 1, [ns]
  70. * 3 7 2 [Cycles]
  71. * 30 100 15 PIO-Mode 2, [ns]
  72. * 2 6 1 [Cycles]
  73. * 30 80 10 PIO-Mode 3, [ns]
  74. * 2 5 1 [Cycles]
  75. * 25 70 10 PIO-Mode 4, [ns]
  76. * 2 4 1 [Cycles]
  77. */
  78. const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
  79. {
  80. /* Setup Length Hold */
  81. { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
  82. { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
  83. { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
  84. { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
  85. { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
  86. };
  87. static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
  88. #ifndef CONFIG_SYS_PIO_MODE
  89. #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
  90. #endif
  91. static int pio_mode = CONFIG_SYS_PIO_MODE;
  92. /* Make clock cycles and always round up */
  93. #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
  94. #endif /* CONFIG_IDE_8xx_DIRECT */
  95. /* ------------------------------------------------------------------------- */
  96. /* Current I/O Device */
  97. static int curr_device = -1;
  98. /* Current offset for IDE0 / IDE1 bus access */
  99. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  100. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  101. CONFIG_SYS_ATA_IDE0_OFFSET,
  102. #endif
  103. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  104. CONFIG_SYS_ATA_IDE1_OFFSET,
  105. #endif
  106. };
  107. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  108. block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  109. /* ------------------------------------------------------------------------- */
  110. #ifdef CONFIG_IDE_LED
  111. # if !defined(CONFIG_BMS2003) && \
  112. !defined(CONFIG_CPC45) && \
  113. !defined(CONFIG_KUP4K) && \
  114. !defined(CONFIG_KUP4X)
  115. static void ide_led (uchar led, uchar status);
  116. #else
  117. extern void ide_led (uchar led, uchar status);
  118. #endif
  119. #else
  120. #define ide_led(a,b) /* dummy */
  121. #endif
  122. #ifdef CONFIG_IDE_RESET
  123. static void ide_reset (void);
  124. #else
  125. #define ide_reset() /* dummy */
  126. #endif
  127. static void ide_ident (block_dev_desc_t *dev_desc);
  128. static uchar ide_wait (int dev, ulong t);
  129. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  130. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  131. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  132. static void input_data(int dev, ulong *sect_buf, int words);
  133. static void output_data(int dev, ulong *sect_buf, int words);
  134. static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
  135. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  136. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  137. #endif
  138. #ifdef CONFIG_ATAPI
  139. static void atapi_inquiry(block_dev_desc_t *dev_desc);
  140. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
  141. #endif
  142. #ifdef CONFIG_IDE_8xx_DIRECT
  143. static void set_pcmcia_timing (int pmode);
  144. #endif
  145. /* ------------------------------------------------------------------------- */
  146. int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  147. {
  148. int rcode = 0;
  149. switch (argc) {
  150. case 0:
  151. case 1:
  152. return cmd_usage(cmdtp);
  153. case 2:
  154. if (strncmp(argv[1],"res",3) == 0) {
  155. puts ("\nReset IDE"
  156. #ifdef CONFIG_IDE_8xx_DIRECT
  157. " on PCMCIA " PCMCIA_SLOT_MSG
  158. #endif
  159. ": ");
  160. ide_init ();
  161. return 0;
  162. } else if (strncmp(argv[1],"inf",3) == 0) {
  163. int i;
  164. putc ('\n');
  165. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  166. if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
  167. continue; /* list only known devices */
  168. printf ("IDE device %d: ", i);
  169. dev_print(&ide_dev_desc[i]);
  170. }
  171. return 0;
  172. } else if (strncmp(argv[1],"dev",3) == 0) {
  173. if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
  174. puts ("\nno IDE devices available\n");
  175. return 1;
  176. }
  177. printf ("\nIDE device %d: ", curr_device);
  178. dev_print(&ide_dev_desc[curr_device]);
  179. return 0;
  180. } else if (strncmp(argv[1],"part",4) == 0) {
  181. int dev, ok;
  182. for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
  183. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  184. ++ok;
  185. if (dev)
  186. putc ('\n');
  187. print_part(&ide_dev_desc[dev]);
  188. }
  189. }
  190. if (!ok) {
  191. puts ("\nno IDE devices available\n");
  192. rcode ++;
  193. }
  194. return rcode;
  195. }
  196. return cmd_usage(cmdtp);
  197. case 3:
  198. if (strncmp(argv[1],"dev",3) == 0) {
  199. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  200. printf ("\nIDE device %d: ", dev);
  201. if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
  202. puts ("unknown device\n");
  203. return 1;
  204. }
  205. dev_print(&ide_dev_desc[dev]);
  206. /*ide_print (dev);*/
  207. if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
  208. return 1;
  209. }
  210. curr_device = dev;
  211. puts ("... is now current device\n");
  212. return 0;
  213. } else if (strncmp(argv[1],"part",4) == 0) {
  214. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  215. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  216. print_part(&ide_dev_desc[dev]);
  217. } else {
  218. printf ("\nIDE device %d not available\n", dev);
  219. rcode = 1;
  220. }
  221. return rcode;
  222. #if 0
  223. } else if (strncmp(argv[1],"pio",4) == 0) {
  224. int mode = (int)simple_strtoul(argv[2], NULL, 10);
  225. if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
  226. puts ("\nSetting ");
  227. pio_mode = mode;
  228. ide_init ();
  229. } else {
  230. printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
  231. mode, IDE_MAX_PIO_MODE);
  232. }
  233. return;
  234. #endif
  235. }
  236. return cmd_usage(cmdtp);
  237. default:
  238. /* at least 4 args */
  239. if (strcmp(argv[1],"read") == 0) {
  240. ulong addr = simple_strtoul(argv[2], NULL, 16);
  241. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  242. ulong n;
  243. #ifdef CONFIG_SYS_64BIT_LBA
  244. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  245. printf ("\nIDE read: device %d block # %Ld, count %ld ... ",
  246. curr_device, blk, cnt);
  247. #else
  248. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  249. printf ("\nIDE read: device %d block # %ld, count %ld ... ",
  250. curr_device, blk, cnt);
  251. #endif
  252. n = ide_dev_desc[curr_device].block_read (curr_device,
  253. blk, cnt,
  254. (ulong *)addr);
  255. /* flush cache after read */
  256. flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
  257. printf ("%ld blocks read: %s\n",
  258. n, (n==cnt) ? "OK" : "ERROR");
  259. if (n==cnt) {
  260. return 0;
  261. } else {
  262. return 1;
  263. }
  264. } else if (strcmp(argv[1],"write") == 0) {
  265. ulong addr = simple_strtoul(argv[2], NULL, 16);
  266. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  267. ulong n;
  268. #ifdef CONFIG_SYS_64BIT_LBA
  269. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  270. printf ("\nIDE write: device %d block # %Ld, count %ld ... ",
  271. curr_device, blk, cnt);
  272. #else
  273. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  274. printf ("\nIDE write: device %d block # %ld, count %ld ... ",
  275. curr_device, blk, cnt);
  276. #endif
  277. n = ide_write (curr_device, blk, cnt, (ulong *)addr);
  278. printf ("%ld blocks written: %s\n",
  279. n, (n==cnt) ? "OK" : "ERROR");
  280. if (n==cnt)
  281. return 0;
  282. else
  283. return 1;
  284. } else {
  285. return cmd_usage(cmdtp);
  286. }
  287. return rcode;
  288. }
  289. }
  290. int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  291. {
  292. char *boot_device = NULL;
  293. char *ep;
  294. int dev, part = 0;
  295. ulong addr, cnt;
  296. disk_partition_t info;
  297. image_header_t *hdr;
  298. int rcode = 0;
  299. #if defined(CONFIG_FIT)
  300. const void *fit_hdr = NULL;
  301. #endif
  302. show_boot_progress (41);
  303. switch (argc) {
  304. case 1:
  305. addr = CONFIG_SYS_LOAD_ADDR;
  306. boot_device = getenv ("bootdevice");
  307. break;
  308. case 2:
  309. addr = simple_strtoul(argv[1], NULL, 16);
  310. boot_device = getenv ("bootdevice");
  311. break;
  312. case 3:
  313. addr = simple_strtoul(argv[1], NULL, 16);
  314. boot_device = argv[2];
  315. break;
  316. default:
  317. show_boot_progress (-42);
  318. return cmd_usage(cmdtp);
  319. }
  320. show_boot_progress (42);
  321. if (!boot_device) {
  322. puts ("\n** No boot device **\n");
  323. show_boot_progress (-43);
  324. return 1;
  325. }
  326. show_boot_progress (43);
  327. dev = simple_strtoul(boot_device, &ep, 16);
  328. if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
  329. printf ("\n** Device %d not available\n", dev);
  330. show_boot_progress (-44);
  331. return 1;
  332. }
  333. show_boot_progress (44);
  334. if (*ep) {
  335. if (*ep != ':') {
  336. puts ("\n** Invalid boot device, use `dev[:part]' **\n");
  337. show_boot_progress (-45);
  338. return 1;
  339. }
  340. part = simple_strtoul(++ep, NULL, 16);
  341. }
  342. show_boot_progress (45);
  343. if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
  344. show_boot_progress (-46);
  345. return 1;
  346. }
  347. show_boot_progress (46);
  348. if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
  349. (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
  350. printf ("\n** Invalid partition type \"%.32s\""
  351. " (expect \"" BOOT_PART_TYPE "\")\n",
  352. info.type);
  353. show_boot_progress (-47);
  354. return 1;
  355. }
  356. show_boot_progress (47);
  357. printf ("\nLoading from IDE device %d, partition %d: "
  358. "Name: %.32s Type: %.32s\n",
  359. dev, part, info.name, info.type);
  360. debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
  361. info.start, info.size, info.blksz);
  362. if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
  363. printf ("** Read error on %d:%d\n", dev, part);
  364. show_boot_progress (-48);
  365. return 1;
  366. }
  367. show_boot_progress (48);
  368. switch (genimg_get_format ((void *)addr)) {
  369. case IMAGE_FORMAT_LEGACY:
  370. hdr = (image_header_t *)addr;
  371. show_boot_progress (49);
  372. if (!image_check_hcrc (hdr)) {
  373. puts ("\n** Bad Header Checksum **\n");
  374. show_boot_progress (-50);
  375. return 1;
  376. }
  377. show_boot_progress (50);
  378. image_print_contents (hdr);
  379. cnt = image_get_image_size (hdr);
  380. break;
  381. #if defined(CONFIG_FIT)
  382. case IMAGE_FORMAT_FIT:
  383. fit_hdr = (const void *)addr;
  384. puts ("Fit image detected...\n");
  385. cnt = fit_get_size (fit_hdr);
  386. break;
  387. #endif
  388. default:
  389. show_boot_progress (-49);
  390. puts ("** Unknown image type\n");
  391. return 1;
  392. }
  393. cnt += info.blksz - 1;
  394. cnt /= info.blksz;
  395. cnt -= 1;
  396. if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
  397. (ulong *)(addr+info.blksz)) != cnt) {
  398. printf ("** Read error on %d:%d\n", dev, part);
  399. show_boot_progress (-51);
  400. return 1;
  401. }
  402. show_boot_progress (51);
  403. #if defined(CONFIG_FIT)
  404. /* This cannot be done earlier, we need complete FIT image in RAM first */
  405. if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
  406. if (!fit_check_format (fit_hdr)) {
  407. show_boot_progress (-140);
  408. puts ("** Bad FIT image format\n");
  409. return 1;
  410. }
  411. show_boot_progress (141);
  412. fit_print_contents (fit_hdr);
  413. }
  414. #endif
  415. /* Loading ok, update default load address */
  416. load_addr = addr;
  417. /* Check if we should attempt an auto-start */
  418. if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
  419. char *local_args[2];
  420. extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
  421. local_args[0] = argv[0];
  422. local_args[1] = NULL;
  423. printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
  424. do_bootm (cmdtp, 0, 1, local_args);
  425. rcode = 1;
  426. }
  427. return rcode;
  428. }
  429. /* ------------------------------------------------------------------------- */
  430. void inline
  431. __ide_outb(int dev, int port, unsigned char val)
  432. {
  433. debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  434. dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  435. outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  436. }
  437. void ide_outb (int dev, int port, unsigned char val)
  438. __attribute__((weak, alias("__ide_outb")));
  439. unsigned char inline
  440. __ide_inb(int dev, int port)
  441. {
  442. uchar val;
  443. val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  444. debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  445. dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  446. return val;
  447. }
  448. unsigned char ide_inb(int dev, int port)
  449. __attribute__((weak, alias("__ide_inb")));
  450. #ifdef CONFIG_TUNE_PIO
  451. int inline
  452. __ide_set_piomode(int pio_mode)
  453. {
  454. return 0;
  455. }
  456. int inline ide_set_piomode(int pio_mode)
  457. __attribute__((weak, alias("__ide_set_piomode")));
  458. #endif
  459. void ide_init (void)
  460. {
  461. #ifdef CONFIG_IDE_8xx_DIRECT
  462. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  463. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  464. #endif
  465. unsigned char c;
  466. int i, bus;
  467. #if defined(CONFIG_SC3)
  468. unsigned int ata_reset_time = ATA_RESET_TIME;
  469. #endif
  470. #ifdef CONFIG_IDE_8xx_PCCARD
  471. extern int pcmcia_on (void);
  472. extern int ide_devices_found; /* Initialized in check_ide_device() */
  473. #endif /* CONFIG_IDE_8xx_PCCARD */
  474. #ifdef CONFIG_IDE_PREINIT
  475. extern int ide_preinit (void);
  476. WATCHDOG_RESET();
  477. if (ide_preinit ()) {
  478. puts ("ide_preinit failed\n");
  479. return;
  480. }
  481. #endif /* CONFIG_IDE_PREINIT */
  482. #ifdef CONFIG_IDE_8xx_PCCARD
  483. extern int pcmcia_on (void);
  484. extern int ide_devices_found; /* Initialized in check_ide_device() */
  485. WATCHDOG_RESET();
  486. ide_devices_found = 0;
  487. /* initialize the PCMCIA IDE adapter card */
  488. pcmcia_on();
  489. if (!ide_devices_found)
  490. return;
  491. udelay (1000000); /* 1 s */
  492. #endif /* CONFIG_IDE_8xx_PCCARD */
  493. WATCHDOG_RESET();
  494. #ifdef CONFIG_IDE_8xx_DIRECT
  495. /* Initialize PIO timing tables */
  496. for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
  497. pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
  498. gd->bus_clk);
  499. pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
  500. gd->bus_clk);
  501. pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
  502. gd->bus_clk);
  503. debug ( "PIO Mode %d: setup=%2d ns/%d clk"
  504. " len=%3d ns/%d clk"
  505. " hold=%2d ns/%d clk\n",
  506. i,
  507. pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
  508. pio_config_ns[i].t_length, pio_config_clk[i].t_length,
  509. pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
  510. }
  511. #endif /* CONFIG_IDE_8xx_DIRECT */
  512. /* Reset the IDE just to be sure.
  513. * Light LED's to show
  514. */
  515. ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
  516. ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
  517. #ifdef CONFIG_IDE_8xx_DIRECT
  518. /* PCMCIA / IDE initialization for common mem space */
  519. pcmp->pcmc_pgcrb = 0;
  520. /* start in PIO mode 0 - most relaxed timings */
  521. pio_mode = 0;
  522. set_pcmcia_timing (pio_mode);
  523. #endif /* CONFIG_IDE_8xx_DIRECT */
  524. /*
  525. * Wait for IDE to get ready.
  526. * According to spec, this can take up to 31 seconds!
  527. */
  528. for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
  529. int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
  530. #ifdef CONFIG_IDE_8xx_PCCARD
  531. /* Skip non-ide devices from probing */
  532. if ((ide_devices_found & (1 << bus)) == 0) {
  533. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  534. continue;
  535. }
  536. #endif
  537. printf ("Bus %d: ", bus);
  538. ide_bus_ok[bus] = 0;
  539. /* Select device
  540. */
  541. udelay (100000); /* 100 ms */
  542. ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  543. udelay (100000); /* 100 ms */
  544. i = 0;
  545. do {
  546. udelay (10000); /* 10 ms */
  547. c = ide_inb (dev, ATA_STATUS);
  548. i++;
  549. #if defined(CONFIG_SC3)
  550. if (i > (ata_reset_time * 100)) {
  551. #else
  552. if (i > (ATA_RESET_TIME * 100)) {
  553. #endif
  554. puts ("** Timeout **\n");
  555. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  556. return;
  557. }
  558. if ((i >= 100) && ((i%100)==0)) {
  559. putc ('.');
  560. }
  561. } while (c & ATA_STAT_BUSY);
  562. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  563. puts ("not available ");
  564. debug ("Status = 0x%02X ", c);
  565. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  566. } else if ((c & ATA_STAT_READY) == 0) {
  567. puts ("not available ");
  568. debug ("Status = 0x%02X ", c);
  569. #endif
  570. } else {
  571. puts ("OK ");
  572. ide_bus_ok[bus] = 1;
  573. }
  574. WATCHDOG_RESET();
  575. }
  576. putc ('\n');
  577. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  578. curr_device = -1;
  579. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  580. #ifdef CONFIG_IDE_LED
  581. int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
  582. #endif
  583. ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
  584. ide_dev_desc[i].if_type=IF_TYPE_IDE;
  585. ide_dev_desc[i].dev=i;
  586. ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
  587. ide_dev_desc[i].blksz=0;
  588. ide_dev_desc[i].lba=0;
  589. ide_dev_desc[i].block_read=ide_read;
  590. if (!ide_bus_ok[IDE_BUS(i)])
  591. continue;
  592. ide_led (led, 1); /* LED on */
  593. ide_ident(&ide_dev_desc[i]);
  594. ide_led (led, 0); /* LED off */
  595. dev_print(&ide_dev_desc[i]);
  596. /* ide_print (i); */
  597. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  598. init_part (&ide_dev_desc[i]); /* initialize partition type */
  599. if (curr_device < 0)
  600. curr_device = i;
  601. }
  602. }
  603. WATCHDOG_RESET();
  604. }
  605. /* ------------------------------------------------------------------------- */
  606. block_dev_desc_t * ide_get_dev(int dev)
  607. {
  608. return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
  609. }
  610. #ifdef CONFIG_IDE_8xx_DIRECT
  611. static void
  612. set_pcmcia_timing (int pmode)
  613. {
  614. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  615. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  616. ulong timings;
  617. debug ("Set timing for PIO Mode %d\n", pmode);
  618. timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
  619. | PCMCIA_SST(pio_config_clk[pmode].t_setup)
  620. | PCMCIA_SL (pio_config_clk[pmode].t_length)
  621. ;
  622. /* IDE 0
  623. */
  624. pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
  625. pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
  626. #if (CONFIG_SYS_PCMCIA_POR0 != 0)
  627. | timings
  628. #endif
  629. ;
  630. debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
  631. pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
  632. pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
  633. #if (CONFIG_SYS_PCMCIA_POR1 != 0)
  634. | timings
  635. #endif
  636. ;
  637. debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
  638. pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
  639. pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
  640. #if (CONFIG_SYS_PCMCIA_POR2 != 0)
  641. | timings
  642. #endif
  643. ;
  644. debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
  645. pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
  646. pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
  647. #if (CONFIG_SYS_PCMCIA_POR3 != 0)
  648. | timings
  649. #endif
  650. ;
  651. debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
  652. /* IDE 1
  653. */
  654. pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
  655. pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
  656. #if (CONFIG_SYS_PCMCIA_POR4 != 0)
  657. | timings
  658. #endif
  659. ;
  660. debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
  661. pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
  662. pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
  663. #if (CONFIG_SYS_PCMCIA_POR5 != 0)
  664. | timings
  665. #endif
  666. ;
  667. debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
  668. pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
  669. pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
  670. #if (CONFIG_SYS_PCMCIA_POR6 != 0)
  671. | timings
  672. #endif
  673. ;
  674. debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
  675. pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
  676. pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
  677. #if (CONFIG_SYS_PCMCIA_POR7 != 0)
  678. | timings
  679. #endif
  680. ;
  681. debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
  682. }
  683. #endif /* CONFIG_IDE_8xx_DIRECT */
  684. /* ------------------------------------------------------------------------- */
  685. /* We only need to swap data if we are running on a big endian cpu. */
  686. /* But Au1x00 cpu:s already swaps data in big endian mode! */
  687. #if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
  688. #define input_swap_data(x,y,z) input_data(x,y,z)
  689. #else
  690. static void
  691. input_swap_data(int dev, ulong *sect_buf, int words)
  692. {
  693. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  694. uchar i;
  695. volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  696. volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  697. ushort *dbuf = (ushort *)sect_buf;
  698. while (words--) {
  699. for (i=0; i<2; i++) {
  700. *(((uchar *)(dbuf)) + 1) = *pbuf_even;
  701. *(uchar *)dbuf = *pbuf_odd;
  702. dbuf+=1;
  703. }
  704. }
  705. #else
  706. volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  707. ushort *dbuf = (ushort *)sect_buf;
  708. debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
  709. while (words--) {
  710. #ifdef __MIPS__
  711. *dbuf++ = swab16p((u16*)pbuf);
  712. *dbuf++ = swab16p((u16*)pbuf);
  713. #elif defined(CONFIG_PCS440EP)
  714. *dbuf++ = *pbuf;
  715. *dbuf++ = *pbuf;
  716. #else
  717. *dbuf++ = ld_le16(pbuf);
  718. *dbuf++ = ld_le16(pbuf);
  719. #endif /* !MIPS */
  720. }
  721. #endif
  722. }
  723. #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
  724. #if defined(CONFIG_IDE_SWAP_IO)
  725. static void
  726. output_data(int dev, ulong *sect_buf, int words)
  727. {
  728. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  729. uchar *dbuf;
  730. volatile uchar *pbuf_even;
  731. volatile uchar *pbuf_odd;
  732. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  733. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  734. dbuf = (uchar *)sect_buf;
  735. while (words--) {
  736. EIEIO;
  737. *pbuf_even = *dbuf++;
  738. EIEIO;
  739. *pbuf_odd = *dbuf++;
  740. EIEIO;
  741. *pbuf_even = *dbuf++;
  742. EIEIO;
  743. *pbuf_odd = *dbuf++;
  744. }
  745. #else
  746. ushort *dbuf;
  747. volatile ushort *pbuf;
  748. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  749. dbuf = (ushort *)sect_buf;
  750. while (words--) {
  751. #if defined(CONFIG_PCS440EP)
  752. /* not tested, because CF was write protected */
  753. EIEIO;
  754. *pbuf = ld_le16(dbuf++);
  755. EIEIO;
  756. *pbuf = ld_le16(dbuf++);
  757. #else
  758. EIEIO;
  759. *pbuf = *dbuf++;
  760. EIEIO;
  761. *pbuf = *dbuf++;
  762. #endif
  763. }
  764. #endif
  765. }
  766. #else /* ! CONFIG_IDE_SWAP_IO */
  767. static void
  768. output_data(int dev, ulong *sect_buf, int words)
  769. {
  770. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
  771. }
  772. #endif /* CONFIG_IDE_SWAP_IO */
  773. #if defined(CONFIG_IDE_SWAP_IO)
  774. static void
  775. input_data(int dev, ulong *sect_buf, int words)
  776. {
  777. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  778. uchar *dbuf;
  779. volatile uchar *pbuf_even;
  780. volatile uchar *pbuf_odd;
  781. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  782. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  783. dbuf = (uchar *)sect_buf;
  784. while (words--) {
  785. *dbuf++ = *pbuf_even;
  786. EIEIO;
  787. SYNC;
  788. *dbuf++ = *pbuf_odd;
  789. EIEIO;
  790. SYNC;
  791. *dbuf++ = *pbuf_even;
  792. EIEIO;
  793. SYNC;
  794. *dbuf++ = *pbuf_odd;
  795. EIEIO;
  796. SYNC;
  797. }
  798. #else
  799. ushort *dbuf;
  800. volatile ushort *pbuf;
  801. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  802. dbuf = (ushort *)sect_buf;
  803. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  804. while (words--) {
  805. #if defined(CONFIG_PCS440EP)
  806. EIEIO;
  807. *dbuf++ = ld_le16(pbuf);
  808. EIEIO;
  809. *dbuf++ = ld_le16(pbuf);
  810. #else
  811. EIEIO;
  812. *dbuf++ = *pbuf;
  813. EIEIO;
  814. *dbuf++ = *pbuf;
  815. #endif
  816. }
  817. #endif
  818. }
  819. #else /* ! CONFIG_IDE_SWAP_IO */
  820. static void
  821. input_data(int dev, ulong *sect_buf, int words)
  822. {
  823. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
  824. }
  825. #endif /* CONFIG_IDE_SWAP_IO */
  826. /* -------------------------------------------------------------------------
  827. */
  828. static void ide_ident (block_dev_desc_t *dev_desc)
  829. {
  830. ulong iobuf[ATA_SECTORWORDS];
  831. unsigned char c;
  832. hd_driveid_t *iop = (hd_driveid_t *)iobuf;
  833. #ifdef CONFIG_ATAPI
  834. int retries = 0;
  835. int do_retry = 0;
  836. #endif
  837. #ifdef CONFIG_TUNE_PIO
  838. int pio_mode;
  839. #endif
  840. #if 0
  841. int mode, cycle_time;
  842. #endif
  843. int device;
  844. device=dev_desc->dev;
  845. printf (" Device %d: ", device);
  846. ide_led (DEVICE_LED(device), 1); /* LED on */
  847. /* Select device
  848. */
  849. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  850. dev_desc->if_type=IF_TYPE_IDE;
  851. #ifdef CONFIG_ATAPI
  852. do_retry = 0;
  853. retries = 0;
  854. /* Warning: This will be tricky to read */
  855. while (retries <= 1) {
  856. /* check signature */
  857. if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
  858. (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
  859. (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
  860. (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
  861. /* ATAPI Signature found */
  862. dev_desc->if_type=IF_TYPE_ATAPI;
  863. /* Start Ident Command
  864. */
  865. ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
  866. /*
  867. * Wait for completion - ATAPI devices need more time
  868. * to become ready
  869. */
  870. c = ide_wait (device, ATAPI_TIME_OUT);
  871. } else
  872. #endif
  873. {
  874. /* Start Ident Command
  875. */
  876. ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
  877. /* Wait for completion
  878. */
  879. c = ide_wait (device, IDE_TIME_OUT);
  880. }
  881. ide_led (DEVICE_LED(device), 0); /* LED off */
  882. if (((c & ATA_STAT_DRQ) == 0) ||
  883. ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
  884. #ifdef CONFIG_ATAPI
  885. {
  886. /* Need to soft reset the device in case it's an ATAPI... */
  887. debug ("Retrying...\n");
  888. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  889. udelay(100000);
  890. ide_outb (device, ATA_COMMAND, 0x08);
  891. udelay (500000); /* 500 ms */
  892. }
  893. /* Select device
  894. */
  895. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  896. retries++;
  897. #else
  898. return;
  899. #endif
  900. }
  901. #ifdef CONFIG_ATAPI
  902. else
  903. break;
  904. } /* see above - ugly to read */
  905. if (retries == 2) /* Not found */
  906. return;
  907. #endif
  908. input_swap_data (device, iobuf, ATA_SECTORWORDS);
  909. ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
  910. ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
  911. ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
  912. #ifdef __LITTLE_ENDIAN
  913. /*
  914. * firmware revision, model, and serial number have Big Endian Byte
  915. * order in Word. Convert all three to little endian.
  916. *
  917. * See CF+ and CompactFlash Specification Revision 2.0:
  918. * 6.2.1.6: Identify Drive, Table 39 for more details
  919. */
  920. strswab (dev_desc->revision);
  921. strswab (dev_desc->vendor);
  922. strswab (dev_desc->product);
  923. #endif /* __LITTLE_ENDIAN */
  924. if ((iop->config & 0x0080)==0x0080)
  925. dev_desc->removable = 1;
  926. else
  927. dev_desc->removable = 0;
  928. #ifdef CONFIG_TUNE_PIO
  929. /* Mode 0 - 2 only, are directly determined by word 51. */
  930. pio_mode = iop->tPIO;
  931. if (pio_mode > 2) {
  932. printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
  933. pio_mode = 0; /* Force it to dead slow, and hope for the best... */
  934. }
  935. /* Any CompactFlash Storage Card that supports PIO mode 3 or above
  936. * shall set bit 1 of word 53 to one and support the fields contained
  937. * in words 64 through 70.
  938. */
  939. if (iop->field_valid & 0x02) {
  940. /* Mode 3 and above are possible. Check in order from slow
  941. * to fast, so we wind up with the highest mode allowed.
  942. */
  943. if (iop->eide_pio_modes & 0x01)
  944. pio_mode = 3;
  945. if (iop->eide_pio_modes & 0x02)
  946. pio_mode = 4;
  947. if (ata_id_is_cfa((u16 *)iop)) {
  948. if ((iop->cf_advanced_caps & 0x07) == 0x01)
  949. pio_mode = 5;
  950. if ((iop->cf_advanced_caps & 0x07) == 0x02)
  951. pio_mode = 6;
  952. }
  953. }
  954. /* System-specific, depends on bus speeds, etc. */
  955. ide_set_piomode(pio_mode);
  956. #endif /* CONFIG_TUNE_PIO */
  957. #if 0
  958. /*
  959. * Drive PIO mode autoselection
  960. */
  961. mode = iop->tPIO;
  962. printf ("tPIO = 0x%02x = %d\n",mode, mode);
  963. if (mode > 2) { /* 2 is maximum allowed tPIO value */
  964. mode = 2;
  965. debug ("Override tPIO -> 2\n");
  966. }
  967. if (iop->field_valid & 2) { /* drive implements ATA2? */
  968. debug ("Drive implements ATA2\n");
  969. if (iop->capability & 8) { /* drive supports use_iordy? */
  970. cycle_time = iop->eide_pio_iordy;
  971. } else {
  972. cycle_time = iop->eide_pio;
  973. }
  974. debug ("cycle time = %d\n", cycle_time);
  975. mode = 4;
  976. if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
  977. if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
  978. if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
  979. if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
  980. }
  981. printf ("PIO mode to use: PIO %d\n", mode);
  982. #endif /* 0 */
  983. #ifdef CONFIG_ATAPI
  984. if (dev_desc->if_type==IF_TYPE_ATAPI) {
  985. atapi_inquiry(dev_desc);
  986. return;
  987. }
  988. #endif /* CONFIG_ATAPI */
  989. #ifdef __BIG_ENDIAN
  990. /* swap shorts */
  991. dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
  992. #else /* ! __BIG_ENDIAN */
  993. /*
  994. * do not swap shorts on little endian
  995. *
  996. * See CF+ and CompactFlash Specification Revision 2.0:
  997. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  998. */
  999. dev_desc->lba = iop->lba_capacity;
  1000. #endif /* __BIG_ENDIAN */
  1001. #ifdef CONFIG_LBA48
  1002. if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
  1003. dev_desc->lba48 = 1;
  1004. dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
  1005. ((unsigned long long)iop->lba48_capacity[1] << 16) |
  1006. ((unsigned long long)iop->lba48_capacity[2] << 32) |
  1007. ((unsigned long long)iop->lba48_capacity[3] << 48);
  1008. } else {
  1009. dev_desc->lba48 = 0;
  1010. }
  1011. #endif /* CONFIG_LBA48 */
  1012. /* assuming HD */
  1013. dev_desc->type=DEV_TYPE_HARDDISK;
  1014. dev_desc->blksz=ATA_BLOCKSIZE;
  1015. dev_desc->lun=0; /* just to fill something in... */
  1016. #if 0 /* only used to test the powersaving mode,
  1017. * if enabled, the drive goes after 5 sec
  1018. * in standby mode */
  1019. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1020. c = ide_wait (device, IDE_TIME_OUT);
  1021. ide_outb (device, ATA_SECT_CNT, 1);
  1022. ide_outb (device, ATA_LBA_LOW, 0);
  1023. ide_outb (device, ATA_LBA_MID, 0);
  1024. ide_outb (device, ATA_LBA_HIGH, 0);
  1025. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1026. ide_outb (device, ATA_COMMAND, 0xe3);
  1027. udelay (50);
  1028. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1029. #endif
  1030. }
  1031. /* ------------------------------------------------------------------------- */
  1032. ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1033. {
  1034. ulong n = 0;
  1035. unsigned char c;
  1036. unsigned char pwrsave=0; /* power save */
  1037. #ifdef CONFIG_LBA48
  1038. unsigned char lba48 = 0;
  1039. if (blknr & 0x0000fffff0000000ULL) {
  1040. /* more than 28 bits used, use 48bit mode */
  1041. lba48 = 1;
  1042. }
  1043. #endif
  1044. debug ("ide_read dev %d start %LX, blocks %lX buffer at %lX\n",
  1045. device, blknr, blkcnt, (ulong)buffer);
  1046. ide_led (DEVICE_LED(device), 1); /* LED on */
  1047. /* Select device
  1048. */
  1049. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1050. c = ide_wait (device, IDE_TIME_OUT);
  1051. if (c & ATA_STAT_BUSY) {
  1052. printf ("IDE read: device %d not ready\n", device);
  1053. goto IDE_READ_E;
  1054. }
  1055. /* first check if the drive is in Powersaving mode, if yes,
  1056. * increase the timeout value */
  1057. ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  1058. udelay (50);
  1059. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1060. if (c & ATA_STAT_BUSY) {
  1061. printf ("IDE read: device %d not ready\n", device);
  1062. goto IDE_READ_E;
  1063. }
  1064. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1065. printf ("No Powersaving mode %X\n", c);
  1066. } else {
  1067. c = ide_inb(device,ATA_SECT_CNT);
  1068. debug ("Powersaving %02X\n",c);
  1069. if(c==0)
  1070. pwrsave=1;
  1071. }
  1072. while (blkcnt-- > 0) {
  1073. c = ide_wait (device, IDE_TIME_OUT);
  1074. if (c & ATA_STAT_BUSY) {
  1075. printf ("IDE read: device %d not ready\n", device);
  1076. break;
  1077. }
  1078. #ifdef CONFIG_LBA48
  1079. if (lba48) {
  1080. /* write high bits */
  1081. ide_outb (device, ATA_SECT_CNT, 0);
  1082. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1083. #ifdef CONFIG_SYS_64BIT_LBA
  1084. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1085. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1086. #else
  1087. ide_outb (device, ATA_LBA_MID, 0);
  1088. ide_outb (device, ATA_LBA_HIGH, 0);
  1089. #endif
  1090. }
  1091. #endif
  1092. ide_outb (device, ATA_SECT_CNT, 1);
  1093. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1094. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1095. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1096. #ifdef CONFIG_LBA48
  1097. if (lba48) {
  1098. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1099. ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
  1100. } else
  1101. #endif
  1102. {
  1103. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1104. ATA_DEVICE(device) |
  1105. ((blknr >> 24) & 0xF) );
  1106. ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
  1107. }
  1108. udelay (50);
  1109. if(pwrsave) {
  1110. c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
  1111. pwrsave=0;
  1112. } else {
  1113. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1114. }
  1115. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1116. #if defined(CONFIG_SYS_64BIT_LBA)
  1117. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1118. device, blknr, c);
  1119. #else
  1120. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1121. device, (ulong)blknr, c);
  1122. #endif
  1123. break;
  1124. }
  1125. input_data (device, buffer, ATA_SECTORWORDS);
  1126. (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
  1127. ++n;
  1128. ++blknr;
  1129. buffer += ATA_BLOCKSIZE;
  1130. }
  1131. IDE_READ_E:
  1132. ide_led (DEVICE_LED(device), 0); /* LED off */
  1133. return (n);
  1134. }
  1135. /* ------------------------------------------------------------------------- */
  1136. ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1137. {
  1138. ulong n = 0;
  1139. unsigned char c;
  1140. #ifdef CONFIG_LBA48
  1141. unsigned char lba48 = 0;
  1142. if (blknr & 0x0000fffff0000000ULL) {
  1143. /* more than 28 bits used, use 48bit mode */
  1144. lba48 = 1;
  1145. }
  1146. #endif
  1147. ide_led (DEVICE_LED(device), 1); /* LED on */
  1148. /* Select device
  1149. */
  1150. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1151. while (blkcnt-- > 0) {
  1152. c = ide_wait (device, IDE_TIME_OUT);
  1153. if (c & ATA_STAT_BUSY) {
  1154. printf ("IDE read: device %d not ready\n", device);
  1155. goto WR_OUT;
  1156. }
  1157. #ifdef CONFIG_LBA48
  1158. if (lba48) {
  1159. /* write high bits */
  1160. ide_outb (device, ATA_SECT_CNT, 0);
  1161. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1162. #ifdef CONFIG_SYS_64BIT_LBA
  1163. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1164. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1165. #else
  1166. ide_outb (device, ATA_LBA_MID, 0);
  1167. ide_outb (device, ATA_LBA_HIGH, 0);
  1168. #endif
  1169. }
  1170. #endif
  1171. ide_outb (device, ATA_SECT_CNT, 1);
  1172. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1173. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1174. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1175. #ifdef CONFIG_LBA48
  1176. if (lba48) {
  1177. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1178. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  1179. } else
  1180. #endif
  1181. {
  1182. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1183. ATA_DEVICE(device) |
  1184. ((blknr >> 24) & 0xF) );
  1185. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
  1186. }
  1187. udelay (50);
  1188. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1189. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1190. #if defined(CONFIG_SYS_64BIT_LBA)
  1191. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1192. device, blknr, c);
  1193. #else
  1194. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1195. device, (ulong)blknr, c);
  1196. #endif
  1197. goto WR_OUT;
  1198. }
  1199. output_data (device, buffer, ATA_SECTORWORDS);
  1200. c = ide_inb (device, ATA_STATUS); /* clear IRQ */
  1201. ++n;
  1202. ++blknr;
  1203. buffer += ATA_BLOCKSIZE;
  1204. }
  1205. WR_OUT:
  1206. ide_led (DEVICE_LED(device), 0); /* LED off */
  1207. return (n);
  1208. }
  1209. /* ------------------------------------------------------------------------- */
  1210. /*
  1211. * copy src to dest, skipping leading and trailing blanks and null
  1212. * terminate the string
  1213. * "len" is the size of available memory including the terminating '\0'
  1214. */
  1215. static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
  1216. {
  1217. unsigned char *end, *last;
  1218. last = dst;
  1219. end = src + len - 1;
  1220. /* reserve space for '\0' */
  1221. if (len < 2)
  1222. goto OUT;
  1223. /* skip leading white space */
  1224. while ((*src) && (src<end) && (*src==' '))
  1225. ++src;
  1226. /* copy string, omitting trailing white space */
  1227. while ((*src) && (src<end)) {
  1228. *dst++ = *src;
  1229. if (*src++ != ' ')
  1230. last = dst;
  1231. }
  1232. OUT:
  1233. *last = '\0';
  1234. }
  1235. /* ------------------------------------------------------------------------- */
  1236. /*
  1237. * Wait until Busy bit is off, or timeout (in ms)
  1238. * Return last status
  1239. */
  1240. static uchar ide_wait (int dev, ulong t)
  1241. {
  1242. ulong delay = 10 * t; /* poll every 100 us */
  1243. uchar c;
  1244. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  1245. udelay (100);
  1246. if (delay-- == 0) {
  1247. break;
  1248. }
  1249. }
  1250. return (c);
  1251. }
  1252. /* ------------------------------------------------------------------------- */
  1253. #ifdef CONFIG_IDE_RESET
  1254. extern void ide_set_reset(int idereset);
  1255. static void ide_reset (void)
  1256. {
  1257. #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
  1258. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  1259. #endif
  1260. int i;
  1261. curr_device = -1;
  1262. for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
  1263. ide_bus_ok[i] = 0;
  1264. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
  1265. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  1266. ide_set_reset (1); /* assert reset */
  1267. /* the reset signal shall be asserted for et least 25 us */
  1268. udelay(25);
  1269. WATCHDOG_RESET();
  1270. #ifdef CONFIG_SYS_PB_12V_ENABLE
  1271. immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */
  1272. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1273. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1274. immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
  1275. /* wait 500 ms for the voltage to stabilize
  1276. */
  1277. for (i=0; i<500; ++i) {
  1278. udelay (1000);
  1279. }
  1280. immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */
  1281. #endif /* CONFIG_SYS_PB_12V_ENABLE */
  1282. #ifdef CONFIG_SYS_PB_IDE_MOTOR
  1283. /* configure IDE Motor voltage monitor pin as input */
  1284. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1285. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1286. immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1287. /* wait up to 1 s for the motor voltage to stabilize
  1288. */
  1289. for (i=0; i<1000; ++i) {
  1290. if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
  1291. break;
  1292. }
  1293. udelay (1000);
  1294. }
  1295. if (i == 1000) { /* Timeout */
  1296. printf ("\nWarning: 5V for IDE Motor missing\n");
  1297. # ifdef CONFIG_STATUS_LED
  1298. # ifdef STATUS_LED_YELLOW
  1299. status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
  1300. # endif
  1301. # ifdef STATUS_LED_GREEN
  1302. status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
  1303. # endif
  1304. # endif /* CONFIG_STATUS_LED */
  1305. }
  1306. #endif /* CONFIG_SYS_PB_IDE_MOTOR */
  1307. WATCHDOG_RESET();
  1308. /* de-assert RESET signal */
  1309. ide_set_reset(0);
  1310. /* wait 250 ms */
  1311. for (i=0; i<250; ++i) {
  1312. udelay (1000);
  1313. }
  1314. }
  1315. #endif /* CONFIG_IDE_RESET */
  1316. /* ------------------------------------------------------------------------- */
  1317. #if defined(CONFIG_IDE_LED) && \
  1318. !defined(CONFIG_CPC45) && \
  1319. !defined(CONFIG_HMI10) && \
  1320. !defined(CONFIG_KUP4K) && \
  1321. !defined(CONFIG_KUP4X)
  1322. static uchar led_buffer = 0; /* Buffer for current LED status */
  1323. static void ide_led (uchar led, uchar status)
  1324. {
  1325. uchar *led_port = LED_PORT;
  1326. if (status) { /* switch LED on */
  1327. led_buffer |= led;
  1328. } else { /* switch LED off */
  1329. led_buffer &= ~led;
  1330. }
  1331. *led_port = led_buffer;
  1332. }
  1333. #endif /* CONFIG_IDE_LED */
  1334. #if defined(CONFIG_OF_IDE_FIXUP)
  1335. int ide_device_present(int dev)
  1336. {
  1337. if (dev >= CONFIG_SYS_IDE_MAXBUS)
  1338. return 0;
  1339. return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
  1340. }
  1341. #endif
  1342. /* ------------------------------------------------------------------------- */
  1343. #ifdef CONFIG_ATAPI
  1344. /****************************************************************************
  1345. * ATAPI Support
  1346. */
  1347. #if defined(CONFIG_IDE_SWAP_IO)
  1348. /* since ATAPI may use commands with not 4 bytes alligned length
  1349. * we have our own transfer functions, 2 bytes alligned */
  1350. static void
  1351. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1352. {
  1353. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1354. uchar *dbuf;
  1355. volatile uchar *pbuf_even;
  1356. volatile uchar *pbuf_odd;
  1357. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1358. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1359. while (shorts--) {
  1360. EIEIO;
  1361. *pbuf_even = *dbuf++;
  1362. EIEIO;
  1363. *pbuf_odd = *dbuf++;
  1364. }
  1365. #else
  1366. ushort *dbuf;
  1367. volatile ushort *pbuf;
  1368. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1369. dbuf = (ushort *)sect_buf;
  1370. debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
  1371. while (shorts--) {
  1372. EIEIO;
  1373. *pbuf = *dbuf++;
  1374. }
  1375. #endif
  1376. }
  1377. static void
  1378. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1379. {
  1380. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1381. uchar *dbuf;
  1382. volatile uchar *pbuf_even;
  1383. volatile uchar *pbuf_odd;
  1384. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1385. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1386. while (shorts--) {
  1387. EIEIO;
  1388. *dbuf++ = *pbuf_even;
  1389. EIEIO;
  1390. *dbuf++ = *pbuf_odd;
  1391. }
  1392. #else
  1393. ushort *dbuf;
  1394. volatile ushort *pbuf;
  1395. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1396. dbuf = (ushort *)sect_buf;
  1397. debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
  1398. while (shorts--) {
  1399. EIEIO;
  1400. *dbuf++ = *pbuf;
  1401. }
  1402. #endif
  1403. }
  1404. #else /* ! CONFIG_IDE_SWAP_IO */
  1405. static void
  1406. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1407. {
  1408. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1409. }
  1410. static void
  1411. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1412. {
  1413. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1414. }
  1415. #endif /* CONFIG_IDE_SWAP_IO */
  1416. /*
  1417. * Wait until (Status & mask) == res, or timeout (in ms)
  1418. * Return last status
  1419. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  1420. * and then they set their DRQ Bit
  1421. */
  1422. static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
  1423. {
  1424. ulong delay = 10 * t; /* poll every 100 us */
  1425. uchar c;
  1426. c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
  1427. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  1428. /* break if error occurs (doesn't make sense to wait more) */
  1429. if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
  1430. break;
  1431. udelay (100);
  1432. if (delay-- == 0) {
  1433. break;
  1434. }
  1435. }
  1436. return (c);
  1437. }
  1438. /*
  1439. * issue an atapi command
  1440. */
  1441. unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
  1442. {
  1443. unsigned char c,err,mask,res;
  1444. int n;
  1445. ide_led (DEVICE_LED(device), 1); /* LED on */
  1446. /* Select device
  1447. */
  1448. mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
  1449. res = 0;
  1450. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1451. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1452. if ((c & mask) != res) {
  1453. printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
  1454. err=0xFF;
  1455. goto AI_OUT;
  1456. }
  1457. /* write taskfile */
  1458. ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  1459. ide_outb (device, ATA_SECT_CNT, 0);
  1460. ide_outb (device, ATA_SECT_NUM, 0);
  1461. ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
  1462. ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
  1463. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1464. ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
  1465. udelay (50);
  1466. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1467. res = ATA_STAT_DRQ;
  1468. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1469. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  1470. printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
  1471. err=0xFF;
  1472. goto AI_OUT;
  1473. }
  1474. output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
  1475. /* ATAPI Command written wait for completition */
  1476. udelay (5000); /* device must set bsy */
  1477. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1478. /* if no data wait for DRQ = 0 BSY = 0
  1479. * if data wait for DRQ = 1 BSY = 0 */
  1480. res=0;
  1481. if(buflen)
  1482. res = ATA_STAT_DRQ;
  1483. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1484. if ((c & mask) != res ) {
  1485. if (c & ATA_STAT_ERR) {
  1486. err=(ide_inb(device,ATA_ERROR_REG))>>4;
  1487. debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
  1488. } else {
  1489. printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
  1490. err=0xFF;
  1491. }
  1492. goto AI_OUT;
  1493. }
  1494. n=ide_inb(device, ATA_CYL_HIGH);
  1495. n<<=8;
  1496. n+=ide_inb(device, ATA_CYL_LOW);
  1497. if(n>buflen) {
  1498. printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
  1499. err=0xff;
  1500. goto AI_OUT;
  1501. }
  1502. if((n==0)&&(buflen<0)) {
  1503. printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
  1504. err=0xff;
  1505. goto AI_OUT;
  1506. }
  1507. if(n!=buflen) {
  1508. debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
  1509. }
  1510. if(n!=0) { /* data transfer */
  1511. debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
  1512. /* we transfer shorts */
  1513. n>>=1;
  1514. /* ok now decide if it is an in or output */
  1515. if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
  1516. debug ("Write to device\n");
  1517. output_data_shorts(device,(unsigned short *)buffer,n);
  1518. } else {
  1519. debug ("Read from device @ %p shorts %d\n",buffer,n);
  1520. input_data_shorts(device,(unsigned short *)buffer,n);
  1521. }
  1522. }
  1523. udelay(5000); /* seems that some CD ROMs need this... */
  1524. mask = ATA_STAT_BUSY|ATA_STAT_ERR;
  1525. res=0;
  1526. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1527. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1528. err=(ide_inb(device,ATA_ERROR_REG) >> 4);
  1529. debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
  1530. } else {
  1531. err = 0;
  1532. }
  1533. AI_OUT:
  1534. ide_led (DEVICE_LED(device), 0); /* LED off */
  1535. return (err);
  1536. }
  1537. /*
  1538. * sending the command to atapi_issue. If an status other than good
  1539. * returns, an request_sense will be issued
  1540. */
  1541. #define ATAPI_DRIVE_NOT_READY 100
  1542. #define ATAPI_UNIT_ATTN 10
  1543. unsigned char atapi_issue_autoreq (int device,
  1544. unsigned char* ccb,
  1545. int ccblen,
  1546. unsigned char *buffer,
  1547. int buflen)
  1548. {
  1549. unsigned char sense_data[18],sense_ccb[12];
  1550. unsigned char res,key,asc,ascq;
  1551. int notready,unitattn;
  1552. unitattn=ATAPI_UNIT_ATTN;
  1553. notready=ATAPI_DRIVE_NOT_READY;
  1554. retry:
  1555. res= atapi_issue(device,ccb,ccblen,buffer,buflen);
  1556. if (res==0)
  1557. return (0); /* Ok */
  1558. if (res==0xFF)
  1559. return (0xFF); /* error */
  1560. debug ("(auto_req)atapi_issue returned sense key %X\n",res);
  1561. memset(sense_ccb,0,sizeof(sense_ccb));
  1562. memset(sense_data,0,sizeof(sense_data));
  1563. sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
  1564. sense_ccb[4]=18; /* allocation Length */
  1565. res=atapi_issue(device,sense_ccb,12,sense_data,18);
  1566. key=(sense_data[2]&0xF);
  1567. asc=(sense_data[12]);
  1568. ascq=(sense_data[13]);
  1569. debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
  1570. debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  1571. sense_data[0],
  1572. key,
  1573. asc,
  1574. ascq);
  1575. if((key==0))
  1576. return 0; /* ok device ready */
  1577. if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
  1578. if(unitattn-->0) {
  1579. udelay(200*1000);
  1580. goto retry;
  1581. }
  1582. printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
  1583. goto error;
  1584. }
  1585. if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
  1586. if (notready-->0) {
  1587. udelay(200*1000);
  1588. goto retry;
  1589. }
  1590. printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
  1591. goto error;
  1592. }
  1593. if(asc==0x3a) {
  1594. debug ("Media not present\n");
  1595. goto error;
  1596. }
  1597. printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1598. error:
  1599. debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1600. return (0xFF);
  1601. }
  1602. static void atapi_inquiry(block_dev_desc_t * dev_desc)
  1603. {
  1604. unsigned char ccb[12]; /* Command descriptor block */
  1605. unsigned char iobuf[64]; /* temp buf */
  1606. unsigned char c;
  1607. int device;
  1608. device=dev_desc->dev;
  1609. dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
  1610. dev_desc->block_read=atapi_read;
  1611. memset(ccb,0,sizeof(ccb));
  1612. memset(iobuf,0,sizeof(iobuf));
  1613. ccb[0]=ATAPI_CMD_INQUIRY;
  1614. ccb[4]=40; /* allocation Legnth */
  1615. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
  1616. debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
  1617. if (c!=0)
  1618. return;
  1619. /* copy device ident strings */
  1620. ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
  1621. ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
  1622. ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
  1623. dev_desc->lun=0;
  1624. dev_desc->lba=0;
  1625. dev_desc->blksz=0;
  1626. dev_desc->type=iobuf[0] & 0x1f;
  1627. if ((iobuf[1]&0x80)==0x80)
  1628. dev_desc->removable = 1;
  1629. else
  1630. dev_desc->removable = 0;
  1631. memset(ccb,0,sizeof(ccb));
  1632. memset(iobuf,0,sizeof(iobuf));
  1633. ccb[0]=ATAPI_CMD_START_STOP;
  1634. ccb[4]=0x03; /* start */
  1635. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1636. debug ("ATAPI_CMD_START_STOP returned %x\n",c);
  1637. if (c!=0)
  1638. return;
  1639. memset(ccb,0,sizeof(ccb));
  1640. memset(iobuf,0,sizeof(iobuf));
  1641. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1642. debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
  1643. if (c!=0)
  1644. return;
  1645. memset(ccb,0,sizeof(ccb));
  1646. memset(iobuf,0,sizeof(iobuf));
  1647. ccb[0]=ATAPI_CMD_READ_CAP;
  1648. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
  1649. debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
  1650. if (c!=0)
  1651. return;
  1652. debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  1653. iobuf[0],iobuf[1],iobuf[2],iobuf[3],
  1654. iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
  1655. dev_desc->lba =((unsigned long)iobuf[0]<<24) +
  1656. ((unsigned long)iobuf[1]<<16) +
  1657. ((unsigned long)iobuf[2]<< 8) +
  1658. ((unsigned long)iobuf[3]);
  1659. dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
  1660. ((unsigned long)iobuf[5]<<16) +
  1661. ((unsigned long)iobuf[6]<< 8) +
  1662. ((unsigned long)iobuf[7]);
  1663. #ifdef CONFIG_LBA48
  1664. dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  1665. #endif
  1666. return;
  1667. }
  1668. /*
  1669. * atapi_read:
  1670. * we transfer only one block per command, since the multiple DRQ per
  1671. * command is not yet implemented
  1672. */
  1673. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  1674. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  1675. #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
  1676. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1677. {
  1678. ulong n = 0;
  1679. unsigned char ccb[12]; /* Command descriptor block */
  1680. ulong cnt;
  1681. debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
  1682. device, blknr, blkcnt, (ulong)buffer);
  1683. do {
  1684. if (blkcnt>ATAPI_READ_MAX_BLOCK) {
  1685. cnt=ATAPI_READ_MAX_BLOCK;
  1686. } else {
  1687. cnt=blkcnt;
  1688. }
  1689. ccb[0]=ATAPI_CMD_READ_12;
  1690. ccb[1]=0; /* reserved */
  1691. ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
  1692. ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
  1693. ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
  1694. ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
  1695. ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
  1696. ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
  1697. ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
  1698. ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
  1699. ccb[10]=0; /* reserved */
  1700. ccb[11]=0; /* reserved */
  1701. if (atapi_issue_autoreq(device,ccb,12,
  1702. (unsigned char *)buffer,
  1703. cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
  1704. return (n);
  1705. }
  1706. n+=cnt;
  1707. blkcnt-=cnt;
  1708. blknr+=cnt;
  1709. buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
  1710. } while (blkcnt > 0);
  1711. return (n);
  1712. }
  1713. /* ------------------------------------------------------------------------- */
  1714. #endif /* CONFIG_ATAPI */
  1715. U_BOOT_CMD(
  1716. ide, 5, 1, do_ide,
  1717. "IDE sub-system",
  1718. "reset - reset IDE controller\n"
  1719. "ide info - show available IDE devices\n"
  1720. "ide device [dev] - show or set current device\n"
  1721. "ide part [dev] - print partition table of one or all IDE devices\n"
  1722. "ide read addr blk# cnt\n"
  1723. "ide write addr blk# cnt - read/write `cnt'"
  1724. " blocks starting at block `blk#'\n"
  1725. " to/from memory address `addr'"
  1726. );
  1727. U_BOOT_CMD(
  1728. diskboot, 3, 1, do_diskboot,
  1729. "boot from IDE device",
  1730. "loadAddr dev:part"
  1731. );